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ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine

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Stack and unstack the frame pointer according to the AAPCS in
AArch64AllDataCachesOperation ().

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2017-02-22 09:38:19 +00:00
parent 91231b55d5
commit de2a78247a
1 changed files with 3 additions and 2 deletions
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5
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
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@ -273,7 +273,8 @@ ASM_FUNC(ArmDisableBranchPrediction)
ASM_FUNC(AArch64AllDataCachesOperation) ASM_FUNC(AArch64AllDataCachesOperation)
// We can use regs 0-7 and 9-15 without having to save/restore. // We can use regs 0-7 and 9-15 without having to save/restore.
// Save our link register on the stack. - The stack must always be quad-word aligned // Save our link register on the stack. - The stack must always be quad-word aligned
str x30, [sp, #-16]! stp x29, x30, [sp, #-16]!
mov x29, sp
mov x1, x0 // Save Function call in x1 mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
@ -324,7 +325,7 @@ L_Skip:
L_Finished: L_Finished:
dsb sy dsb sy
isb isb
ldr x30, [sp], #0x10 ldp x29, x30, [sp], #0x10
ret ret