Import some basic libraries instances for Mde Packages.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2704 6f19259b-4bc3-4df7-8a09-765794883524
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vanjeff
205
MdePkg/Library/BaseLib/Ia32/Thunk16.S
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205
MdePkg/Library/BaseLib/Ia32/Thunk16.S
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//
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// Include common header file for this module.
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//
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#include "CommonHeader.h"
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# Thunk16.S
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#
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# Abstract:
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#
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# Real mode thunk
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#
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#------------------------------------------------------------------------------
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.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
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.globl ASM_PFX(InternalAsmThunk16)
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ASM_PFX(m16Start):
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SavedGdt: .space 6
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ASM_PFX(BackFromUserCode):
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push %ss
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push %cs
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.byte 0x66
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call L_Base1 # push eip
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L_Base1:
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pushfw # pushfd actually
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cli # disable interrupts
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push %gs
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push %fs
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push %es
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push %ds
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pushaw # pushad actually
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.byte 0x66, 0xba # mov edx, imm32
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ASM_PFX(ThunkAttr): .space 4
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
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jz 1f
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movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
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cli # disable interrupts
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jnc 2f
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1:
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
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jz 2f
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inb $0x92, %al
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orb $2, %al
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outb %al, $0x92 # deactivate A20M#
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2:
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movl %ss, %eax
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.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
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mov %ebp, 0xffffffd8(%esi)
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mov 0xfffffff8(%esi), %ebx
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shlw $4, %ax # shl eax, 4
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addw %ax, %bp # add ebp, eax
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.byte 0x66, 0xb8 # mov eax, imm32
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SavedCr4: .space 4
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movl %eax, %cr4
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lgdtw %cs:0xfffffff2(%edi)
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.byte 0x66, 0xb8 # mov eax, imm32
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SavedCr0: .space 4
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movl %eax, %cr0
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.byte 0xb8 # mov ax, imm16
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SavedSs: .space 2
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movl %eax, %ss
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.byte 0x66, 0xbc # mov esp, imm32
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SavedEsp: .space 4
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.byte 0x66
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lret # return to protected mode
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_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
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.word 0x8
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_16Idtr: .word 0x3ff
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.long 0
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_16Gdtr: .word GdtEnd - _NullSegDesc - 1
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_16GdtrBase: .long _NullSegDesc
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ASM_PFX(ToUserCode):
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movl %ss, %edx
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movl %ecx, %ss # set new segment selectors
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movl %ecx, %ds
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movl %ecx, %es
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movl %ecx, %fs
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movl %ecx, %gs
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movl %eax, %cr0
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movl %ebp, %cr4 # real mode starts at next instruction
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movl %esi, %ss # set up 16-bit stack segment
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xchgw %bx, %sp # set up 16-bit stack pointer
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.byte 0x66
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call L_Base # push eip
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L_Base:
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popw %bp # ebp <- offset L_Base
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addr16 pushl 36(%si)
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.byte 0x36
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lea 0xc(%esi), %eax
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push %eax
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lret
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L_RealMode:
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mov %edx, %cs:0xffffffc5(%esi)
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mov %bx, %cs:0xffffffcb(%esi)
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lidtw %cs:0xffffffd7(%esi)
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popaw # popad actually
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pop %ds
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pop %es
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pop %fs
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pop %gs
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popfw # popfd
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lretw # transfer control to user code
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_NullSegDesc: .quad 0
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_16CsDesc:
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.word -1
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.word 0
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.byte 0
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.byte 0x9b
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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_16DsDesc:
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.word -1
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.word 0
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.byte 0
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.byte 0x93
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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GdtEnd:
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#
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# @param RegSet Pointer to a IA32_DWORD_REGS structure
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# @param Transition Pointer to the transition code
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# @return The address of the 16-bit stack after returning from user code
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#
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ASM_PFX(InternalAsmThunk16):
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push %ebp
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push %ebx
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push %esi
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push %edi
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push %ds
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push %es
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push %fs
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push %gs
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movl 36(%esp), %esi # esi <- RegSet
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movzwl 0x32(%esi), %edx
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mov 0xc(%esi), %edi
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add $0xffffffc8, %edi
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movl %edi, %ebx # ebx <- stack offset
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imul $0x10, %edx, %eax
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push $0xd
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addl %eax, %edi # edi <- linear address of 16-bit stack
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pop %ecx
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rep
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movsl # copy RegSet
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movl 40(%esp), %eax # eax <- address of transition code
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movl %edx, %esi # esi <- 16-bit stack segment
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lea 0x5e(%eax), %edx
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movl %eax, %ecx
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andl $0xf, %ecx
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shll $12, %eax
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lea 0x6(%ecx), %ecx
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movw %cx, %ax
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stosl # [edi] <- return address of user code
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sgdtl 0xffffffa2(%edx)
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sidtl 0x24(%esp)
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movl %cr0, %eax
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movl %eax, (%edx) # save CR0 in SavedCr0
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andl $0x7ffffffe, %eax # clear PE, PG bits
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movl %cr4, %ebp
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mov %ebp, 0xfffffff1(%edx)
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andl $0x300, %ebp # clear all but PCE and OSFXSR bits
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pushl $0x10
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pop %ecx # ecx <- selector for data segments
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lgdtl 0x20(%edx)
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pushfl
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lcall *0x14(%edx)
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popfl
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lidtl 0x24(%esp)
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lea 0xffffffcc(%ebp), %eax
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pop %gs
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pop %fs
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pop %es
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pop %ds
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pop %edi
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pop %esi
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pop %ebx
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pop %ebp
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ret
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.const:
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ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)
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ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
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ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
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ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
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ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
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