ArmPlatformPkg: Introduced 'ArmPlatformSecLib'
The function only used in Secure Firmware used to be mixed with the Non-Secure/Normal functions in ArmPlatformLib. When the Secure Firmware was not required for some platforms (eg: BeagleBoard), these functions were empty functions. This new interface has been created to clean the ArmPlatformLib interface between the SEC and PEI phases. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13260 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -19,7 +19,6 @@
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#include <Library/BaseMemoryLib.h>
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#include <Library/SerialPortLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/ArmCpuLib.h>
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#include "SecInternal.h"
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@@ -50,7 +49,11 @@ CEntryPoint (
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if (FixedPcdGet32 (PcdVFPEnabled)) {
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ArmEnableVFP();
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}
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// Initialize peripherals that must be done at the early stage
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// Example: Some L2 controller, interconnect, clock, DMC, etc
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ArmPlatformSecInitialize (MpId);
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// Primary CPU clears out the SCU tag RAMs, secondaries wait
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if (IS_PRIMARY_CORE(MpId)) {
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if (ArmIsMpCore()) {
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@@ -93,19 +96,6 @@ CEntryPoint (
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// Enable Full Access to CoProcessors
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ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
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if (IS_PRIMARY_CORE(MpId)) {
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// Initialize peripherals that must be done at the early stage
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// Example: Some L2x0 controllers must be initialized in Secure World
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ArmPlatformSecInitialize ();
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// If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
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// If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
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if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
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// Initialize system memory (DRAM)
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ArmPlatformInitializeSystemMemory ();
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}
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}
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// Test if Trustzone is supported on this platform
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if (FixedPcdGetBool (PcdTrustzoneSupport)) {
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if (ArmIsMpCore()) {
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@@ -155,7 +145,7 @@ TrustedWorldInitialization (
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ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
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// Initialize platform specific security policy
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ArmPlatformTrustzoneInit (MpId);
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ArmPlatformSecTrustzoneInit (MpId);
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// Setup the Trustzone Chipsets
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if (IS_PRIMARY_CORE(MpId)) {
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@@ -38,7 +38,7 @@
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[LibraryClasses]
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ArmCpuLib
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ArmLib
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ArmPlatformLib
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ArmPlatformSecLib
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ArmTrustedMonitorLib
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BaseLib
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DebugLib
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@@ -20,7 +20,7 @@
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformSecBootAction)
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GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
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GCC_ASM_IMPORT(ArmDisableInterrupts)
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GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
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GCC_ASM_IMPORT(ArmWriteVBar)
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@@ -66,7 +66,7 @@ _WaitInitMem:
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_InitMem:
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// Initialize Init Boot Memory
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bl ASM_PFX(ArmPlatformInitializeBootMemory)
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bl ASM_PFX(ArmPlatformSecBootMemoryInit)
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// Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
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@@ -19,7 +19,7 @@
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IMPORT CEntryPoint
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IMPORT ArmPlatformSecBootAction
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IMPORT ArmPlatformInitializeBootMemory
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IMPORT ArmPlatformSecBootMemoryInit
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IMPORT ArmDisableInterrupts
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IMPORT ArmDisableCachesAndMmu
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IMPORT ArmWriteVBar
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@@ -68,7 +68,7 @@ _WaitInitMem
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_InitMem
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// Initialize Init Boot Memory
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bl ArmPlatformInitializeBootMemory
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bl ArmPlatformSecBootMemoryInit
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// Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
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@@ -19,7 +19,7 @@
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Library/ArmPlatformSecLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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@@ -49,11 +49,6 @@ SecVectorTable (
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VOID
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);
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VOID
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NonSecureWaitForFirmware (
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VOID
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);
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VOID
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enter_monitor_mode (
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IN UINTN MonitorEntryPoint,
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