diff --git a/UefiCpuPkg/SecCore/SecCoreNative.inf b/UefiCpuPkg/SecCore/SecCoreNative.inf new file mode 100644 index 0000000000..b528c59879 --- /dev/null +++ b/UefiCpuPkg/SecCore/SecCoreNative.inf @@ -0,0 +1,80 @@ +## @file +# SecCoreNative module that implements the SEC phase. +# +# This is the first module taking control after the reset vector. +# The entry point function is _ModuleEntryPoint in PlatformSecLib. +# The entry point function starts in 32bit protected mode or 64bit +# mode depending on how resetvector is implemented, enables +# temporary memory and calls into SecStartup(). +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SecCoreNative + MODULE_UNI_FILE = SecCore.uni + FILE_GUID = 43CA74CA-7D29-49A0-B3B9-20F84015B27D + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 EBC +# + +[Sources] + SecMain.c + SecMain.h + FindPeiCore.c + SecBist.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + PlatformSecLib + PcdLib + DebugAgentLib + UefiCpuLib + PeCoffGetEntryPointLib + PeCoffExtraActionLib + CpuExceptionHandlerLib + ReportStatusCodeLib + PeiServicesLib + PeiServicesTablePointerLib + HobLib + +[Ppis] + ## SOMETIMES_CONSUMES + ## PRODUCES + gEfiSecPlatformInformationPpiGuid + ## SOMETIMES_CONSUMES + ## SOMETIMES_PRODUCES + gEfiSecPlatformInformation2PpiGuid + gEfiTemporaryRamDonePpiGuid ## PRODUCES + ## NOTIFY + ## SOMETIMES_CONSUMES + gPeiSecPerformancePpiGuid + gEfiPeiCoreFvLocationPpiGuid + ## CONSUMES + gRepublishSecPpiPpiGuid + +[Guids] + ## SOMETIMES_PRODUCES ## HOB + gEfiFirmwarePerformanceGuid + +[Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdMigrateTemporaryRamFirmwareVolumes ## CONSUMES + +[UserExtensions.TianoCore."ExtraFiles"] + SecCoreExtra.uni diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 699c91626b..870b452840 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -161,6 +161,7 @@ UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf UefiCpuPkg/SecCore/SecCore.inf + UefiCpuPkg/SecCore/SecCoreNative.inf UefiCpuPkg/SecMigrationPei/SecMigrationPei.inf UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf {