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1. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf.

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2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan
2013-11-22 06:24:41 +00:00
committed by vanjeff
parent 57f360f261
commit e41aad1521
27 changed files with 1906 additions and 3036 deletions
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125
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
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@@ -1,7 +1,7 @@
/** @file
x64 CPU Exception Hanlder.
Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -15,61 +15,102 @@
#include "CpuExceptionCommon.h"
/**
Internal function to setup CPU exception handlers.
Return address map of exception handler template so that C code can generate
exception tables.
@param IdtEntry Pointer to IDT entry to be updated.
@param InterruptHandler IDT handler value.
**/
VOID
InternalSetupCpuExceptionHandlers (
VOID
ArchUpdateIdtEntry (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
IN UINTN InterruptHandler
)
{
IA32_DESCRIPTOR IdtDescriptor;
UINTN IdtSize;
EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
UINT16 CodeSegment;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN Index;
UINTN InterruptHandler;
//
// Read IDT descriptor and calculate IDT size
//
AsmReadIdtr (&IdtDescriptor);
IdtSize = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
if (IdtSize > CPU_EXCEPTION_NUM) {
//
// CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
//
IdtSize = CPU_EXCEPTION_NUM;
}
//
// Use current CS as the segment selector of interrupt gate in IDT
//
CodeSegment = AsmReadCs ();
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
GetTemplateAddressMap (&TemplateMap);
for (Index = 0; Index < IdtSize; Index ++) {
InterruptHandler = TemplateMap.ExceptionStart + Index * TemplateMap.ExceptionStubHeaderSize;
IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[Index].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[Index].Bits.Selector = CodeSegment;
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
/**
Common exception handler.
Read IDT handler value from IDT entry.
@param IdtEntry Pointer to IDT entry to be read.
**/
UINTN
ArchGetIdtHandler (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
)
{
return IdtEntry->Bits.OffsetLow + (((UINTN) IdtEntry->Bits.OffsetHigh) << 16) +
(((UINTN) IdtEntry->Bits.OffsetUpper) << 32);
}
/**
Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
@param ExceptionType Exception type.
@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
**/
VOID
ArchSaveExceptionContext (
IN UINTN ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
IA32_EFLAGS32 Eflags;
//
// Save Exception context in global variable
//
mReservedVectors[ExceptionType].OldSs = SystemContext.SystemContextX64->Ss;
mReservedVectors[ExceptionType].OldSp = SystemContext.SystemContextX64->Rsp;
mReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextX64->Rflags;
mReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextX64->Cs;
mReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextX64->Rip;
mReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextX64->ExceptionData;
//
// Clear IF flag to avoid old IDT handler enable interrupt by IRET
//
Eflags.UintN = SystemContext.SystemContextX64->Rflags;
Eflags.Bits.IF = 0;
SystemContext.SystemContextX64->Rflags = Eflags.UintN;
//
// Modify the EIP in stack, then old IDT handler will return to the stub code
//
SystemContext.SystemContextX64->Rip = (UINTN) mReservedVectors[ExceptionType].HookAfterStubHeaderCode;
}
/**
Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
@param ExceptionType Exception type.
@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
**/
VOID
ArchRestoreExceptionContext (
IN UINTN ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
SystemContext.SystemContextX64->Ss = mReservedVectors[ExceptionType].OldSs;
SystemContext.SystemContextX64->Rsp = mReservedVectors[ExceptionType].OldSp;
SystemContext.SystemContextX64->Rflags = mReservedVectors[ExceptionType].OldFlags;
SystemContext.SystemContextX64->Cs = mReservedVectors[ExceptionType].OldCs;
SystemContext.SystemContextX64->Rip = mReservedVectors[ExceptionType].OldIp;
SystemContext.SystemContextX64->ExceptionData = mReservedVectors[ExceptionType].ExceptionData;
}
/**
Dump CPU content information.
@param ExceptionType Exception type.
@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
**/
VOID
DumpCpuContent (
IN UINTN ExceptionType,
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{