1. fix AtaPassThru.PassThru() sct failure
2. avoid reenumerate existing device to reduce boot time at AtaBus. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11232 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -1,7 +1,7 @@
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/** @file
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The file for AHCI mode of ATA host controller.
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Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@@ -256,6 +256,42 @@ AhciClearPortStatus (
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AhciWriteReg (PciIo, EFI_AHCI_IS_OFFSET, AhciReadReg (PciIo, EFI_AHCI_IS_OFFSET));
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}
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/**
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This function is used to dump the Status Registers and if there is ERR bit set
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in the Status Register, the Error Register's value is also be dumped.
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@param PciIo The PCI IO protocol instance.
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@param Port The number of port.
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@param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
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**/
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VOID
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EFIAPI
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AhciDumpPortStatus (
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IN EFI_PCI_IO_PROTOCOL *PciIo,
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IN UINT8 Port,
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IN OUT EFI_ATA_STATUS_BLOCK *AtaStatusBlock
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)
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{
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UINT32 Offset;
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UINT32 Data;
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ASSERT (PciIo != NULL);
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_TFD;
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Data = AhciReadReg (PciIo, Offset);
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if (AtaStatusBlock != NULL) {
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ZeroMem (AtaStatusBlock, sizeof (EFI_ATA_STATUS_BLOCK));
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AtaStatusBlock->AtaStatus = (UINT8)Data;
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if ((AtaStatusBlock->AtaStatus & BIT0) != 0) {
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AtaStatusBlock->AtaError = (UINT8)(Data >> 8);
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}
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}
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}
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/**
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Enable the FIS running for giving port.
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@@ -621,7 +657,7 @@ AhciPioTransfer (
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//
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Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);
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do {
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Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET);
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Value = *(volatile UINT32 *) (FisBaseAddr + EFI_AHCI_PIO_FIS_OFFSET);
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if ((Value & EFI_AHCI_FIS_TYPE_MASK) == EFI_AHCI_FIS_PIO_SETUP) {
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break;
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@@ -686,6 +722,8 @@ Exit:
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Map
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);
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AhciDumpPortStatus (PciIo, Port, AtaStatusBlock);
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return Status;
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}
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@@ -855,6 +893,8 @@ Exit:
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Map
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);
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AhciDumpPortStatus (PciIo, Port, AtaStatusBlock);
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return Status;
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}
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@@ -942,7 +982,7 @@ AhciNonDataTransfer (
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//
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Delay = (UINT32) (DivU64x32(Timeout, 1000) + 1);
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do {
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Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET);
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Value = *(volatile UINT32 *) (FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET);
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if ((Value & EFI_AHCI_FIS_TYPE_MASK) == EFI_AHCI_FIS_REGISTER_D2H) {
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break;
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@@ -984,6 +1024,8 @@ Exit:
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Timeout
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);
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AhciDumpPortStatus (PciIo, Port, AtaStatusBlock);
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return Status;
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}
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@@ -1082,17 +1124,6 @@ AhciStartCommand (
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return Status;
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}
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//
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// Setting the command
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//
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SACT;
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AhciAndReg (PciIo, Offset, 0);
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AhciOrReg (PciIo, Offset, CmdSlotBit);
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI;
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AhciAndReg (PciIo, Offset, 0);
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AhciOrReg (PciIo, Offset, CmdSlotBit);
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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PortStatus = AhciReadReg (PciIo, Offset);
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@@ -1124,6 +1155,17 @@ AhciStartCommand (
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_ST | StartCmd);
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//
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// Setting the command
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//
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SACT;
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AhciAndReg (PciIo, Offset, 0);
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AhciOrReg (PciIo, Offset, CmdSlotBit);
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI;
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AhciAndReg (PciIo, Offset, 0);
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AhciOrReg (PciIo, Offset, CmdSlotBit);
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return EFI_SUCCESS;
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}
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