ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds

Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh (by reusing the RVCT code)
as well as memcpy and memset.
For MSFT compatibility, some of the code needs to be explicitly
forced to ARM, and the /oldit assembly flag needs to be added.
Also, while RVCT_ASM_EXPORT macro invocations have been removed,
the replacement code is designed to be as close as possible to
the one that would have been generated if using the macros.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Pete Batard
2018-01-12 21:33:29 +08:00
committed by Liming Gao
parent 30939ff2bc
commit e58427e396
7 changed files with 185 additions and 32 deletions

View File

@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -13,20 +14,41 @@
//------------------------------------------------------------------------------
EXTERN __aeabi_uldivmod
IMPORT __aeabi_uldivmod
EXPORT __aeabi_ldivmod
EXPORT __rt_sdiv64
INCLUDE AsmMacroExport.inc
AREA s___aeabi_ldivmod, CODE, READONLY, ARM
ARM
;
;UINT32
;INT64
;EFIAPI
;__aeabi_uidivmode (
; IN UINT32 Dividen
; IN UINT32 Divisor
;__rt_sdiv64 (
; IN INT64 Divisor
; IN INT64 Dividend
; );
;
__rt_sdiv64
; Swap r0-r1 and r2-r3
MOV r12, r0
MOV r0, r2
MOV r2, r12
MOV r12, r1
MOV r1, r3
MOV r3, r12
B __aeabi_ldivmod
RVCT_ASM_EXPORT __aeabi_ldivmod
;
;INT64
;EFIAPI
;__aeabi_ldivmod (
; IN INT64 Dividend
; IN INT64 Divisor
; );
;
__aeabi_ldivmod
PUSH {r4,lr}
ASRS r4,r1,#1
EOR r4,r4,r3,LSR #1
@@ -39,7 +61,7 @@ L_Test1
RSBS r2,r2,#0
RSC r3,r3,#0
L_Test2
BL __aeabi_uldivmod ;
BL __aeabi_uldivmod
TST r4,#0x40000000
BEQ L_Test3
RSBS r0,r0,#0
@@ -53,5 +75,3 @@ L_Exit
POP {r4,pc}
END