ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds

Introduce CRT assembly replacements for __rt_sdiv, __rt_udiv,
__rt_udiv64, __rt_sdiv64, __rt_srsh (by reusing the RVCT code)
as well as memcpy and memset.
For MSFT compatibility, some of the code needs to be explicitly
forced to ARM, and the /oldit assembly flag needs to be added.
Also, while RVCT_ASM_EXPORT macro invocations have been removed,
the replacement code is designed to be as close as possible to
the one that would have been generated if using the macros.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Pete Batard
2018-01-12 21:33:29 +08:00
committed by Liming Gao
parent 30939ff2bc
commit e58427e396
7 changed files with 185 additions and 32 deletions

View File

@@ -1,6 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -12,32 +13,33 @@
//
//------------------------------------------------------------------------------
EXPORT __aeabi_llsr
EXPORT __rt_srsh
AREA s___aeabi_llsr, CODE, READONLY, ARM
INCLUDE AsmMacroExport.inc
ARM
;
;VOID
;EFIAPI
;__aeabi_llsr (
; IN VOID *Destination,
; IN VOID *Source,
; IN UINT32 Size
; );
; IN UINT64 Value,
; IN UINT32 Shift
;)
;
RVCT_ASM_EXPORT __aeabi_llsr
__aeabi_llsr
__rt_srsh
SUBS r3,r2,#0x20
BPL {pc} + 0x18 ; 0x1c
BPL __aeabi_llsr_label1
RSB r3,r2,#0x20
LSR r0,r0,r2
ORR r0,r0,r1,LSL r3
LSR r1,r1,r2
BX lr
__aeabi_llsr_label1
LSR r0,r1,r3
MOV r1,#0
BX lr
END