UefiPayloadPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -25,18 +25,18 @@
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STATIC
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CONST
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
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{
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{
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ACPI_DEVICE_PATH,
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ACPI_DP,
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{
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(UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
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(UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
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(UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
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(UINT8)((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
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}
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},
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EISA_PNP_ID(0x0A03), // HID
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0 // UID
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EISA_PNP_ID (0x0A03), // HID
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0 // UID
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},
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{
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@@ -92,20 +92,20 @@ CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
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**/
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EFI_STATUS
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InitRootBridge (
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IN UINT64 Supports,
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IN UINT64 Attributes,
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IN UINT64 AllocAttributes,
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IN UINT8 RootBusNumber,
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IN UINT8 MaxSubBusNumber,
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IN PCI_ROOT_BRIDGE_APERTURE *Io,
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IN PCI_ROOT_BRIDGE_APERTURE *Mem,
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IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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IN PCI_ROOT_BRIDGE_APERTURE *PMem,
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IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
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OUT PCI_ROOT_BRIDGE *RootBus
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)
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IN UINT64 Supports,
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IN UINT64 Attributes,
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IN UINT64 AllocAttributes,
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IN UINT8 RootBusNumber,
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IN UINT8 MaxSubBusNumber,
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IN PCI_ROOT_BRIDGE_APERTURE *Io,
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IN PCI_ROOT_BRIDGE_APERTURE *Mem,
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IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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IN PCI_ROOT_BRIDGE_APERTURE *PMem,
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IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
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OUT PCI_ROOT_BRIDGE *RootBus
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)
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{
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
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//
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// Be safe if other fields are added to PCI_ROOT_BRIDGE later.
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@@ -120,8 +120,8 @@ InitRootBridge (
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RootBus->DmaAbove4G = FALSE;
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RootBus->AllocationAttributes = AllocAttributes;
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RootBus->Bus.Base = RootBusNumber;
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RootBus->Bus.Limit = MaxSubBusNumber;
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RootBus->Bus.Base = RootBusNumber;
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RootBus->Bus.Limit = MaxSubBusNumber;
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CopyMem (&RootBus->Io, Io, sizeof (*Io));
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CopyMem (&RootBus->Mem, Mem, sizeof (*Mem));
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CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));
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@@ -130,18 +130,25 @@ InitRootBridge (
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RootBus->NoExtendedConfigSpace = FALSE;
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DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
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&mRootBridgeDevicePathTemplate);
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DevicePath = AllocateCopyPool (
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sizeof (mRootBridgeDevicePathTemplate),
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&mRootBridgeDevicePathTemplate
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);
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if (DevicePath == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
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return EFI_OUT_OF_RESOURCES;
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}
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DevicePath->AcpiDevicePath.UID = RootBusNumber;
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RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
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DEBUG ((DEBUG_INFO,
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"%a: populated root bus %d, with room for %d subordinate bus(es)\n",
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__FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));
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DevicePath->AcpiDevicePath.UID = RootBusNumber;
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RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
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DEBUG ((
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DEBUG_INFO,
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"%a: populated root bus %d, with room for %d subordinate bus(es)\n",
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__FUNCTION__,
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RootBusNumber,
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MaxSubBusNumber - RootBusNumber
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));
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return EFI_SUCCESS;
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}
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@@ -154,13 +161,16 @@ InitRootBridge (
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**/
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EFI_DEVICE_PATH_PROTOCOL *
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CreateRootBridgeDevicePath (
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IN UINT32 HID,
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IN UINT32 UID
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)
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IN UINT32 HID,
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IN UINT32 UID
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)
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{
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
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DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
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&mRootBridgeDevicePathTemplate);
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CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
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DevicePath = AllocateCopyPool (
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sizeof (mRootBridgeDevicePathTemplate),
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&mRootBridgeDevicePathTemplate
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);
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ASSERT (DevicePath != NULL);
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DevicePath->AcpiDevicePath.HID = HID;
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DevicePath->AcpiDevicePath.UID = UID;
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@@ -179,30 +189,32 @@ CreateRootBridgeDevicePath (
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PCI_ROOT_BRIDGE *
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EFIAPI
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PciHostBridgeGetRootBridges (
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UINTN *Count
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)
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UINTN *Count
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)
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{
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UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo;
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EFI_HOB_GUID_TYPE *GuidHob;
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UNIVERSAL_PAYLOAD_GENERIC_HEADER *GenericHeader;
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//
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// Find Universal Payload PCI Root Bridge Info hob
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//
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GuidHob = GetFirstGuidHob (&gUniversalPayloadPciRootBridgeInfoGuid);
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if (GuidHob != NULL) {
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GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);
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if ((sizeof(UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {
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GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);
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if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {
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if ((GenericHeader->Revision == UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION) && (GenericHeader->Length >= sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES))) {
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//
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// UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES structure is used when Revision equals to UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION
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//
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PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (GuidHob);
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if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {
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PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (GuidHob);
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if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {
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return RetrieveRootBridgeInfoFromHob (PciRootBridgeInfo, Count);
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}
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}
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}
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}
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return ScanForRootBridges (Count);
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}
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@@ -216,13 +228,14 @@ PciHostBridgeGetRootBridges (
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VOID
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EFIAPI
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PciHostBridgeFreeRootBridges (
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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)
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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)
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{
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if (Bridges == NULL && Count == 0) {
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if ((Bridges == NULL) && (Count == 0)) {
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return;
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}
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ASSERT (Bridges != NULL && Count > 0);
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do {
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@@ -233,7 +246,6 @@ PciHostBridgeFreeRootBridges (
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FreePool (Bridges);
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}
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/**
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Inform the platform that the resource conflict happens.
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@@ -251,9 +263,9 @@ PciHostBridgeFreeRootBridges (
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VOID
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EFIAPI
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PciHostBridgeResourceConflict (
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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)
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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)
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{
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//
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// coreboot UEFI Payload does not do PCI enumeration and should not call this
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