UefiPayloadPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -28,8 +28,8 @@
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/// Wait Time = 6 seconds = 6000000 microseconds
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/// Wait Period = 10 microseconds
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///
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#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
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#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
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#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
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#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
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///
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/// Flash cycle Type
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@@ -60,20 +60,19 @@ typedef enum {
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#define SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I')
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typedef struct {
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UINTN Signature;
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EFI_HANDLE Handle;
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UINT32 AcpiTmrReg;
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UINTN PchSpiBase;
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UINT16 RegionPermission;
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UINT32 SfdpVscc0Value;
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UINT32 SfdpVscc1Value;
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UINT32 StrapBaseAddress;
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UINT8 NumberOfComponents;
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UINT16 Flags;
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UINT32 Component1StartAddr;
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UINTN Signature;
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EFI_HANDLE Handle;
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UINT32 AcpiTmrReg;
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UINTN PchSpiBase;
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UINT16 RegionPermission;
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UINT32 SfdpVscc0Value;
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UINT32 SfdpVscc1Value;
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UINT32 StrapBaseAddress;
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UINT8 NumberOfComponents;
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UINT16 Flags;
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UINT32 Component1StartAddr;
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} SPI_INSTANCE;
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/**
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Acquire SPI MMIO BAR
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@@ -84,10 +83,9 @@ typedef struct {
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**/
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UINT32
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AcquireSpiBar0 (
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IN UINTN PchSpiBase
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IN UINTN PchSpiBase
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);
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/**
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Release SPI MMIO BAR. Do nothing.
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@@ -98,10 +96,9 @@ AcquireSpiBar0 (
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**/
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VOID
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ReleaseSpiBar0 (
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IN UINTN PchSpiBase
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IN UINTN PchSpiBase
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);
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/**
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This function is a hook for Spi to disable BIOS Write Protect
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@@ -115,8 +112,8 @@ ReleaseSpiBar0 (
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EFI_STATUS
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EFIAPI
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DisableBiosWriteProtect (
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IN UINTN PchSpiBase,
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IN UINT8 CpuSmmBwp
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IN UINTN PchSpiBase,
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IN UINT8 CpuSmmBwp
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);
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/**
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@@ -131,11 +128,10 @@ DisableBiosWriteProtect (
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VOID
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EFIAPI
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EnableBiosWriteProtect (
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IN UINTN PchSpiBase,
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IN UINT8 CpuSmmBwp
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IN UINTN PchSpiBase,
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IN UINT8 CpuSmmBwp
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);
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/**
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This function disables SPI Prefetching and caching,
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and returns previous BIOS Control Register value before disabling.
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@@ -147,7 +143,7 @@ EnableBiosWriteProtect (
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**/
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UINT8
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SaveAndDisableSpiPrefetchCache (
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IN UINTN PchSpiBase
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IN UINTN PchSpiBase
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);
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/**
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@@ -161,11 +157,10 @@ SaveAndDisableSpiPrefetchCache (
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**/
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VOID
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SetSpiBiosControlRegister (
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IN UINTN PchSpiBase,
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IN UINT8 BiosCtlValue
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IN UINTN PchSpiBase,
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IN UINT8 BiosCtlValue
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);
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/**
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This function sends the programmed SPI command to the slave device.
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@@ -201,8 +196,8 @@ SendSpiCmd (
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**/
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BOOLEAN
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WaitForSpiCycleComplete (
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IN UINT32 PchSpiBar0,
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IN BOOLEAN ErrorCheck
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IN UINT32 PchSpiBar0,
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IN BOOLEAN ErrorCheck
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);
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#endif
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