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UefiPayloadPkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:18 -08:00
committed by mergify[bot]
parent 053e878bfb
commit e5efcf8be8
76 changed files with 4281 additions and 4072 deletions
Download Patch File Download Diff File Expand all files Collapse all files

135
UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c
View File

@@ -9,7 +9,6 @@
#include "UefiPayloadEntry.h"
/**
Find the board related info from ACPI table
@@ -22,22 +21,22 @@
**/
RETURN_STATUS
ParseAcpiInfo (
IN UINT64 AcpiTableBase,
OUT ACPI_BOARD_INFO *AcpiBoardInfo
IN UINT64 AcpiTableBase,
OUT ACPI_BOARD_INFO *AcpiBoardInfo
)
{
EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
UINT32 *Entry32;
UINTN Entry32Num;
EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
UINT64 *Entry64;
UINTN Entry64Num;
UINTN Idx;
UINT32 *Signature;
EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
UINT32 *Entry32;
UINTN Entry32Num;
EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
UINT64 *Entry64;
UINTN Entry64Num;
UINTN Idx;
UINT32 *Signature;
EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
Rsdp = (EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)(UINTN)AcpiTableBase;
DEBUG ((DEBUG_INFO, "Rsdp at 0x%p\n", Rsdp));
@@ -50,8 +49,8 @@ ParseAcpiInfo (
MmCfgHdr = NULL;
Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);
if (Rsdt != NULL) {
Entry32 = (UINT32 *)(Rsdt + 1);
Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
Entry32 = (UINT32 *)(Rsdt + 1);
Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
for (Idx = 0; Idx < Entry32Num; Idx++) {
Signature = (UINT32 *)(UINTN)Entry32[Idx];
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
@@ -73,10 +72,10 @@ ParseAcpiInfo (
//
// Search Xsdt Second
//
Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
if (Xsdt != NULL) {
Entry64 = (UINT64 *)(Xsdt + 1);
Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
Entry64 = (UINT64 *)(Xsdt + 1);
Entry64Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
for (Idx = 0; Idx < Entry64Num; Idx++) {
Signature = (UINT32 *)(UINTN)Entry64[Idx];
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
@@ -109,68 +108,73 @@ Done:
AcpiBoardInfo->PmGpeEnBase = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
if (MmCfgHdr != NULL) {
MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8*) MmCfgHdr + sizeof (*MmCfgHdr));
MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8 *)MmCfgHdr + sizeof (*MmCfgHdr));
AcpiBoardInfo->PcieBaseAddress = MmCfgBase->BaseAddress;
AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;
AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;
} else {
AcpiBoardInfo->PcieBaseAddress = 0;
AcpiBoardInfo->PcieBaseSize = 0;
AcpiBoardInfo->PcieBaseSize = 0;
}
DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
DEBUG ((DEBUG_INFO, "Reset Value 0x%x\n", AcpiBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));
DEBUG ((DEBUG_INFO, "PcieBaseSize 0x%lx\n", AcpiBoardInfo->PcieBaseSize));
//
// Verify values for proper operation
//
ASSERT(Fadt->Pm1aCntBlk != 0);
ASSERT(Fadt->PmTmrBlk != 0);
ASSERT(Fadt->ResetReg.Address != 0);
ASSERT(Fadt->Pm1aEvtBlk != 0);
ASSERT(Fadt->Gpe0Blk != 0);
ASSERT (Fadt->Pm1aCntBlk != 0);
ASSERT (Fadt->PmTmrBlk != 0);
ASSERT (Fadt->ResetReg.Address != 0);
ASSERT (Fadt->Pm1aEvtBlk != 0);
ASSERT (Fadt->Gpe0Blk != 0);
DEBUG_CODE_BEGIN ();
BOOLEAN SciEnabled;
BOOLEAN SciEnabled;
//
// Check the consistency of SCI enabling
//
//
// Check the consistency of SCI enabling
//
//
// Get SCI_EN value
//
if (Fadt->Pm1CntLen == 4) {
SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;
} else {
//
// Get SCI_EN value
// if (Pm1CntLen == 2), use 16 bit IO read;
// if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
//
if (Fadt->Pm1CntLen == 4) {
SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
} else {
//
// if (Pm1CntLen == 2), use 16 bit IO read;
// if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
//
SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
}
SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;
}
if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
(Fadt->SmiCmd == 0) &&
!SciEnabled)
{
//
// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
// table does not provide a means to enable it through FADT->SmiCmd
//
DEBUG ((
DEBUG_ERROR,
"ERROR: The ACPI enabling status is inconsistent: SCI is not"
" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
" This may cause issues in OS.\n"
));
}
if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
(Fadt->SmiCmd == 0) &&
!SciEnabled) {
//
// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
// table does not provide a means to enable it through FADT->SmiCmd
//
DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
" This may cause issues in OS.\n"));
}
DEBUG_CODE_END ();
return RETURN_SUCCESS;
}
/**
Build ACPI board info HOB using infomation from ACPI table
@@ -180,15 +184,15 @@ Done:
**/
ACPI_BOARD_INFO *
BuildHobFromAcpi (
IN UINT64 AcpiTableBase
IN UINT64 AcpiTableBase
)
{
EFI_STATUS Status;
ACPI_BOARD_INFO AcpiBoardInfo;
ACPI_BOARD_INFO *NewAcpiBoardInfo;
EFI_STATUS Status;
ACPI_BOARD_INFO AcpiBoardInfo;
ACPI_BOARD_INFO *NewAcpiBoardInfo;
NewAcpiBoardInfo = NULL;
Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);
Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);
ASSERT_EFI_ERROR (Status);
if (!EFI_ERROR (Status)) {
NewAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
@@ -196,7 +200,6 @@ BuildHobFromAcpi (
CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));
}
return NewAcpiBoardInfo;
}

182
UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
View File

@@ -18,44 +18,62 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "VirtualMemory.h"
#include "UefiPayloadEntry.h"
#define STACK_SIZE 0x20000
#define IDT_ENTRY_COUNT 32
#define STACK_SIZE 0x20000
#define IDT_ENTRY_COUNT 32
typedef struct _X64_IDT_TABLE {
//
// Reserved 4 bytes preceding PeiService and IdtTable,
// since IDT base address should be 8-byte alignment.
//
UINT32 Reserved;
CONST EFI_PEI_SERVICES **PeiService;
X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];
UINT32 Reserved;
CONST EFI_PEI_SERVICES **PeiService;
X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];
} X64_IDT_TABLE;
//
// Global Descriptor Table (GDT)
//
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
/* selector { Global Segment Descriptor } */
/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
/* selector { Global Segment Descriptor } */
/* 0x00 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // null descriptor
/* 0x08 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear data segment descriptor
/* 0x10 */ {
{ 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear code segment descriptor
/* 0x18 */ {
{ 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x20 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system code segment descriptor
/* 0x28 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
/* 0x30 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x38 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 }
}, // system code segment descriptor
/* 0x40 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
};
//
// IA32 Gdt register
//
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {
sizeof (gGdtEntries) - 1,
(UINTN) gGdtEntries
};
(UINTN)gGdtEntries
};
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,
0
};
@@ -72,21 +90,21 @@ GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
**/
UINTN
Create4GPageTablesIa32Pae (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize
)
{
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PhysicalAddress;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN PageAddress;
UINT64 AddressEncMask;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PhysicalAddress;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN PageAddress;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@@ -98,53 +116,54 @@ Create4GPageTablesIa32Pae (
//
// Calculate the table entries needed.
//
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 30));
NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;
PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);
PageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
ASSERT (PageAddress != 0);
PageMap = (VOID *) PageAddress;
PageMap = (VOID *)PageAddress;
PageAddress += SIZE_4KB;
PageDirectoryPointerEntry = PageMap;
PhysicalAddress = 0;
PhysicalAddress = 0;
for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
//
PageDirectoryEntry = (VOID *) PageAddress;
PageAddress += SIZE_4KB;
PageDirectoryEntry = (VOID *)PageAddress;
PageAddress += SIZE_4KB;
//
// Fill in a Page Directory Pointer Entries
//
PageDirectoryPointerEntry->Uint64 = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {
if ((IsNullDetectionEnabled () && PhysicalAddress == 0)
|| ((PhysicalAddress < StackBase + StackSize)
&& ((PhysicalAddress + SIZE_2MB) > StackBase))) {
if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0))
|| ( (PhysicalAddress < StackBase + StackSize)
&& ((PhysicalAddress + SIZE_2MB) > StackBase)))
{
//
// Need to split this 2M page that covers stack range.
//
Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, 0, 0);
Split2MPageTo4K (PhysicalAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, 0, 0);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
for (; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
for ( ; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
ZeroMem (
PageDirectoryPointerEntry,
sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
@@ -157,7 +176,7 @@ Create4GPageTablesIa32Pae (
//
EnablePageTableProtection ((UINTN)PageMap, FALSE);
return (UINTN) PageMap;
return (UINTN)PageMap;
}
/**
@@ -172,9 +191,9 @@ IsIa32PaeSupport (
VOID
)
{
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Ia32PaeSupport;
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Ia32PaeSupport;
Ia32PaeSupport = FALSE;
AsmCpuid (0x0, &RegEax, NULL, NULL, NULL);
@@ -235,19 +254,19 @@ ToBuildPageTable (
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
)
{
EFI_PHYSICAL_ADDRESS BaseOfStack;
EFI_PHYSICAL_ADDRESS TopOfStack;
UINTN PageTables;
X64_IDT_GATE_DESCRIPTOR *IdtTable;
UINTN SizeOfTemplate;
VOID *TemplateBase;
EFI_PHYSICAL_ADDRESS VectorAddress;
UINT32 Index;
X64_IDT_TABLE *IdtTableForX64;
EFI_PHYSICAL_ADDRESS BaseOfStack;
EFI_PHYSICAL_ADDRESS TopOfStack;
UINTN PageTables;
X64_IDT_GATE_DESCRIPTOR *IdtTable;
UINTN SizeOfTemplate;
VOID *TemplateBase;
EFI_PHYSICAL_ADDRESS VectorAddress;
UINT32 Index;
X64_IDT_TABLE *IdtTableForX64;
//
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
@@ -257,10 +276,10 @@ HandOffToDxeCore (
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
}
BaseOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
BaseOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
ASSERT (BaseOfStack != 0);
if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
//
// Compute the top of the stack we were allocated, which is used to load X64 dxe core.
// Pre-allocate a 32 bytes which confroms to x64 calling convention.
@@ -275,7 +294,7 @@ HandOffToDxeCore (
//
// x64 Calling Conventions requires that the stack must be aligned to 16 bytes
//
TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);
TopOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)ALIGN_POINTER (TopOfStack, 16);
//
// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA
@@ -301,36 +320,35 @@ HandOffToDxeCore (
SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);
VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES(sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));
ASSERT (VectorAddress != 0);
//
// Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that
// it may not be gotten correctly after IDT register is re-written.
//
IdtTableForX64 = (X64_IDT_TABLE *) (UINTN) VectorAddress;
IdtTableForX64 = (X64_IDT_TABLE *)(UINTN)VectorAddress;
IdtTableForX64->PeiService = NULL;
VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) (IdtTableForX64 + 1);
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(IdtTableForX64 + 1);
IdtTable = IdtTableForX64->IdtTable;
for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {
IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;
IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;
IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;
IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;
IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;
IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));
IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));
IdtTable[Index].Reserved = 0;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16)VectorAddress;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16)(RShiftU64 (VectorAddress, 16));
IdtTable[Index].Offset32To63 = (UINT32)(RShiftU64 (VectorAddress, 32));
IdtTable[Index].Reserved = 0;
CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);
AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);
CopyMem ((VOID *)(UINTN)VectorAddress, TemplateBase, SizeOfTemplate);
AsmVectorFixup ((VOID *)(UINTN)VectorAddress, (UINT8)Index);
VectorAddress += SizeOfTemplate;
}
gLidtDescriptor.Base = (UINTN) IdtTable;
gLidtDescriptor.Base = (UINTN)IdtTable;
AsmWriteIdtr (&gLidtDescriptor);
@@ -358,8 +376,6 @@ HandOffToDxeCore (
// 32bit UEFI payload could be supported if required later.
DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n"));
ASSERT (FALSE);
CpuDeadLoop();
CpuDeadLoop ();
}
}

94
UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c
View File

@@ -15,13 +15,13 @@
@return Allocated memory.
**/
VOID*
VOID *
AllocateCodePages (
IN UINTN Pages
IN UINTN Pages
)
{
VOID *Alloc;
EFI_PEI_HOB_POINTERS Hob;
VOID *Alloc;
EFI_PEI_HOB_POINTERS Hob;
Alloc = AllocatePages (Pages);
if (Alloc == NULL) {
@@ -35,6 +35,7 @@ AllocateCodePages (
Hob.MemoryAllocation->AllocDescriptor.MemoryType = EfiBootServicesCode;
return Alloc;
}
Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, GET_NEXT_HOB (Hob));
}
@@ -44,7 +45,6 @@ AllocateCodePages (
return NULL;
}
/**
Loads and relocates a PE/COFF image
@@ -58,15 +58,15 @@ AllocateCodePages (
**/
EFI_STATUS
LoadPeCoffImage (
IN VOID *PeCoffImage,
OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
OUT UINT64 *ImageSize,
OUT EFI_PHYSICAL_ADDRESS *EntryPoint
IN VOID *PeCoffImage,
OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
OUT UINT64 *ImageSize,
OUT EFI_PHYSICAL_ADDRESS *EntryPoint
)
{
RETURN_STATUS Status;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
VOID *Buffer;
RETURN_STATUS Status;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
VOID *Buffer;
ZeroMem (&ImageContext, sizeof (ImageContext));
@@ -82,10 +82,11 @@ LoadPeCoffImage (
//
// Allocate Memory for the image
//
Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES((UINT32)ImageContext.ImageSize));
Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES ((UINT32)ImageContext.ImageSize));
if (Buffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;
//
@@ -134,13 +135,13 @@ FvFindFileByTypeGuid (
OUT EFI_FFS_FILE_HEADER **FileHeader
)
{
EFI_PHYSICAL_ADDRESS CurrentAddress;
EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;
EFI_FFS_FILE_HEADER *File;
UINT32 Size;
EFI_PHYSICAL_ADDRESS EndOfFile;
EFI_PHYSICAL_ADDRESS CurrentAddress;
EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;
EFI_FFS_FILE_HEADER *File;
UINT32 Size;
EFI_PHYSICAL_ADDRESS EndOfFile;
CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) FvHeader;
CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)FvHeader;
EndOfFirmwareVolume = CurrentAddress + FvHeader->FvLength;
//
@@ -152,7 +153,7 @@ FvFindFileByTypeGuid (
break;
}
File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;
File = (EFI_FFS_FILE_HEADER *)(UINTN)CurrentAddress;
if (IS_FFS_FILE2 (File)) {
Size = FFS_FILE2_SIZE (File);
if (Size <= 0x00FFFFFF) {
@@ -174,7 +175,7 @@ FvFindFileByTypeGuid (
// Look for file type
//
if (File->Type == FileType) {
if (Guid == NULL || CompareGuid(&File->Name, Guid)) {
if ((Guid == NULL) || CompareGuid (&File->Name, Guid)) {
*FileHeader = File;
return EFI_SUCCESS;
}
@@ -184,7 +185,6 @@ FvFindFileByTypeGuid (
return EFI_NOT_FOUND;
}
/**
This function searchs a given section type within a valid FFS file.
@@ -199,32 +199,34 @@ FvFindFileByTypeGuid (
**/
EFI_STATUS
FileFindSection (
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
)
{
UINT32 FileSize;
EFI_COMMON_SECTION_HEADER *Section;
UINT32 SectionSize;
UINT32 Index;
UINT32 FileSize;
EFI_COMMON_SECTION_HEADER *Section;
UINT32 SectionSize;
UINT32 Index;
if (IS_FFS_FILE2 (FileHeader)) {
FileSize = FFS_FILE2_SIZE (FileHeader);
} else {
FileSize = FFS_FILE_SIZE (FileHeader);
}
FileSize -= sizeof (EFI_FFS_FILE_HEADER);
Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);
Index = 0;
FileSize -= sizeof (EFI_FFS_FILE_HEADER);
Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);
Index = 0;
while (Index < FileSize) {
if (Section->Type == SectionType) {
if (IS_SECTION2 (Section)) {
*SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));
*SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER2));
} else {
*SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));
*SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER));
}
return EFI_SUCCESS;
}
@@ -244,7 +246,6 @@ FileFindSection (
return EFI_NOT_FOUND;
}
/**
Find DXE core from FV and build DXE core HOBs.
@@ -255,7 +256,7 @@ FileFindSection (
**/
EFI_STATUS
LoadDxeCore (
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
)
{
EFI_STATUS Status;
@@ -275,6 +276,7 @@ LoadDxeCore (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_FIRMWARE_VOLUME_IMAGE, (VOID **)&DxeCoreFv);
if (EFI_ERROR (Status)) {
return Status;
@@ -283,7 +285,7 @@ LoadDxeCore (
//
// Report DXE FV to DXE core
//
BuildFvHob ((EFI_PHYSICAL_ADDRESS) (UINTN) DxeCoreFv, DxeCoreFv->FvLength);
BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN)DxeCoreFv, DxeCoreFv->FvLength);
//
// Find DXE core file from DXE FV
@@ -306,7 +308,7 @@ LoadDxeCore (
return Status;
}
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
return EFI_SUCCESS;
}
@@ -322,15 +324,15 @@ LoadDxeCore (
**/
EFI_STATUS
UniversalLoadDxeCore (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
)
{
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PeCoffImage;
EFI_PHYSICAL_ADDRESS ImageAddress;
UINT64 ImageSize;
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PeCoffImage;
EFI_PHYSICAL_ADDRESS ImageAddress;
UINT64 ImageSize;
//
// Find DXE core file from DXE FV
@@ -353,7 +355,7 @@ UniversalLoadDxeCore (
return Status;
}
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
return EFI_SUCCESS;
}

25
UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c
View File

@@ -25,12 +25,12 @@
VOID *
EFIAPI
AllocatePages (
IN UINTN Pages
IN UINTN Pages
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS Offset;
EFI_HOB_HANDOFF_INFO_TABLE *HobTable;
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS Offset;
EFI_HOB_HANDOFF_INFO_TABLE *HobTable;
Hob.Raw = GetHobList ();
HobTable = Hob.HandoffInformationTable;
@@ -102,12 +102,12 @@ FreePages (
VOID *
EFIAPI
AllocateAlignedPages (
IN UINTN Pages,
IN UINTN Alignment
IN UINTN Pages,
IN UINTN Alignment
)
{
VOID *Memory;
UINTN AlignmentMask;
VOID *Memory;
UINTN AlignmentMask;
//
// Alignment must be a power of two or zero.
@@ -134,10 +134,9 @@ AllocateAlignedPages (
AlignmentMask = Alignment - 1;
}
return (VOID *) (UINTN) (((UINTN) Memory + AlignmentMask) & ~AlignmentMask);
return (VOID *)(UINTN)(((UINTN)Memory + AlignmentMask) & ~AlignmentMask);
}
/**
Allocates a buffer of type EfiBootServicesData.
@@ -156,7 +155,7 @@ AllocatePool (
IN UINTN AllocationSize
)
{
EFI_HOB_MEMORY_POOL *Hob;
EFI_HOB_MEMORY_POOL *Hob;
if (AllocationSize > 0x4000) {
// Please use AllocatePages for big allocations
@@ -186,7 +185,7 @@ AllocateZeroPool (
IN UINTN AllocationSize
)
{
VOID *Buffer;
VOID *Buffer;
Buffer = AllocatePool (AllocationSize);
if (Buffer == NULL) {
@@ -197,5 +196,3 @@ AllocateZeroPool (
return Buffer;
}

342
UefiPayloadPkg/UefiPayloadEntry/PrintHob.c
View File

@@ -12,22 +12,22 @@
#include <Guid/AcpiBoardInfoGuid.h>
#include <Guid/BootManagerMenu.h>
#define ROW_LIMITER 16
#define ROW_LIMITER 16
typedef
EFI_STATUS
(*HOB_PRINT_HANDLER) (
IN VOID *Hob,
IN UINT16 HobLength
);
IN VOID *Hob,
IN UINT16 HobLength
);
typedef struct{
typedef struct {
UINT16 Type;
CHAR8 *Name;
HOB_PRINT_HANDLER PrintHandler;
} HOB_PRINT_HANDLER_TABLE;
CHAR8 * mMemoryTypeStr[] = {
CHAR8 *mMemoryTypeStr[] = {
"EfiReservedMemoryType",
"EfiLoaderCode",
"EfiLoaderData",
@@ -46,23 +46,23 @@ CHAR8 * mMemoryTypeStr[] = {
"EfiMaxMemoryType"
};
CHAR8 * mResource_Type_List[] = {
"EFI_RESOURCE_SYSTEM_MEMORY ", //0x00000000
"EFI_RESOURCE_MEMORY_MAPPED_IO ", //0x00000001
"EFI_RESOURCE_IO ", //0x00000002
"EFI_RESOURCE_FIRMWARE_DEVICE ", //0x00000003
"EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", //0x00000004
"EFI_RESOURCE_MEMORY_RESERVED ", //0x00000005
"EFI_RESOURCE_IO_RESERVED ", //0x00000006
"EFI_RESOURCE_MAX_MEMORY_TYPE " //0x00000007
CHAR8 *mResource_Type_List[] = {
"EFI_RESOURCE_SYSTEM_MEMORY ", // 0x00000000
"EFI_RESOURCE_MEMORY_MAPPED_IO ", // 0x00000001
"EFI_RESOURCE_IO ", // 0x00000002
"EFI_RESOURCE_FIRMWARE_DEVICE ", // 0x00000003
"EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", // 0x00000004
"EFI_RESOURCE_MEMORY_RESERVED ", // 0x00000005
"EFI_RESOURCE_IO_RESERVED ", // 0x00000006
"EFI_RESOURCE_MAX_MEMORY_TYPE " // 0x00000007
};
typedef
EFI_STATUS
(*GUID_HOB_PRINT) (
IN UINT8 *HobRaw,
IN UINT16 HobLength
);
IN UINT8 *HobRaw,
IN UINT16 HobLength
);
typedef struct {
EFI_GUID *Guid;
@@ -70,12 +70,11 @@ typedef struct {
CHAR8 *GuidName;
} GUID_HOB_PRINT_HANDLE;
typedef struct{
EFI_GUID *Guid;
CHAR8 *Type;
typedef struct {
EFI_GUID *Guid;
CHAR8 *Type;
} PRINT_MEMORY_ALLOCCATION_HOB;
/**
Print the Hex value of a given range.
@param[in] DataStart A pointer to the start of data to be printed.
@@ -84,8 +83,8 @@ typedef struct{
**/
EFI_STATUS
PrintHex (
IN UINT8 *DataStart,
IN UINT16 DataSize
IN UINT8 *DataStart,
IN UINT16 DataSize
)
{
UINTN Index1;
@@ -95,10 +94,11 @@ PrintHex (
StartAddr = DataStart;
for (Index1 = 0; Index1 * ROW_LIMITER < DataSize; Index1++) {
DEBUG ((DEBUG_VERBOSE, " 0x%04p:", (DataStart - StartAddr)));
for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++){
for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++) {
DEBUG ((DEBUG_VERBOSE, " %02x", *DataStart));
DataStart++;
}
DEBUG ((DEBUG_VERBOSE, "\n"));
}
@@ -113,15 +113,16 @@ PrintHex (
@retval EFI_SUCCESS If it completed successfully.
**/
EFI_STATUS
PrintHandOffHob(
IN VOID *HobStart,
IN UINT16 HobLength
PrintHandOffHob (
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.HandoffInformationTable));
DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));
DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));
DEBUG ((DEBUG_INFO, " EfiMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryTop));
DEBUG ((DEBUG_INFO, " EfiMemoryBottom = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryBottom));
DEBUG ((DEBUG_INFO, " EfiFreeMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiFreeMemoryTop));
@@ -138,15 +139,15 @@ PrintHandOffHob(
**/
EFI_STATUS
PrintMemoryAllocationHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
if(CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {
if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocationStack));
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_MEMORY_ALLOCATION_STACK\n"));
} else if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocBspStoreGuid)) {
@@ -161,9 +162,10 @@ PrintMemoryAllocationHob (
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocation));
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_TYPE_MEMORY_ALLOCATION\n"));
}
DEBUG ((DEBUG_INFO, " MemoryBaseAddress = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress));
DEBUG ((DEBUG_INFO, " MemoryLength = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength));
DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));
DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));
return EFI_SUCCESS;
}
@@ -175,20 +177,21 @@ PrintMemoryAllocationHob (
**/
EFI_STATUS
PrintResourceDiscriptorHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.ResourceDescriptor));
DEBUG ((DEBUG_INFO, " ResourceType = %a\n", mResource_Type_List[Hob.ResourceDescriptor->ResourceType]));
if(!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {
if (!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {
DEBUG ((DEBUG_INFO, " Owner = %g\n", Hob.ResourceDescriptor->Owner));
}
DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG ((DEBUG_INFO, " PhysicalStart = 0x%lx\n", Hob.ResourceDescriptor->PhysicalStart));
DEBUG ((DEBUG_INFO, " ResourceLength = 0x%lx\n", Hob.ResourceDescriptor->ResourceLength));
return EFI_SUCCESS;
@@ -204,16 +207,17 @@ PrintResourceDiscriptorHob (
**/
EFI_STATUS
PrintAcpiGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= AcpiTableHob->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));
DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64) AcpiTableHob->Rsdp));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));
DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64)AcpiTableHob->Rsdp));
return EFI_SUCCESS;
}
@@ -226,18 +230,19 @@ PrintAcpiGuidHob (
**/
EFI_STATUS
PrintSerialGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SerialPortInfo->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));
DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));
DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));
DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));
DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));
DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));
DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));
DEBUG ((DEBUG_INFO, " RegisterBase = 0x%lx\n", SerialPortInfo->RegisterBase));
return EFI_SUCCESS;
}
@@ -250,16 +255,17 @@ PrintSerialGuidHob (
**/
EFI_STATUS
PrintSmbios3GuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));
return EFI_SUCCESS;
}
@@ -272,16 +278,17 @@ PrintSmbios3GuidHob (
**/
EFI_STATUS
PrintSmbiosTablGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));
return EFI_SUCCESS;
}
@@ -294,16 +301,17 @@ PrintSmbiosTablGuidHob (
**/
EFI_STATUS
PrintAcpiBoardInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
ACPI_BOARD_INFO *AcpBoardInfo;
AcpBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (HobRaw);
ACPI_BOARD_INFO *AcpBoardInfo;
AcpBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*AcpBoardInfo));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));
DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));
DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));
DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));
DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, " PmEvtBase = 0x%lx\n", AcpBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, " PmGpeEnBase = 0x%lx\n", AcpBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, " PmCtrlRegBase = 0x%lx\n", AcpBoardInfo->PmCtrlRegBase));
@@ -323,29 +331,30 @@ PrintAcpiBoardInfoGuidHob (
**/
EFI_STATUS
PrintPciRootBridgeInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;
UINTN Index;
UINTN Length;
Index = 0;
PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;
UINTN Index;
UINTN Length;
Index = 0;
PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);
ASSERT (HobLength >= Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", PciRootBridges->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", PciRootBridges->Header.Length));
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", PciRootBridges->Count));
DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));
DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));
while(Index < PciRootBridges->Count) {
while (Index < PciRootBridges->Count) {
DEBUG ((DEBUG_INFO, " Root Bridge Index[%d]:\n", Index));
DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));
DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));
DEBUG ((DEBUG_INFO, " Supports = 0x%lx\n", PciRootBridges->RootBridge[Index].Supports));
DEBUG ((DEBUG_INFO, " Attributes = 0x%lx\n", PciRootBridges->RootBridge[Index].Attributes));
DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));
DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));
DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));
DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));
DEBUG ((DEBUG_INFO, " AllocationAttributes = 0x%lx\n", PciRootBridges->RootBridge[Index].AllocationAttributes));
DEBUG ((DEBUG_INFO, " Bus.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Base));
DEBUG ((DEBUG_INFO, " Bus.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Limit));
@@ -365,8 +374,9 @@ PrintPciRootBridgeInfoGuidHob (
DEBUG ((DEBUG_INFO, " PMemAbove4G.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Base));
DEBUG ((DEBUG_INFO, " PMemAbove4G.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Limit));
DEBUG ((DEBUG_INFO, " PMemAbove4G.Translation = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Translation));
Index+=1;
Index += 1;
}
return EFI_SUCCESS;
}
@@ -379,28 +389,29 @@ PrintPciRootBridgeInfoGuidHob (
**/
EFI_STATUS
PrintExtraDataGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINTN Index;
UINTN Length;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINTN Index;
UINTN Length;
Index = 0;
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
ASSERT (HobLength >= Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", ExtraData->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", ExtraData->Header.Length));
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", ExtraData->Count));
while (Index < ExtraData->Count) {
DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index,ExtraData->Entry[Index].Identifier));
DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Base));
DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Size));
Index+=1;
DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index, ExtraData->Entry[Index].Identifier));
DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Base));
DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Size));
Index += 1;
}
return EFI_SUCCESS;
}
@@ -413,13 +424,13 @@ PrintExtraDataGuidHob (
**/
EFI_STATUS
PrintMemoryTypeInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;
EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;
MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *) GET_GUID_HOB_DATA (HobRaw);
MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*MemoryTypeInfo));
DEBUG ((DEBUG_INFO, " Type = 0x%x\n", MemoryTypeInfo->Type));
DEBUG ((DEBUG_INFO, " NumberOfPages = 0x%x\n", MemoryTypeInfo->NumberOfPages));
@@ -434,17 +445,17 @@ PrintMemoryTypeInfoGuidHob (
**/
EFI_STATUS
PrintBootManagerMenuGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;
UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *) GET_GUID_HOB_DATA (HobRaw);
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*BootManagerMenuFile));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", BootManagerMenuFile->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", BootManagerMenuFile->Header.Length));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));
return EFI_SUCCESS;
}
@@ -452,16 +463,16 @@ PrintBootManagerMenuGuidHob (
// Mappint table for dump Guid Hob information.
// This table can be easily extented.
//
GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
{&gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)"},
{&gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)"},
{&gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)"},
{&gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)"},
{&gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)"},
{&gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)"},
{&gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)"},
{&gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)"},
{&gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)"}
GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
{ &gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)" },
{ &gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)" },
{ &gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)" },
{ &gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)" },
{ &gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)" },
{ &gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)" },
{ &gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)" },
{ &gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)" },
{ &gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)" }
};
/**
@@ -472,15 +483,15 @@ GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
**/
EFI_STATUS
PrintGuidHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN Index;
EFI_STATUS Status;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (Hob.Guid));
for (Index = 0; Index < ARRAY_SIZE (GuidHobPrintHandleTable); Index++) {
@@ -490,6 +501,7 @@ PrintGuidHob (
return Status;
}
}
DEBUG ((DEBUG_INFO, " Name = %g\n", &Hob.Guid->Name));
PrintHex (GET_GUID_HOB_DATA (Hob.Raw), GET_GUID_HOB_DATA_SIZE (Hob.Raw));
return EFI_SUCCESS;
@@ -503,13 +515,13 @@ PrintGuidHob (
**/
EFI_STATUS
PrintFvHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume->BaseAddress));
@@ -525,13 +537,13 @@ PrintFvHob (
**/
EFI_STATUS
PrintCpuHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.Cpu));
DEBUG ((DEBUG_INFO, " SizeOfMemorySpace = 0x%lx\n", Hob.Cpu->SizeOfMemorySpace));
@@ -547,8 +559,8 @@ PrintCpuHob (
**/
EFI_STATUS
PrintMemoryPoolHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
return EFI_SUCCESS;
@@ -562,19 +574,19 @@ PrintMemoryPoolHob (
**/
EFI_STATUS
PrintFv2Hob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume2));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume2->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume2->Length));
DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));
DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));
return EFI_SUCCESS;
}
@@ -586,17 +598,17 @@ PrintFv2Hob (
**/
EFI_STATUS
PrintCapsuleHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.Capsule));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.Capsule->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));
return EFI_SUCCESS;
}
@@ -608,40 +620,40 @@ PrintCapsuleHob (
**/
EFI_STATUS
PrintFv3Hob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume3));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume3->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume3->Length));
DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));
DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));
DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));
DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));
DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));
DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));
return EFI_SUCCESS;
}
//
// Mappint table from Hob type to Hob print function.
//
HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
{EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob},
{EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob},
{EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob},
{EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob},
{EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob},
{EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob},
{EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob},
{EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob},
{EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob},
{EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob}
HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
{ EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob },
{ EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob },
{ EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob },
{ EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob },
{ EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob },
{ EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob },
{ EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob },
{ EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob },
{ EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob },
{ EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob }
};
/**
Print all HOBs info from the HOB list.
@param[in] HobStart A pointer to the HOB list
@@ -649,15 +661,16 @@ HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
**/
VOID
PrintHob (
IN CONST VOID *HobStart
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN Count;
UINTN Index;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
DEBUG ((DEBUG_INFO, "Print all Hob information from Hob 0x%p\n", Hob.Raw));
Count = 0;
@@ -667,18 +680,21 @@ PrintHob (
while (!END_OF_HOB_LIST (Hob)) {
for (Index = 0; Index < ARRAY_SIZE (mHobHandles); Index++) {
if (Hob.Header->HobType == mHobHandles[Index].Type) {
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *) HobStart), Hob.Header->HobLength));
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));
mHobHandles[Index].PrintHandler (Hob.Raw, Hob.Header->HobLength);
break;
}
}
if (Index == ARRAY_SIZE (mHobHandles)) {
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %d, Offset = 0x%p, Length = 0x%x\n", Count, Hob.Header->HobType, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));
DEBUG ((DEBUG_INFO, " Unkown Hob type\n"));
PrintHex (Hob.Raw, Hob.Header->HobLength);
}
Count++;
Hob.Raw = GET_NEXT_HOB (Hob);
}
DEBUG ((DEBUG_INFO, "There are totally %d Hobs, the End Hob address is %p\n", Count, Hob.Raw));
}

138
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
View File

@@ -7,7 +7,7 @@
#include "UefiPayloadEntry.h"
STATIC UINT32 mTopOfLowerUsableDram = 0;
STATIC UINT32 mTopOfLowerUsableDram = 0;
/**
Callback function to build resource descriptor HOB
@@ -24,8 +24,8 @@ STATIC UINT32 mTopOfLowerUsableDram = 0;
**/
EFI_STATUS
MemInfoCallbackMmio (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
EFI_PHYSICAL_ADDRESS Base;
@@ -42,7 +42,7 @@ MemInfoCallbackMmio (
//
// Skip types already handled in MemInfoCallback
//
if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type == E820_ACPI) {
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI)) {
return EFI_SUCCESS;
}
@@ -65,8 +65,8 @@ MemInfoCallbackMmio (
Type = EFI_RESOURCE_MEMORY_RESERVED;
}
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
@@ -77,10 +77,11 @@ MemInfoCallbackMmio (
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);
DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
if (MemoryMapEntry->Type == E820_UNUSABLE ||
MemoryMapEntry->Type == E820_DISABLED) {
if ((MemoryMapEntry->Type == E820_UNUSABLE) ||
(MemoryMapEntry->Type == E820_DISABLED))
{
BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);
} else if (MemoryMapEntry->Type == E820_PMEM) {
BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);
@@ -89,7 +90,6 @@ MemInfoCallbackMmio (
return EFI_SUCCESS;
}
/**
Callback function to find TOLUD (Top of Lower Usable DRAM)
@@ -103,8 +103,8 @@ MemInfoCallbackMmio (
**/
EFI_STATUS
FindToludCallback (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
//
@@ -120,7 +120,8 @@ FindToludCallback (
// Skip memory types not RAM or reserved
//
if ((MemoryMapEntry->Type == E820_UNUSABLE) || (MemoryMapEntry->Type == E820_DISABLED) ||
(MemoryMapEntry->Type == E820_PMEM)) {
(MemoryMapEntry->Type == E820_PMEM))
{
return EFI_SUCCESS;
}
@@ -132,7 +133,8 @@ FindToludCallback (
}
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI) ||
(MemoryMapEntry->Type == E820_NVS)) {
(MemoryMapEntry->Type == E820_NVS))
{
//
// It's usable DRAM. Update TOLUD.
//
@@ -154,7 +156,6 @@ FindToludCallback (
return EFI_SUCCESS;
}
/**
Callback function to build resource descriptor HOB
@@ -168,8 +169,8 @@ FindToludCallback (
**/
EFI_STATUS
MemInfoCallback (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
EFI_PHYSICAL_ADDRESS Base;
@@ -182,13 +183,14 @@ MemInfoCallback (
// It will be added later.
//
if ((MemoryMapEntry->Type != E820_RAM) && (MemoryMapEntry->Type != E820_ACPI) &&
(MemoryMapEntry->Type != E820_NVS)) {
(MemoryMapEntry->Type != E820_NVS))
{
return RETURN_SUCCESS;
}
Type = EFI_RESOURCE_SYSTEM_MEMORY;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Type = EFI_RESOURCE_SYSTEM_MEMORY;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
@@ -199,7 +201,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);
DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
if (MemoryMapEntry->Type == E820_ACPI) {
BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);
@@ -210,8 +212,6 @@ MemInfoCallback (
return RETURN_SUCCESS;
}
/**
It will build HOBs based on information from bootloaders.
@@ -223,31 +223,32 @@ BuildHobFromBl (
VOID
)
{
EFI_STATUS Status;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
EFI_STATUS Status;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
//
// First find TOLUD
//
DEBUG ((DEBUG_INFO , "Guessing Top of Lower Usable DRAM:\n"));
DEBUG ((DEBUG_INFO, "Guessing Top of Lower Usable DRAM:\n"));
Status = ParseMemoryInfo (FindToludCallback, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));
DEBUG ((DEBUG_INFO, "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));
//
// Parse memory info and build memory HOBs for Usable RAM
//
DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for usable memory:\n"));
DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for usable memory:\n"));
Status = ParseMemoryInfo (MemInfoCallback, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@@ -262,7 +263,6 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));
}
Status = ParseGfxDeviceInfo (&GfxDeviceInfo);
if (!EFI_ERROR (Status)) {
NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));
@@ -271,16 +271,15 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));
}
//
// Creat SmBios table Hob
//
SmBiosTableHob = BuildGuidHob (&gUniversalPayloadSmbiosTableGuid, sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE));
ASSERT (SmBiosTableHob != NULL);
SmBiosTableHob->Header.Revision = UNIVERSAL_PAYLOAD_SMBIOS_TABLE_REVISION;
SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);
SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);
DEBUG ((DEBUG_INFO, "Create smbios table gUniversalPayloadSmbiosTableGuid guid hob\n"));
Status = ParseSmbiosTable(SmBiosTableHob);
Status = ParseSmbiosTable (SmBiosTableHob);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "Detected Smbios Table at 0x%lx\n", SmBiosTableHob->SmBiosEntryPoint));
}
@@ -291,9 +290,9 @@ BuildHobFromBl (
AcpiTableHob = BuildGuidHob (&gUniversalPayloadAcpiTableGuid, sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE));
ASSERT (AcpiTableHob != NULL);
AcpiTableHob->Header.Revision = UNIVERSAL_PAYLOAD_ACPI_TABLE_REVISION;
AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);
AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);
DEBUG ((DEBUG_INFO, "Create ACPI table gUniversalPayloadAcpiTableGuid guid hob\n"));
Status = ParseAcpiTableInfo(AcpiTableHob);
Status = ParseAcpiTableInfo (AcpiTableHob);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "Detected ACPI Table at 0x%lx\n", AcpiTableHob->Rsdp));
}
@@ -307,9 +306,9 @@ BuildHobFromBl (
//
// Parse memory info and build memory HOBs for reserved DRAM and MMIO
//
DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for reserved memory:\n"));
DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for reserved memory:\n"));
Status = ParseMemoryInfo (MemInfoCallbackMmio, AcpiBoardInfo);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@@ -333,7 +332,6 @@ BuildHobFromBl (
return EFI_SUCCESS;
}
/**
This function will build some generic HOBs that doesn't depend on information from bootloaders.
@@ -343,9 +341,9 @@ BuildGenericHob (
VOID
)
{
UINT32 RegEax;
UINT8 PhysicalAddressBits;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
UINT32 RegEax;
UINT8 PhysicalAddressBits;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
// The UEFI payload FV
BuildMemoryAllocationHob (PcdGet32 (PcdPayloadFdMemBase), PcdGet32 (PcdPayloadFdMemSize), EfiBootServicesData);
@@ -356,9 +354,9 @@ BuildGenericHob (
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
PhysicalAddressBits = (UINT8)RegEax;
} else {
PhysicalAddressBits = 36;
PhysicalAddressBits = 36;
}
BuildCpuHob (PhysicalAddressBits, 16);
@@ -367,17 +365,15 @@ BuildGenericHob (
// Report Local APIC range, cause sbl HOB to be NULL, comment now
//
ResourceAttribute = (
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_MAPPED_IO, ResourceAttribute, 0xFEC80000, SIZE_512KB);
BuildMemoryAllocationHob ( 0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);
BuildMemoryAllocationHob (0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);
}
/**
Entry point to the C language phase of UEFI payload.
@@ -388,16 +384,16 @@ BuildGenericHob (
EFI_STATUS
EFIAPI
_ModuleEntryPoint (
IN UINTN BootloaderParameter
IN UINTN BootloaderParameter
)
{
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
UINTN MemBase;
UINTN HobMemBase;
UINTN HobMemTop;
EFI_PEI_HOB_POINTERS Hob;
SERIAL_PORT_INFO SerialPortInfo;
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
UINTN MemBase;
UINTN HobMemBase;
UINTN HobMemTop;
EFI_PEI_HOB_POINTERS Hob;
SERIAL_PORT_INFO SerialPortInfo;
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *UniversalSerialPort;
Status = PcdSet64S (PcdBootloaderParameter, BootloaderParameter);
@@ -422,7 +418,7 @@ _ModuleEntryPoint (
ASSERT (UniversalSerialPort != NULL);
UniversalSerialPort->Header.Revision = UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION;
UniversalSerialPort->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO);
UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1)?FALSE:TRUE;
UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1) ? FALSE : TRUE;
UniversalSerialPort->RegisterBase = SerialPortInfo.BaseAddr;
UniversalSerialPort->BaudRate = SerialPortInfo.Baud;
UniversalSerialPort->RegisterStride = (UINT8)SerialPortInfo.RegWidth;
@@ -430,7 +426,7 @@ _ModuleEntryPoint (
// The library constructors might depend on serial port, so call it after serial port hob
ProcessLibraryConstructorList ();
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));
// Build HOB based on information from Bootloader
Status = BuildHobFromBl ();
@@ -452,9 +448,9 @@ _ModuleEntryPoint (
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);
HandOffToDxeCore (DxeCoreEntryPoint, Hob);
// Should not get here

55
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
View File

@@ -42,15 +42,14 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
#define E820_DISABLED 6
#define E820_PMEM 7
#define E820_UNDEFINED 8
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
#define E820_DISABLED 6
#define E820_PMEM 7
#define E820_UNDEFINED 8
/**
Auto-generated function that calls the library constructors for all of the module's
@@ -75,8 +74,8 @@ ProcessLibraryConstructorList (
VOID *
EFIAPI
CreateHob (
IN UINT16 HobType,
IN UINT16 HobLength
IN UINT16 HobType,
IN UINT16 HobLength
);
/**
@@ -89,8 +88,8 @@ CreateHob (
VOID
EFIAPI
UpdateStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
/**
@@ -108,13 +107,13 @@ UpdateStackHob (
@return The pointer to the handoff HOB table.
**/
EFI_HOB_HANDOFF_INFO_TABLE*
EFI_HOB_HANDOFF_INFO_TABLE *
EFIAPI
HobConstructor (
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
);
/**
@@ -127,7 +126,7 @@ HobConstructor (
**/
EFI_STATUS
LoadDxeCore (
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
);
/**
@@ -141,8 +140,8 @@ LoadDxeCore (
**/
EFI_STATUS
UniversalLoadDxeCore (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
);
/**
@@ -156,13 +155,13 @@ UniversalLoadDxeCore (
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
);
EFI_STATUS
FixUpPcdDatabase (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
);
/**
@@ -179,9 +178,9 @@ FixUpPcdDatabase (
**/
EFI_STATUS
FileFindSection (
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
);
/**
@@ -214,7 +213,7 @@ FvFindFileByTypeGuid (
**/
ACPI_BOARD_INFO *
BuildHobFromAcpi (
IN UINT64 AcpiTableBase
IN UINT64 AcpiTableBase
);
#endif

158
UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
View File

@@ -7,7 +7,7 @@
#include "UefiPayloadEntry.h"
#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
EFI_RESOURCE_ATTRIBUTE_TESTED | \
EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED | \
@@ -19,7 +19,7 @@
EFI_RESOURCE_ATTRIBUTE_64_BIT_IO | \
EFI_RESOURCE_ATTRIBUTE_PERSISTENT )
#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
EFI_RESOURCE_ATTRIBUTE_TESTED )
@@ -32,7 +32,7 @@ extern VOID *mHobList;
**/
VOID
PrintHob (
IN CONST VOID *HobStart
IN CONST VOID *HobStart
);
/**
@@ -48,17 +48,17 @@ PrintHob (
**/
EFI_STATUS
FixUpPcdDatabase (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
)
{
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PcdRawData;
PEI_PCD_DATABASE *PeiDatabase;
PEI_PCD_DATABASE *UplDatabase;
EFI_HOB_GUID_TYPE *GuidHob;
DYNAMICEX_MAPPING *ExMapTable;
UINTN Index;
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PcdRawData;
PEI_PCD_DATABASE *PeiDatabase;
PEI_PCD_DATABASE *UplDatabase;
EFI_HOB_GUID_TYPE *GuidHob;
DYNAMICEX_MAPPING *ExMapTable;
UINTN Index;
GuidHob = GetFirstGuidHob (&gPcdDataBaseHobGuid);
if (GuidHob == NULL) {
@@ -67,7 +67,8 @@ FixUpPcdDatabase (
//
return EFI_SUCCESS;
}
PeiDatabase = (PEI_PCD_DATABASE *) GET_GUID_HOB_DATA (GuidHob);
PeiDatabase = (PEI_PCD_DATABASE *)GET_GUID_HOB_DATA (GuidHob);
DEBUG ((DEBUG_INFO, "Find the Pei PCD data base, the total local token number is %d\n", PeiDatabase->LocalTokenCount));
Status = FvFindFileByTypeGuid (DxeFv, EFI_FV_FILETYPE_DRIVER, PcdGetPtr (PcdPcdDriverFile), &FileHeader);
@@ -75,18 +76,20 @@ FixUpPcdDatabase (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_RAW, &PcdRawData);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
return Status;
}
UplDatabase = (PEI_PCD_DATABASE *) PcdRawData;
ExMapTable = (DYNAMICEX_MAPPING *) (UINTN) ((UINTN) PcdRawData + UplDatabase->ExMapTableOffset);
UplDatabase = (PEI_PCD_DATABASE *)PcdRawData;
ExMapTable = (DYNAMICEX_MAPPING *)(UINTN)((UINTN)PcdRawData + UplDatabase->ExMapTableOffset);
for (Index = 0; Index < UplDatabase->ExTokenCount; Index++) {
ExMapTable[Index].TokenNumber += PeiDatabase->LocalTokenCount;
}
DEBUG ((DEBUG_INFO, "Fix up UPL PCD database successfully\n"));
return EFI_SUCCESS;
}
@@ -98,14 +101,15 @@ FixUpPcdDatabase (
**/
VOID
AddNewHob (
IN EFI_PEI_HOB_POINTERS *Hob
IN EFI_PEI_HOB_POINTERS *Hob
)
{
EFI_PEI_HOB_POINTERS NewHob;
EFI_PEI_HOB_POINTERS NewHob;
if (Hob->Raw == NULL) {
return;
}
NewHob.Header = CreateHob (Hob->Header->HobType, Hob->Header->HobLength);
if (NewHob.Header != NULL) {
@@ -124,15 +128,15 @@ AddNewHob (
**/
EFI_HOB_RESOURCE_DESCRIPTOR *
FindResourceDescriptorByRange (
IN VOID *HobList,
IN EFI_PHYSICAL_ADDRESS Base,
IN EFI_PHYSICAL_ADDRESS Top
IN VOID *HobList,
IN EFI_PHYSICAL_ADDRESS Base,
IN EFI_PHYSICAL_ADDRESS Top
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
//
// Skip all HOBs except Resource Descriptor HOBs
//
@@ -147,6 +151,7 @@ FindResourceDescriptorByRange (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@@ -157,11 +162,14 @@ FindResourceDescriptorByRange (
if (Base < ResourceHob->PhysicalStart) {
continue;
}
if (Top > (ResourceHob->PhysicalStart + ResourceHob->ResourceLength)) {
continue;
}
return ResourceHob;
}
return NULL;
}
@@ -176,17 +184,18 @@ FindResourceDescriptorByRange (
**/
EFI_HOB_RESOURCE_DESCRIPTOR *
FindAnotherHighestBelow4GResourceDescriptor (
IN VOID *HobList,
IN UINTN MinimalNeededSize,
IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob
IN VOID *HobList,
IN UINTN MinimalNeededSize,
IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;
ReturnResourceHob = NULL;
for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
//
// Skip all HOBs except Resource Descriptor HOBs
//
@@ -201,6 +210,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@@ -211,12 +221,14 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob == ExceptResourceHob) {
continue;
}
//
// Skip Resource Descriptor HOBs that are beyond 4G
//
if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) > BASE_4GB) {
continue;
}
//
// Skip Resource Descriptor HOBs that are too small
//
@@ -235,6 +247,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
}
}
}
return ReturnResourceHob;
}
@@ -253,39 +266,38 @@ BuildHobs (
OUT EFI_FIRMWARE_VOLUME_HEADER **DxeFv
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN MinimalNeededSize;
EFI_PHYSICAL_ADDRESS FreeMemoryBottom;
EFI_PHYSICAL_ADDRESS FreeMemoryTop;
EFI_PHYSICAL_ADDRESS MemoryBottom;
EFI_PHYSICAL_ADDRESS MemoryTop;
EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINT8 *GuidHob;
EFI_HOB_FIRMWARE_VOLUME *FvHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_HOB_POINTERS Hob;
UINTN MinimalNeededSize;
EFI_PHYSICAL_ADDRESS FreeMemoryBottom;
EFI_PHYSICAL_ADDRESS FreeMemoryTop;
EFI_PHYSICAL_ADDRESS MemoryBottom;
EFI_PHYSICAL_ADDRESS MemoryTop;
EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINT8 *GuidHob;
EFI_HOB_FIRMWARE_VOLUME *FvHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;
ACPI_BOARD_INFO *AcpiBoardInfo;
Hob.Raw = (UINT8 *) BootloaderParameter;
Hob.Raw = (UINT8 *)BootloaderParameter;
MinimalNeededSize = FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
ASSERT (Hob.Raw != NULL);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);
//
// Try to find Resource Descriptor HOB that contains Hob range EfiMemoryBottom..EfiMemoryTop
//
PhitResourceHob = FindResourceDescriptorByRange(Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);
PhitResourceHob = FindResourceDescriptorByRange (Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);
if (PhitResourceHob == NULL) {
//
// Boot loader's Phit Hob is not in an available Resource Descriptor, find another Resource Descriptor for new Phit Hob
//
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, NULL);
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, NULL);
if (ResourceHob == NULL) {
return EFI_NOT_FOUND;
}
@@ -315,7 +327,7 @@ BuildHobs (
// In the Resource Descriptor HOB contains boot loader Hob, there is no enough free memory size for payload hob
// Find another Resource Descriptor Hob
//
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, PhitResourceHob);
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, PhitResourceHob);
if (ResourceHob == NULL) {
return EFI_NOT_FOUND;
}
@@ -325,7 +337,8 @@ BuildHobs (
FreeMemoryTop = ResourceHob->PhysicalStart + ResourceHob->ResourceLength;
MemoryTop = FreeMemoryTop;
}
HobConstructor ((VOID *) (UINTN) MemoryBottom, (VOID *) (UINTN) MemoryTop, (VOID *) (UINTN) FreeMemoryBottom, (VOID *) (UINTN) FreeMemoryTop);
HobConstructor ((VOID *)(UINTN)MemoryBottom, (VOID *)(UINTN)MemoryTop, (VOID *)(UINTN)FreeMemoryBottom, (VOID *)(UINTN)FreeMemoryTop);
//
// From now on, mHobList will point to the new Hob range.
//
@@ -333,7 +346,7 @@ BuildHobs (
//
// Create an empty FvHob for the DXE FV that contains DXE core.
//
BuildFvHob ((EFI_PHYSICAL_ADDRESS) 0, 0);
BuildFvHob ((EFI_PHYSICAL_ADDRESS)0, 0);
//
// Since payload created new Hob, move all hobs except PHIT from boot loader hob list.
//
@@ -342,27 +355,28 @@ BuildHobs (
// Add this hob to payload HOB
AddNewHob (&Hob);
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
//
// Get DXE FV location
//
GuidHob = GetFirstGuidHob(&gUniversalPayloadExtraDataGuid);
GuidHob = GetFirstGuidHob (&gUniversalPayloadExtraDataGuid);
ASSERT (GuidHob != NULL);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (GuidHob);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (GuidHob);
ASSERT (ExtraData->Count == 1);
ASSERT (AsciiStrCmp (ExtraData->Entry[0].Identifier, "uefi_fv") == 0);
*DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) ExtraData->Entry[0].Base;
*DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)ExtraData->Entry[0].Base;
ASSERT ((*DxeFv)->FvLength == ExtraData->Entry[0].Size);
//
// Create guid hob for acpi board information
//
GuidHob = GetFirstGuidHob(&gUniversalPayloadAcpiTableGuid);
GuidHob = GetFirstGuidHob (&gUniversalPayloadAcpiTableGuid);
if (GuidHob != NULL) {
AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (GuidHob);
AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (GuidHob);
AcpiBoardInfo = BuildHobFromAcpi ((UINT64)AcpiTable->Rsdp);
ASSERT (AcpiBoardInfo != NULL);
}
@@ -371,9 +385,9 @@ BuildHobs (
// Update DXE FV information to first fv hob in the hob list, which
// is the empty FvHob created before.
//
FvHob = GetFirstHob (EFI_HOB_TYPE_FV);
FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) *DxeFv;
FvHob->Length = (*DxeFv)->FvLength;
FvHob = GetFirstHob (EFI_HOB_TYPE_FV);
FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)*DxeFv;
FvHob->Length = (*DxeFv)->FvLength;
return EFI_SUCCESS;
}
@@ -387,28 +401,28 @@ BuildHobs (
EFI_STATUS
EFIAPI
_ModuleEntryPoint (
IN UINTN BootloaderParameter
IN UINTN BootloaderParameter
)
{
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
EFI_PEI_HOB_POINTERS Hob;
EFI_FIRMWARE_VOLUME_HEADER *DxeFv;
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
EFI_PEI_HOB_POINTERS Hob;
EFI_FIRMWARE_VOLUME_HEADER *DxeFv;
mHobList = (VOID *) BootloaderParameter;
mHobList = (VOID *)BootloaderParameter;
DxeFv = NULL;
// Call constructor for all libraries
ProcessLibraryConstructorList ();
DEBUG ((DEBUG_INFO, "Entering Universal Payload...\n"));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));
DEBUG_CODE (
//
// Dump the Hobs from boot loader
//
PrintHob (mHobList);
);
);
// Initialize floating point operating environment to be compliant with UEFI spec.
InitializeFloatingPointUnits ();
@@ -425,9 +439,9 @@ _ModuleEntryPoint (
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);
HandOffToDxeCore (DxeCoreEntryPoint, Hob);
// Should not get here

31
UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
View File

@@ -15,8 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/HobLib.h>
#include "X64/VirtualMemory.h"
#include "UefiPayloadEntry.h"
#define STACK_SIZE 0x20000
#define STACK_SIZE 0x20000
/**
Transfers control to DxeCore.
@@ -31,15 +30,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
)
{
VOID *BaseOfStack;
VOID *TopOfStack;
UINTN PageTables;
VOID *GhcbBase;
UINTN GhcbSize;
VOID *BaseOfStack;
VOID *TopOfStack;
UINTN PageTables;
VOID *GhcbBase;
UINTN GhcbSize;
//
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
@@ -49,7 +48,6 @@ HandOffToDxeCore (
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
}
//
// Allocate 128KB for the Stack
//
@@ -60,7 +58,7 @@ HandOffToDxeCore (
// Compute the top of the stack we were allocated. Pre-allocate a UINTN
// for safety.
//
TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
//
@@ -74,8 +72,12 @@ HandOffToDxeCore (
//
// Create page table and save PageMapLevel4 to CR3
//
PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
(EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
PageTables = CreateIdentityMappingPageTables (
(EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,
STACK_SIZE,
(EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,
GhcbSize
);
} else {
//
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
@@ -85,7 +87,6 @@ HandOffToDxeCore (
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
}
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
AsmWriteCr3 (PageTables);
}
@@ -93,7 +94,7 @@ HandOffToDxeCore (
//
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
//
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
//
// Transfer the control to the entry point of DxeCore.

382
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
View File

@@ -35,7 +35,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Global variable to keep track current available memory used as page table.
//
PAGE_TABLE_POOL *mPageTablePool = NULL;
PAGE_TABLE_POOL *mPageTablePool = NULL;
/**
Clear legacy memory located at the first 4K-page, if available.
@@ -48,39 +48,50 @@ PAGE_TABLE_POOL *mPageTablePool = NULL;
**/
VOID
ClearFirst4KPage (
IN VOID *HobStart
IN VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS RscHob;
EFI_PEI_HOB_POINTERS MemHob;
BOOLEAN DoClear;
EFI_PEI_HOB_POINTERS RscHob;
EFI_PEI_HOB_POINTERS MemHob;
BOOLEAN DoClear;
RscHob.Raw = HobStart;
MemHob.Raw = HobStart;
DoClear = FALSE;
DoClear = FALSE;
//
// Check if page 0 exists and free
//
while ((RscHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw)) != NULL) {
if (RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY &&
RscHob.ResourceDescriptor->PhysicalStart == 0) {
while ((RscHob.Raw = GetNextHob (
EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw
)) != NULL)
{
if ((RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
(RscHob.ResourceDescriptor->PhysicalStart == 0))
{
DoClear = TRUE;
//
// Make sure memory at 0-4095 has not been allocated.
//
while ((MemHob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw)) != NULL) {
while ((MemHob.Raw = GetNextHob (
EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw
)) != NULL)
{
if (MemHob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
< EFI_PAGE_SIZE) {
< EFI_PAGE_SIZE)
{
DoClear = FALSE;
break;
}
MemHob.Raw = GET_NEXT_HOB (MemHob);
}
break;
}
RscHob.Raw = GET_NEXT_HOB (RscHob);
}
@@ -119,9 +130,9 @@ IsExecuteDisableBitAvailable (
VOID
)
{
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Available;
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Available;
Available = FALSE;
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
@@ -172,9 +183,9 @@ EnableExecuteDisableBit (
VOID
)
{
UINT64 MsrRegisters;
UINT64 MsrRegisters;
MsrRegisters = AsmReadMsr64 (0xC0000080);
MsrRegisters = AsmReadMsr64 (0xC0000080);
MsrRegisters |= BIT11;
AsmWriteMsr64 (0xC0000080, MsrRegisters);
}
@@ -195,20 +206,20 @@ EnableExecuteDisableBit (
**/
BOOLEAN
ToSplitPageTable (
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN Size,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN Size,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
if (IsNullDetectionEnabled () && Address == 0) {
if (IsNullDetectionEnabled () && (Address == 0)) {
return TRUE;
}
if (PcdGetBool (PcdCpuStackGuard)) {
if (StackBase >= Address && StackBase < (Address + Size)) {
if ((StackBase >= Address) && (StackBase < (Address + Size))) {
return TRUE;
}
}
@@ -227,6 +238,7 @@ ToSplitPageTable (
return FALSE;
}
/**
Initialize a buffer pool for page table use only.
@@ -246,18 +258,18 @@ ToSplitPageTable (
**/
BOOLEAN
InitializePageTablePool (
IN UINTN PoolPages
IN UINTN PoolPages
)
{
VOID *Buffer;
VOID *Buffer;
//
// Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one page for
// header.
//
PoolPages += 1; // Add one page for header.
PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *
PAGE_TABLE_POOL_UNIT_PAGES;
PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *
PAGE_TABLE_POOL_UNIT_PAGES;
Buffer = AllocateAlignedPages (PoolPages, PAGE_TABLE_POOL_ALIGNMENT);
if (Buffer == NULL) {
DEBUG ((DEBUG_ERROR, "ERROR: Out of aligned pages\r\n"));
@@ -268,19 +280,19 @@ InitializePageTablePool (
// Link all pools into a list for easier track later.
//
if (mPageTablePool == NULL) {
mPageTablePool = Buffer;
mPageTablePool = Buffer;
mPageTablePool->NextPool = mPageTablePool;
} else {
((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
mPageTablePool->NextPool = Buffer;
mPageTablePool = Buffer;
mPageTablePool->NextPool = Buffer;
mPageTablePool = Buffer;
}
//
// Reserve one page for pool header.
//
mPageTablePool->FreePages = PoolPages - 1;
mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);
mPageTablePool->FreePages = PoolPages - 1;
mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);
return TRUE;
}
@@ -304,10 +316,10 @@ InitializePageTablePool (
**/
VOID *
AllocatePageTableMemory (
IN UINTN Pages
IN UINTN Pages
)
{
VOID *Buffer;
VOID *Buffer;
if (Pages == 0) {
return NULL;
@@ -316,8 +328,9 @@ AllocatePageTableMemory (
//
// Renew the pool if necessary.
//
if (mPageTablePool == NULL ||
Pages > mPageTablePool->FreePages) {
if ((mPageTablePool == NULL) ||
(Pages > mPageTablePool->FreePages))
{
if (!InitializePageTablePool (Pages)) {
return NULL;
}
@@ -325,8 +338,8 @@ AllocatePageTableMemory (
Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);
mPageTablePool->FreePages -= Pages;
mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);
mPageTablePool->FreePages -= Pages;
return Buffer;
}
@@ -344,18 +357,18 @@ AllocatePageTableMemory (
**/
VOID
Split2MPageTo4K (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
UINTN IndexOfPageTableEntries;
PAGE_TABLE_4K_ENTRY *PageTableEntry;
UINT64 AddressEncMask;
EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
UINTN IndexOfPageTableEntries;
PAGE_TABLE_4K_ENTRY *PageTableEntry;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@@ -368,14 +381,14 @@ Split2MPageTo4K (
//
// Fill in 2M page entry.
//
*PageEntry2M = (UINT64) (UINTN) PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
*PageEntry2M = (UINT64)(UINTN)PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
PhysicalAddress4K = PhysicalAddress;
for (IndexOfPageTableEntries = 0; IndexOfPageTableEntries < 512; IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K += SIZE_4KB) {
//
// Fill in the Page Table entries
//
PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K;
PageTableEntry->Uint64 = (UINT64)PhysicalAddress4K;
//
// The GHCB range consists of two pages per CPU, the GHCB and a
@@ -383,24 +396,28 @@ Split2MPageTo4K (
// unencrypted page while the per-CPU variable page needs to be
// mapped encrypted. These pages alternate in assignment.
//
if ((GhcbBase == 0)
|| (PhysicalAddress4K < GhcbBase)
|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0)) {
if ( (GhcbBase == 0)
|| (PhysicalAddress4K < GhcbBase)
|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0))
{
PageTableEntry->Uint64 |= AddressEncMask;
}
PageTableEntry->Bits.ReadWrite = 1;
if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
(PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K == StackBase)) {
if ((IsNullDetectionEnabled () && (PhysicalAddress4K == 0)) ||
(PcdGetBool (PcdCpuStackGuard) && (PhysicalAddress4K == StackBase)))
{
PageTableEntry->Bits.Present = 0;
} else {
PageTableEntry->Bits.Present = 1;
}
if (PcdGetBool (PcdSetNxForStack)
&& (PhysicalAddress4K >= StackBase)
&& (PhysicalAddress4K < StackBase + StackSize)) {
if ( PcdGetBool (PcdSetNxForStack)
&& (PhysicalAddress4K >= StackBase)
&& (PhysicalAddress4K < StackBase + StackSize))
{
//
// Set Nx bit for stack.
//
@@ -422,18 +439,18 @@ Split2MPageTo4K (
**/
VOID
Split1GPageTo2M (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry1G,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry1G,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
UINTN IndexOfPageDirectoryEntries;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINT64 AddressEncMask;
EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
UINTN IndexOfPageDirectoryEntries;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@@ -446,7 +463,7 @@ Split1GPageTo2M (
//
// Fill in 1G page entry.
//
*PageEntry1G = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
*PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
PhysicalAddress2M = PhysicalAddress;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {
@@ -454,15 +471,15 @@ Split1GPageTo2M (
//
// Need to split this 2M page that covers NULL or stack range.
//
Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split2MPageTo4K (PhysicalAddress2M, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress2M | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress2M | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
@@ -477,9 +494,9 @@ Split1GPageTo2M (
**/
VOID
SetPageTablePoolReadOnly (
IN UINTN PageTableBase,
IN EFI_PHYSICAL_ADDRESS Address,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN EFI_PHYSICAL_ADDRESS Address,
IN BOOLEAN Level4Paging
)
{
UINTN Index;
@@ -519,13 +536,13 @@ SetPageTablePoolReadOnly (
LevelSize[3] = SIZE_1GB;
LevelSize[4] = SIZE_512GB;
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &
PAGING_1G_ADDRESS_MASK_64;
PageTable = (UINT64 *)(UINTN)PageTableBase;
PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &
PAGING_1G_ADDRESS_MASK_64;
PageTable = (UINT64 *)(UINTN)PageTableBase;
PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;
for (Level = (Level4Paging) ? 4 : 3; Level > 0; --Level) {
Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));
Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));
Index &= PAGING_PAE_INDEX_MASK;
PageAttr = PageTable[Index];
@@ -553,14 +570,13 @@ SetPageTablePoolReadOnly (
ASSERT (Index < EFI_PAGE_SIZE/sizeof (UINT64));
PageTable[Index] &= ~(UINT64)IA32_PG_RW;
PoolUnitSize -= LevelSize[Level];
PoolUnitSize -= LevelSize[Level];
++Index;
}
}
break;
} else {
//
// The smaller granularity of page must be needed.
@@ -572,18 +588,20 @@ SetPageTablePoolReadOnly (
PhysicalAddress = PageAttr & LevelMask[Level];
for (EntryIndex = 0;
EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);
++EntryIndex) {
EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);
++EntryIndex)
{
NewPageTable[EntryIndex] = PhysicalAddress | AddressEncMask |
IA32_PG_P | IA32_PG_RW;
if (Level > 2) {
NewPageTable[EntryIndex] |= IA32_PG_PS;
}
PhysicalAddress += LevelSize[Level - 1];
}
PageTable[Index] = (UINT64)(UINTN)NewPageTable | AddressEncMask |
IA32_PG_P | IA32_PG_RW;
IA32_PG_P | IA32_PG_RW;
PageTable = NewPageTable;
}
}
@@ -598,14 +616,14 @@ SetPageTablePoolReadOnly (
**/
VOID
EnablePageTableProtection (
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
)
{
PAGE_TABLE_POOL *HeadPool;
PAGE_TABLE_POOL *Pool;
UINT64 PoolSize;
EFI_PHYSICAL_ADDRESS Address;
PAGE_TABLE_POOL *HeadPool;
PAGE_TABLE_POOL *Pool;
UINT64 PoolSize;
EFI_PHYSICAL_ADDRESS Address;
if (mPageTablePool == NULL) {
return;
@@ -615,14 +633,14 @@ EnablePageTableProtection (
// Disable write protection, because we need to mark page table to be write
// protected.
//
AsmWriteCr0 (AsmReadCr0() & ~CR0_WP);
AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);
//
// SetPageTablePoolReadOnly might update mPageTablePool. It's safer to
// remember original one in advance.
//
HeadPool = mPageTablePool;
Pool = HeadPool;
Pool = HeadPool;
do {
Address = (EFI_PHYSICAL_ADDRESS)(UINTN)Pool;
PoolSize = Pool->Offset + EFI_PAGES_TO_SIZE (Pool->FreePages);
@@ -633,9 +651,9 @@ EnablePageTableProtection (
// protection to them one by one.
//
while (PoolSize > 0) {
SetPageTablePoolReadOnly(PageTableBase, Address, Level4Paging);
Address += PAGE_TABLE_POOL_UNIT_SIZE;
PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;
SetPageTablePoolReadOnly (PageTableBase, Address, Level4Paging);
Address += PAGE_TABLE_POOL_UNIT_SIZE;
PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;
}
Pool = Pool->NextPool;
@@ -644,7 +662,7 @@ EnablePageTableProtection (
//
// Enable write protection, after page table attribute updated.
//
AsmWriteCr0 (AsmReadCr0() | CR0_WP);
AsmWriteCr0 (AsmReadCr0 () | CR0_WP);
}
/**
@@ -661,37 +679,37 @@ EnablePageTableProtection (
**/
UINTN
CreateIdentityMappingPageTables (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
UINT32 RegEax;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;
UINT32 RegEdx;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PageAddress;
UINTN IndexOfPml5Entries;
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPml5EntriesNeeded;
UINT32 NumberOfPml4EntriesNeeded;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN BigPageAddress;
VOID *Hob;
BOOLEAN Page5LevelSupport;
BOOLEAN Page1GSupport;
PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
UINT64 AddressEncMask;
IA32_CR4 Cr4;
UINT32 RegEax;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;
UINT32 RegEdx;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PageAddress;
UINTN IndexOfPml5Entries;
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPml5EntriesNeeded;
UINT32 NumberOfPml4EntriesNeeded;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN BigPageAddress;
VOID *Hob;
BOOLEAN Page5LevelSupport;
BOOLEAN Page1GSupport;
PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
UINT64 AddressEncMask;
IA32_CR4 Cr4;
//
// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
@@ -704,7 +722,7 @@ CreateIdentityMappingPageTables (
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
Page1GSupport = FALSE;
if (PcdGetBool(PcdUse1GPageTable)) {
if (PcdGetBool (PcdUse1GPageTable)) {
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000001) {
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
@@ -719,12 +737,12 @@ CreateIdentityMappingPageTables (
//
Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
PhysicalAddressBits = (UINT8)RegEax;
} else {
PhysicalAddressBits = 36;
}
@@ -733,8 +751,12 @@ CreateIdentityMappingPageTables (
Page5LevelSupport = FALSE;
if (PcdGetBool (PcdUse5LevelPageTable)) {
AsmCpuidEx (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL,
&EcxFlags.Uint32, NULL, NULL
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL,
&EcxFlags.Uint32,
NULL,
NULL
);
if (EcxFlags.Bits.FiveLevelPage != 0) {
Page5LevelSupport = TRUE;
@@ -749,7 +771,7 @@ CreateIdentityMappingPageTables (
// due to either unsupported by HW, or disabled by PCD.
//
ASSERT (PhysicalAddressBits <= 52);
if (!Page5LevelSupport && PhysicalAddressBits > 48) {
if (!Page5LevelSupport && (PhysicalAddressBits > 48)) {
PhysicalAddressBits = 48;
}
@@ -758,19 +780,19 @@ CreateIdentityMappingPageTables (
//
NumberOfPml5EntriesNeeded = 1;
if (PhysicalAddressBits > 48) {
NumberOfPml5EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 48);
PhysicalAddressBits = 48;
NumberOfPml5EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 48);
PhysicalAddressBits = 48;
}
NumberOfPml4EntriesNeeded = 1;
if (PhysicalAddressBits > 39) {
NumberOfPml4EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 39);
PhysicalAddressBits = 39;
NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 39);
PhysicalAddressBits = 39;
}
NumberOfPdpEntriesNeeded = 1;
ASSERT (PhysicalAddressBits > 30);
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 30);
NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 30);
//
// Pre-allocate big pages to avoid later allocations.
@@ -788,17 +810,22 @@ CreateIdentityMappingPageTables (
TotalPagesNum--;
}
DEBUG ((DEBUG_INFO, "Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded, NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded, (UINT64)TotalPagesNum));
DEBUG ((
DEBUG_INFO,
"Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded,
NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded,
(UINT64)TotalPagesNum
));
BigPageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);
BigPageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
ASSERT (BigPageAddress != 0);
//
// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
//
PageMap = (VOID *) BigPageAddress;
PageMap = (VOID *)BigPageAddress;
if (Page5LevelSupport) {
//
// By architecture only one PageMapLevel5 exists - so lets allocate storage for it.
@@ -806,94 +833,98 @@ CreateIdentityMappingPageTables (
PageMapLevel5Entry = PageMap;
BigPageAddress += SIZE_4KB;
}
PageAddress = 0;
PageAddress = 0;
for ( IndexOfPml5Entries = 0
; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
; IndexOfPml5Entries++) {
; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
; IndexOfPml5Entries++)
{
//
// Each PML5 entry points to a page of PML4 entires.
// So lets allocate space for them and fill them in in the IndexOfPml4Entries loop.
// When 5-Level Paging is disabled, below allocation happens only once.
//
PageMapLevel4Entry = (VOID *) BigPageAddress;
PageMapLevel4Entry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
if (Page5LevelSupport) {
//
// Make a PML5 Entry
//
PageMapLevel5Entry->Uint64 = (UINT64) (UINTN) PageMapLevel4Entry | AddressEncMask;
PageMapLevel5Entry->Uint64 = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;
PageMapLevel5Entry->Bits.ReadWrite = 1;
PageMapLevel5Entry->Bits.Present = 1;
PageMapLevel5Entry++;
}
for ( IndexOfPml4Entries = 0
; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
; IndexOfPml4Entries++, PageMapLevel4Entry++) {
; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
; IndexOfPml4Entries++, PageMapLevel4Entry++)
{
//
// Each PML4 entry points to a page of Page Directory Pointer entires.
// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
//
PageDirectoryPointerEntry = (VOID *) BigPageAddress;
BigPageAddress += SIZE_4KB;
PageDirectoryPointerEntry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
//
// Make a PML4 Entry
//
PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
PageMapLevel4Entry->Bits.ReadWrite = 1;
PageMapLevel4Entry->Bits.Present = 1;
PageMapLevel4Entry->Bits.Present = 1;
if (Page1GSupport) {
PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize, GhcbBase, GhcbSize)) {
Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split1GPageTo2M (PageAddress, (UINT64 *)PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectory1GEntry->Bits.ReadWrite = 1;
PageDirectory1GEntry->Bits.Present = 1;
PageDirectory1GEntry->Bits.MustBe1 = 1;
PageDirectory1GEntry->Bits.Present = 1;
PageDirectory1GEntry->Bits.MustBe1 = 1;
}
}
} else {
for ( IndexOfPdpEntries = 0
; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
; IndexOfPdpEntries++, PageDirectoryPointerEntry++)
{
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
//
PageDirectoryEntry = (VOID *) BigPageAddress;
BigPageAddress += SIZE_4KB;
PageDirectoryEntry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
//
// Fill in a Page Directory Pointer Entries
//
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Bits.ReadWrite = 1;
PageDirectoryPointerEntry->Bits.Present = 1;
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {
//
// Need to split this 2M page that covers NULL or stack range.
//
Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split2MPageTo4K (PageAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
@@ -901,7 +932,7 @@ CreateIdentityMappingPageTables (
//
// Fill with null entry for unused PDPTE
//
ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof(PAGE_MAP_AND_DIRECTORY_POINTER));
ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof (PAGE_MAP_AND_DIRECTORY_POINTER));
}
}
@@ -912,7 +943,7 @@ CreateIdentityMappingPageTables (
}
if (Page5LevelSupport) {
Cr4.UintN = AsmReadCr4 ();
Cr4.UintN = AsmReadCr4 ();
Cr4.Bits.LA57 = 1;
AsmWriteCr4 (Cr4.UintN);
//
@@ -936,4 +967,3 @@ CreateIdentityMappingPageTables (
return (UINTN)PageMap;
}

215
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h
View File

@@ -13,38 +13,37 @@ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _VIRTUAL_MEMORY_H_
#define _VIRTUAL_MEMORY_H_
#define SYS_CODE64_SEL 0x38
#define SYS_CODE64_SEL 0x38
#pragma pack(1)
typedef union {
struct {
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} IA32_GDT;
typedef struct {
IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;
UINT32 Offset32To63;
UINT32 Reserved;
IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;
UINT32 Offset32To63;
UINT32 Reserved;
} X64_IDT_GATE_DESCRIPTOR;
//
@@ -54,18 +53,18 @@ typedef struct {
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Reserved:1; // Reserved
UINT64 MustBeZero:2; // Must Be Zero
UINT64 Available:3; // Available for use by system software
UINT64 PageTableBaseAddress:40; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // No Execute bit
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Reserved : 1; // Reserved
UINT64 MustBeZero : 2; // Must Be Zero
UINT64 Available : 3; // Available for use by system software
UINT64 PageTableBaseAddress : 40; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // No Execute bit
} Bits;
UINT64 Uint64;
} PAGE_MAP_AND_DIRECTORY_POINTER;
@@ -75,19 +74,19 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 PAT:1; //
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PageTableBaseAddress:40; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 PAT : 1; //
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PageTableBaseAddress : 40; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_4K_ENTRY;
@@ -97,21 +96,21 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1:1; // Must be 1
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PAT:1; //
UINT64 MustBeZero:8; // Must be zero;
UINT64 PageTableBaseAddress:31; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1 : 1; // Must be 1
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PAT : 1; //
UINT64 MustBeZero : 8; // Must be zero;
UINT64 PageTableBaseAddress : 31; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_ENTRY;
@@ -121,45 +120,45 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1:1; // Must be 1
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PAT:1; //
UINT64 MustBeZero:17; // Must be zero;
UINT64 PageTableBaseAddress:22; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1 : 1; // Must be 1
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PAT : 1; //
UINT64 MustBeZero : 17; // Must be zero;
UINT64 PageTableBaseAddress : 22; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_1G_ENTRY;
#pragma pack()
#define CR0_WP BIT16
#define CR0_WP BIT16
#define IA32_PG_P BIT0
#define IA32_PG_RW BIT1
#define IA32_PG_PS BIT7
#define IA32_PG_P BIT0
#define IA32_PG_RW BIT1
#define IA32_PG_PS BIT7
#define PAGING_PAE_INDEX_MASK 0x1FF
#define PAGING_PAE_INDEX_MASK 0x1FF
#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
#define PAGING_L1_ADDRESS_SHIFT 12
#define PAGING_L2_ADDRESS_SHIFT 21
#define PAGING_L3_ADDRESS_SHIFT 30
#define PAGING_L4_ADDRESS_SHIFT 39
#define PAGING_L1_ADDRESS_SHIFT 12
#define PAGING_L2_ADDRESS_SHIFT 21
#define PAGING_L3_ADDRESS_SHIFT 30
#define PAGING_L4_ADDRESS_SHIFT 39
#define PAGING_PML4E_NUMBER 4
#define PAGING_PML4E_NUMBER 4
#define PAGE_TABLE_POOL_ALIGNMENT BASE_2MB
#define PAGE_TABLE_POOL_UNIT_SIZE SIZE_2MB
@@ -168,9 +167,9 @@ typedef union {
(~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
typedef struct {
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
} PAGE_TABLE_POOL;
/**
@@ -207,12 +206,12 @@ EnableExecuteDisableBit (
**/
VOID
Split2MPageTo4K (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
);
/**
@@ -229,13 +228,12 @@ Split2MPageTo4K (
**/
UINTN
CreateIdentityMappingPageTables (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbkSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbkSize
);
/**
Fix up the vector number in the vector code.
@@ -247,11 +245,10 @@ CreateIdentityMappingPageTables (
VOID
EFIAPI
AsmVectorFixup (
VOID *VectorBase,
UINT8 VectorNum
VOID *VectorBase,
UINT8 VectorNum
);
/**
Get the information of vector template.
@@ -278,7 +275,7 @@ AsmGetVectorTemplatInfo (
**/
VOID
ClearFirst4KPage (
IN VOID *HobStart
IN VOID *HobStart
);
/**
@@ -301,8 +298,8 @@ IsNullDetectionEnabled (
**/
VOID
EnablePageTableProtection (
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
);
/**
@@ -324,7 +321,7 @@ EnablePageTableProtection (
**/
VOID *
AllocatePageTableMemory (
IN UINTN Pages
IN UINTN Pages
);
#endif