sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

UefiPayloadPkg: Apply uncrustify changes

Browse Source 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki
2021-12-05 14:54:18 -08:00
committed by mergify[bot]
parent 053e878bfb
commit e5efcf8be8
76 changed files with 4281 additions and 4072 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
View File

@ -47,6 +47,7 @@ ReserveResourceInGcd (
Length
));
}
Status = gDS->AllocateMemorySpace (
EfiGcdAllocateAddress,
GcdType,
@ -70,6 +71,7 @@ ReserveResourceInGcd (
Length
));
}
Status = gDS->AllocateIoSpace (
EfiGcdAllocateAddress,
GcdType,
@ -80,10 +82,10 @@ ReserveResourceInGcd (
NULL
);
}
return Status;
}
/**
Main entry for the bootloader support DXE module.
@ -144,4 +146,3 @@ BlDxeEntryPoint (
return EFI_SUCCESS;
}

1
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.h
View File

@ -5,6 +5,7 @@ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __DXE_BOOTLOADER_SUPPORT_H__
#define __DXE_BOOTLOADER_SUPPORT_H__

24
UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c
View File

@ -15,7 +15,7 @@
PLD_S3_COMMUNICATION mPldS3Hob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;
PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;;
PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;
UINT64 mSmmFeatureControl = 0;
/**
@ -47,10 +47,12 @@ SaveSmmInfoForS3 (
PldSmmInfo->Header.Header.HobLength = (UINT16)(sizeof (PLD_TO_BL_SMM_INFO) + gSmst->NumberOfCpus * sizeof (CPU_SMMBASE));
for (Index = 0; Index < mSmramHob->NumberOfSmmReservedRegions; Index++) {
if ((mPldS3Hob.CommBuffer.PhysicalStart >= mSmramHob->Descriptor[Index].PhysicalStart) &&
(mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize)) {
(mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize))
{
break;
}
}
if (Index == mSmramHob->NumberOfSmmReservedRegions) {
return EFI_NOT_FOUND;
}
@ -79,6 +81,7 @@ SaveSmmInfoForS3 (
if (EFI_ERROR (Status)) {
return Status;
}
PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;
SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
@ -96,7 +99,6 @@ SaveSmmInfoForS3 (
return EFI_SUCCESS;
}
/**
Get specified SMI register based on given register ID
@ -118,6 +120,7 @@ GetRegisterById (
return &mSmmRegisterHob->Registers[Index];
}
}
return NULL;
}
@ -147,7 +150,8 @@ LockSmiGlobalEn (
(SmiLockReg->Address.Address != 0) &&
(SmiLockReg->Address.RegisterBitWidth == 1) &&
(SmiLockReg->Address.AddressSpaceId == EFI_ACPI_3_0_SYSTEM_MEMORY) &&
(SmiLockReg->Value == 1)) {
(SmiLockReg->Value == 1))
{
DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn ....is locked\n"));
MmioOr32 ((UINT32)SmiLockReg->Address.Address, 1 << SmiLockReg->Address.RegisterBitOffset);
@ -166,7 +170,6 @@ SmmFeatureLockOnS3 (
VOID
)
{
if (mSmmFeatureControl != 0) {
return;
}
@ -178,11 +181,10 @@ SmmFeatureLockOnS3 (
//
AsmWriteMsr64 (MSR_SMM_FEATURE_CONTROL, mSmmFeatureControl | 0x5);
}
mSmmFeatureControl = AsmReadMsr64 (MSR_SMM_FEATURE_CONTROL);
}
/**
Function to program SMRR base and mask.
@ -230,6 +232,7 @@ SetSmrrOnS3 (
DEBUG ((DEBUG_ERROR, "Two SMM regions are not continous.\n"));
return;
}
SmmSize += (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalSize;
}
@ -272,7 +275,6 @@ SetSmrrOnS3 (
}
}
/**
Software SMI callback for restoring SMRR base and mask in S3 path.
@ -302,7 +304,6 @@ BlSwSmiHandler (
return EFI_SUCCESS;
}
/**
Lock SMI in this SMM ready to lock event.
@ -328,7 +329,6 @@ BlSupportSmmReadyToLockCallback (
return EFI_SUCCESS;
}
/**
The driver's entry point.
@ -380,6 +380,7 @@ BlSupportSmm (
if (mSmramHob == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));
} else {
return EFI_NOT_FOUND;
@ -395,6 +396,7 @@ BlSupportSmm (
if (mSmmRegisterHob == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));
} else {
return EFI_NOT_FOUND;
@ -407,6 +409,7 @@ BlSupportSmm (
if (EFI_ERROR (Status)) {
return Status;
}
SwContext.SwSmiInputValue = (UINTN)-1;
Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);
if (EFI_ERROR (Status)) {
@ -428,4 +431,3 @@ BlSupportSmm (
return EFI_SUCCESS;
}

2
UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h
View File

@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef BL_SUPPORT_SMM_H_
#define BL_SUPPORT_SMM_H_
@ -38,4 +39,3 @@ typedef struct {
} SMRR_BASE_MASK;
#endif

4
UefiPayloadPkg/FvbRuntimeDxe/FvbInfo.c
View File

@ -81,6 +81,7 @@ InitVariableStore (
ASSERT (FALSE);
return EFI_NOT_FOUND;
}
NvVariableInfo = (NV_VARIABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);
//
@ -104,6 +105,7 @@ InitVariableStore (
if (NvVariableSize >= 0x80000000) {
return EFI_INVALID_PARAMETER;
}
Status = PcdSet32S (PcdFlashNvStorageVariableSize, NvVariableSize);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S (PcdFlashNvStorageVariableBase, NvStorageBase);
@ -124,7 +126,6 @@ InitVariableStore (
return EFI_SUCCESS;
}
/**
Get a heathy FV header used for variable store recovery
@ -148,4 +149,3 @@ GetFvHeaderTemplate (
return FvHeader;
}

63
UefiPayloadPkg/FvbRuntimeDxe/FvbService.c
View File

@ -60,7 +60,6 @@ FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
}
};
EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
FVB_DEVICE_SIGNATURE,
NULL,
@ -77,7 +76,6 @@ EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
} // FwVolBlockInstance
};
/**
Get the pointer to EFI_FW_VOL_INSTANCE from the buffer pointed
by mFvbModuleGlobal.FvInstance based on a index.
@ -113,10 +111,8 @@ GetFvbInstance (
}
return FwhRecord;
}
/**
Get the EFI_FVB_ATTRIBUTES_2 of a FV.
@ -132,6 +128,7 @@ FvbGetVolumeAttributes (
)
{
EFI_FW_VOL_INSTANCE *FwInstance;
FwInstance = GetFvbInstance (Instance);
ASSERT (FwInstance != NULL);
@ -142,8 +139,6 @@ FvbGetVolumeAttributes (
return FwInstance->VolumeHeader.Attributes;
}
/**
Retrieves the starting address of an LBA in an FV. It also
return a few other attribut of the FV.
@ -202,7 +197,7 @@ FvbGetLbaAddress (
BlockLength = BlockMap->Length;
}
if ( NumBlocks == 0 || BlockLength == 0) {
if ((NumBlocks == 0) || (BlockLength == 0)) {
return EFI_INVALID_PARAMETER;
}
@ -211,7 +206,7 @@ FvbGetLbaAddress (
//
// The map entry found
//
if (Lba >= StartLba && Lba < NextLba) {
if ((Lba >= StartLba) && (Lba < NextLba)) {
Offset = Offset + (UINTN)MultU64x32 ((Lba - StartLba), BlockLength);
if (LbaAddress != NULL) {
*LbaAddress = FwhInstance->FvBase + Offset;
@ -224,6 +219,7 @@ FvbGetLbaAddress (
if (NumOfBlocks != NULL) {
*NumOfBlocks = (UINTN)(NextLba - Lba);
}
return EFI_SUCCESS;
}
@ -233,7 +229,6 @@ FvbGetLbaAddress (
}
}
/**
Reads specified number of bytes into a buffer from the specified block
@ -277,6 +272,7 @@ FvbReadBlock (
if ((NumBytes == NULL) || (Buffer == NULL)) {
return (EFI_INVALID_PARAMETER);
}
if (*NumBytes == 0) {
return (EFI_INVALID_PARAMETER);
}
@ -309,7 +305,6 @@ FvbReadBlock (
return Status;
}
/**
Writes specified number of bytes from the input buffer to the block
@ -348,6 +343,7 @@ FvbWriteBlock (
if ((NumBytes == NULL) || (Buffer == NULL)) {
return (EFI_INVALID_PARAMETER);
}
if (*NumBytes == 0) {
return (EFI_INVALID_PARAMETER);
}
@ -373,9 +369,12 @@ FvbWriteBlock (
}
if ( LbaLength < (*NumBytes + BlockOffset)) {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
*NumBytes, (UINT32)(LbaLength - BlockOffset)));
*NumBytes,
(UINT32)(LbaLength - BlockOffset)
));
*NumBytes = (UINT32)(LbaLength - BlockOffset);
return EFI_BAD_BUFFER_SIZE;
}
@ -388,7 +387,6 @@ FvbWriteBlock (
return Status;
}
/**
Erases and initializes a firmware volume block
@ -409,7 +407,6 @@ FvbEraseBlock (
IN EFI_LBA Lba
)
{
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
@ -575,7 +572,6 @@ FvbSetVolumeAttributes (
return EFI_SUCCESS;
}
/**
Retrieves the physical address of the device.
@ -606,8 +602,6 @@ FvbProtocolGetPhysicalAddress (
return EFI_SUCCESS;
}
/**
Retrieve the size of a logical block
@ -638,7 +632,6 @@ FvbProtocolGetBlockSize (
return FvbGetLbaAddress (FvbDevice->Instance, Lba, NULL, BlockSize, NumOfBlocks);
}
/**
Retrieves Volume attributes. No polarity translations are done.
@ -663,7 +656,6 @@ FvbProtocolGetAttributes (
return EFI_SUCCESS;
}
/**
Sets Volume attributes. No polarity translations are done.
@ -688,8 +680,6 @@ FvbProtocolSetAttributes (
return Status;
}
/**
This function erases one or more blocks as denoted by the
variable argument list. The entire parameter list of blocks must be verified
@ -771,6 +761,7 @@ FvbProtocolEraseBlocks (
VA_END (args);
return Status;
}
StartingLba++;
NumOfLba--;
}
@ -781,8 +772,6 @@ FvbProtocolEraseBlocks (
return EFI_SUCCESS;
}
/**
Writes data beginning at Lba:Offset from FV. The write terminates either
when *NumBytes of data have been written, or when a block boundary is
@ -823,14 +812,19 @@ FvbProtocolWrite (
FvbDevice = FVB_DEVICE_FROM_THIS (This);
Status = FvbWriteBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);
DEBUG((DEBUG_VERBOSE,
DEBUG ((
DEBUG_VERBOSE,
"FvbWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x Status:%r\n",
Lba, Offset, *NumBytes, Buffer, Status));
Lba,
Offset,
*NumBytes,
Buffer,
Status
));
return Status;
}
/**
Reads data beginning at Lba:Offset from FV. The Read terminates either
when *NumBytes of data have been read, or when a block boundary is
@ -869,15 +863,20 @@ FvbProtocolRead (
OUT UINT8 *Buffer
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
Status = FvbReadBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);
DEBUG((DEBUG_VERBOSE,
DEBUG ((
DEBUG_VERBOSE,
"FvbRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x, Status:%r\n",
Lba, Offset, *NumBytes, Buffer, Status));
Lba,
Offset,
*NumBytes,
Buffer,
Status
));
return Status;
}
@ -915,7 +914,8 @@ IsFvHeaderValid (
if ((FwVolHeader->Revision != EFI_FVH_REVISION) ||
(FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
(FwVolHeader->FvLength == ((UINTN)-1)) ||
((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
((FwVolHeader->HeaderLength & 0x01) != 0))
{
DEBUG ((DEBUG_INFO, " -- >Revision = 0x%x, Signature = 0x%x\n", FwVolHeader->Revision, FwVolHeader->Signature));
DEBUG ((DEBUG_INFO, " -- >FvLength = 0x%lx, HeaderLength = 0x%x\n", FwVolHeader->FvLength, FwVolHeader->HeaderLength));
return FALSE;
@ -930,7 +930,6 @@ IsFvHeaderValid (
return TRUE;
}
/**
Get intial variable data.
@ -975,6 +974,7 @@ GetInitialVariableData (
if (Variable->StartId != VARIABLE_DATA) {
break;
}
VariableSize = sizeof (AUTHENTICATED_VARIABLE_HEADER) + Variable->DataSize + Variable->NameSize;
Variable = (AUTHENTICATED_VARIABLE_HEADER *)HEADER_ALIGN ((UINTN)Variable + VariableSize);
}
@ -1065,6 +1065,7 @@ FvbInitialize (
if (FwVolInstance == NULL) {
return EFI_OUT_OF_RESOURCES;
}
FwVolInstance->FvBase = (UINTN)BaseAddress;
CopyMem (&FwVolInstance->VolumeHeader, FvHeader, FvHeader->HeaderLength);

2
UefiPayloadPkg/FvbRuntimeDxe/FvbService.h
View File

@ -45,7 +45,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
typedef struct {
UINTN FvBase;
UINTN NumOfBlocks;
@ -56,7 +55,6 @@ typedef struct {
EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;
} EFI_FW_VOL_INSTANCE;
typedef struct {
EFI_FW_VOL_INSTANCE *FvInstance;
UINT32 NumFv;

2
UefiPayloadPkg/FvbRuntimeDxe/FvbServiceSmm.c
View File

@ -61,6 +61,7 @@ InstallFvbProtocol (
ASSERT (FALSE);
return EFI_OUT_OF_RESOURCES;
}
FvDevicePath = (FV_MEMMAP_DEVICE_PATH *)FvbDevice->DevicePath;
FvDevicePath->MemMapDevPath.StartingAddress = FwhInstance->FvBase;
FvDevicePath->MemMapDevPath.EndingAddress = FwhInstance->FvBase + FwVolHeader->FvLength - 1;
@ -112,7 +113,6 @@ InstallFvbProtocol (
return Status;
}
/**
The driver entry point for SMM Firmware Volume Block Driver.

1
UefiPayloadPkg/FvbRuntimeDxe/FvbSmmCommon.h
View File

@ -25,7 +25,6 @@ typedef struct {
UINT8 Data[1];
} SMM_FVB_COMMUNICATE_FUNCTION_HEADER;
///
/// Size of SMM communicate header, without including the payload.
///

82
UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutput.c
View File

@ -50,7 +50,7 @@ GraphicsOutputQueryMode (
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
)
{
if (This == NULL || Info == NULL || SizeOfInfo == NULL || ModeNumber >= This->Mode->MaxMode) {
if ((This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode)) {
return EFI_INVALID_PARAMETER;
}
@ -97,8 +97,10 @@ GraphicsOutputSetMode (
Private->FrameBufferBltLibConfigure,
&Black,
EfiBltVideoFill,
0, 0,
0, 0,
0,
0,
0,
0,
This->Mode->Info->HorizontalResolution,
This->Mode->Info->VerticalResolution,
0
@ -159,8 +161,12 @@ GraphicsOutputBlt (
Private->FrameBufferBltLibConfigure,
BltBuffer,
BltOperation,
SourceX, SourceY,
DestinationX, DestinationY, Width, Height,
SourceX,
SourceY,
DestinationX,
DestinationY,
Width,
Height,
Delta
);
gBS->RestoreTPL (Tpl);
@ -236,9 +242,11 @@ GraphicsOutputDriverBindingSupported (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
gBS->CloseProtocol (
Controller,
&gEfiPciIoProtocolGuid,
@ -260,9 +268,11 @@ GraphicsOutputDriverBindingSupported (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
@ -272,7 +282,8 @@ GraphicsOutputDriverBindingSupported (
if ((RemainingDevicePath == NULL) ||
IsDevicePathEnd (RemainingDevicePath) ||
CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0) {
(CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0))
{
return EFI_SUCCESS;
} else {
return EFI_INVALID_PARAMETER;
@ -326,14 +337,20 @@ GraphicsOutputDriverBindingStart (
DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB doesn't exist!\n", gEfiCallerBaseName));
} else {
DeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *)(GET_GUID_HOB_DATA (HobStart));
DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB:\n"
DEBUG ((
DEBUG_INFO,
"[%a]: GraphicsDeviceInfo HOB:\n"
" VendorId = %04x, DeviceId = %04x,\n"
" RevisionId = %02x, BarIndex = %x,\n"
" SubsystemVendorId = %04x, SubsystemId = %04x\n",
gEfiCallerBaseName,
DeviceInfo->VendorId, DeviceInfo->DeviceId,
DeviceInfo->RevisionId, DeviceInfo->BarIndex,
DeviceInfo->SubsystemVendorId, DeviceInfo->SubsystemId));
DeviceInfo->VendorId,
DeviceInfo->DeviceId,
DeviceInfo->RevisionId,
DeviceInfo->BarIndex,
DeviceInfo->SubsystemVendorId,
DeviceInfo->SubsystemId
));
}
//
@ -350,6 +367,7 @@ GraphicsOutputDriverBindingStart (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
ASSERT_EFI_ERROR (Status);
Status = gBS->OpenProtocol (
@ -363,6 +381,7 @@ GraphicsOutputDriverBindingStart (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
ASSERT_EFI_ERROR (Status);
//
@ -377,7 +396,8 @@ GraphicsOutputDriverBindingStart (
((DeviceInfo->SubsystemVendorId != MAX_UINT16) && (DeviceInfo->SubsystemVendorId != Pci.Device.SubsystemVendorID)) ||
((DeviceInfo->SubsystemId != MAX_UINT16) && (DeviceInfo->SubsystemId != Pci.Device.SubsystemID))
)
) {
)
{
//
// It's not a video device, or device infomation doesn't match.
//
@ -393,18 +413,27 @@ GraphicsOutputDriverBindingStart (
if ((DeviceInfo->BarIndex != MAX_UINT8) && (DeviceInfo->BarIndex != Index)) {
continue;
}
Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID **)&Resources);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "[%a]: BAR[%d]: Base = %lx, Length = %lx\n",
gEfiCallerBaseName, Index, Resources->AddrRangeMin, Resources->AddrLen));
DEBUG ((
DEBUG_INFO,
"[%a]: BAR[%d]: Base = %lx, Length = %lx\n",
gEfiCallerBaseName,
Index,
Resources->AddrRangeMin,
Resources->AddrLen
));
if ((Resources->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) &&
(Resources->Len == (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&
(Resources->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&
(Resources->AddrLen >= GraphicsInfo->FrameBufferSize)
) {
)
{
if (FrameBufferBase == 0) {
FrameBufferBase = Resources->AddrRangeMin;
}
if (DeviceInfo->BarIndex == MAX_UINT8) {
if (Resources->AddrRangeMin == GraphicsInfo->FrameBufferBase) {
FrameBufferBase = Resources->AddrRangeMin;
@ -416,6 +445,7 @@ GraphicsOutputDriverBindingStart (
}
}
}
if (Index == MAX_PCI_BAR) {
Status = EFI_UNSUPPORTED;
} else {
@ -489,6 +519,7 @@ GraphicsOutputDriverBindingStart (
);
}
}
if (RETURN_ERROR (ReturnStatus)) {
Status = EFI_OUT_OF_RESOURCES;
goto RestorePciAttributes;
@ -502,8 +533,10 @@ GraphicsOutputDriverBindingStart (
Status = gBS->InstallMultipleProtocolInterfaces (
&Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
@ -521,8 +554,10 @@ GraphicsOutputDriverBindingStart (
} else {
gBS->UninstallMultipleProtocolInterfaces (
Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
}
@ -547,9 +582,11 @@ FreeMemory:
if (Private->DevicePath != NULL) {
FreePool (Private->DevicePath);
}
if (Private->FrameBufferBltLibConfigure != NULL) {
FreePool (Private->FrameBufferBltLibConfigure);
}
FreePool (Private);
}
}
@ -576,6 +613,7 @@ CloseProtocols:
Controller
);
}
return Status;
}
@ -605,7 +643,6 @@ GraphicsOutputDriverBindingStop (
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
if (NumberOfChildren == 0) {
//
// Close the PCI I/O Protocol
//
@ -654,8 +691,10 @@ GraphicsOutputDriverBindingStop (
//
Status = gBS->UninstallMultipleProtocolInterfaces (
Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
if (!EFI_ERROR (Status)) {
@ -684,6 +723,7 @@ GraphicsOutputDriverBindingStop (
);
ASSERT_EFI_ERROR (Status);
}
return Status;
}

1
UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutput.h
View File

@ -6,6 +6,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _GRAPHICS_OUTPUT_DXE_H_
#define _GRAPHICS_OUTPUT_DXE_H_
#include <PiDxe.h>

2
UefiPayloadPkg/Include/Coreboot.h
View File

@ -35,7 +35,6 @@
* SUCH DAMAGE.
*/
#ifndef _COREBOOT_PEI_H_INCLUDED_
#define _COREBOOT_PEI_H_INCLUDED_
@ -132,6 +131,7 @@ struct cb_mainboard {
UINT8 part_number_idx;
UINT8 strings[0];
};
#define CB_TAG_VERSION 0x0004
#define CB_TAG_EXTRA_VERSION 0x0005
#define CB_TAG_BUILD 0x0006

1
UefiPayloadPkg/Include/Guid/SmmRegisterInfoGuid.h
View File

@ -42,7 +42,6 @@ typedef struct {
PLD_GENERIC_REGISTER Registers[0];
} PLD_SMM_REGISTERS;
#pragma pack()
#endif

7
UefiPayloadPkg/Include/Library/BlParseLib.h
View File

@ -6,6 +6,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef BOOTLOADER_PARSE_LIB_
#define BOOTLOADER_PARSE_LIB_
@ -20,7 +21,10 @@
#define GET_BOOTLOADER_PARAMETER() PcdGet64 (PcdBootloaderParameter)
typedef RETURN_STATUS \
(*BL_MEM_INFO_CALLBACK) (MEMORY_MAP_ENTRY *MemoryMapEntry, VOID *Param);
(*BL_MEM_INFO_CALLBACK) (
MEMORY_MAP_ENTRY *MemoryMapEntry,
VOID *Param
);
/**
This function retrieves the parameter base address from boot loader.
@ -100,7 +104,6 @@ ParseSerialInfo (
OUT SERIAL_PORT_INFO *SerialPortInfo
);
/**
Find the video frame buffer information

1
UefiPayloadPkg/Include/Library/DxeHobListLib.h
View File

@ -24,4 +24,3 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
extern VOID *gHobList;
#endif

4
UefiPayloadPkg/Include/Library/FlashDeviceLib.h
View File

@ -6,7 +6,6 @@
**/
#ifndef FLASHDEVICE_LIB_H_
#define FLASHDEVICE_LIB_H_
@ -31,7 +30,6 @@ LibFvbFlashDeviceRead (
OUT UINT8 *Buffer
);
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@ -53,7 +51,6 @@ LibFvbFlashDeviceWrite (
IN UINT8 *Buffer
);
/**
Erase the block starting at PAddress.
@ -76,7 +73,6 @@ LibFvbFlashDeviceBlockErase (
IN UINTN LbaLength
);
/**
Lock or unlock the block starting at PAddress.

1
UefiPayloadPkg/Include/Library/PlatformSupportLib.h
View File

@ -25,4 +25,3 @@ ParsePlatformInfo (
);
#endif // __BOOTLOADER_PLATFORM_SUPPORT_LIB__

1
UefiPayloadPkg/Include/Library/SpiFlashLib.h
View File

@ -117,7 +117,6 @@ SpiReadPchSoftStrap (
OUT UINT8 *SoftStrapValue
);
/**
Read data from the flash part.

1
UefiPayloadPkg/Include/Protocol/PlatformBootManagerOverride.h
View File

@ -8,7 +8,6 @@
#ifndef __PLATFORM_BOOT_MANAGER_OVERRIDE_H__
#define __PLATFORM_BOOT_MANAGER_OVERRIDE_H__
/**
Do the platform specific action before the console is connected.

1
UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c
View File

@ -67,6 +67,7 @@ InternalAcpiGetTimerTick (
if (mPmTimerReg == 0) {
AcpiTimerLibConstructor ();
}
return IoRead32 (mPmTimerReg);
}

37
UefiPayloadPkg/Library/CbParseLib/CbParseLib.c
View File

@ -17,7 +17,6 @@
#include <IndustryStandard/Acpi.h>
#include <Coreboot.h>
/**
Convert a packed value from cbuint64 to a UINT64 value.
@ -34,7 +33,6 @@ cb_unpack64 (
return LShiftU64 (val.hi, 32) | val.lo;
}
/**
Returns the sum of all elements in a buffer of 16-bit values. During
calculation, the carry bits are also been added.
@ -75,7 +73,6 @@ CbCheckSum16 (
return (UINT16)((~Sum) & 0xFFFF);
}
/**
Check the coreboot table if it is valid.
@ -118,7 +115,6 @@ IsValidCbTable (
return TRUE;
}
/**
This function retrieves the parameter base address from boot loader.
@ -184,6 +180,7 @@ GetParameterBase (
CbTablePtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;
break;
}
TmpPtr += Record->size;
}
@ -200,7 +197,6 @@ GetParameterBase (
return CbTablePtr;
}
/**
Find coreboot record with given Tag.
@ -231,13 +227,13 @@ FindCbTag (
TagPtr = TmpPtr;
break;
}
TmpPtr += Record->size;
}
return TagPtr;
}
/**
Find the given table with TableId from the given coreboot memory Root.
@ -266,6 +262,7 @@ FindCbMemTable (
if ((Root == NULL) || (MemTable == NULL)) {
return RETURN_INVALID_PARAMETER;
}
//
// Check if the entry is CBMEM or IMD
// and handle them separately
@ -289,12 +286,18 @@ FindCbMemTable (
} else {
*MemTable = (VOID *)(UINTN)Entries[Idx].start;
}
if (MemTableSize != NULL) {
*MemTableSize = Entries[Idx].size;
}
DEBUG ((DEBUG_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
TableId, *MemTable, Entries[Idx].size));
DEBUG ((
DEBUG_INFO,
"Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
TableId,
*MemTable,
Entries[Idx].size
));
return RETURN_SUCCESS;
}
}
@ -361,8 +364,6 @@ ParseCbMemTable (
return Status;
}
/**
Acquire the memory information from the coreboot table in memory.
@ -399,8 +400,14 @@ ParseMemoryInfo (
MemoryMap.Size = cb_unpack64 (Range->size);
MemoryMap.Type = (UINT8)Range->type;
MemoryMap.Flag = 0;
DEBUG ((DEBUG_INFO, "%d. %016lx - %016lx [%02x]\n",
Index, MemoryMap.Base, MemoryMap.Base + MemoryMap.Size - 1, MemoryMap.Type));
DEBUG ((
DEBUG_INFO,
"%d. %016lx - %016lx [%02x]\n",
Index,
MemoryMap.Base,
MemoryMap.Base + MemoryMap.Size - 1,
MemoryMap.Type
));
MemInfoCallback (&MemoryMap, Params);
}
@ -408,7 +415,6 @@ ParseMemoryInfo (
return RETURN_SUCCESS;
}
/**
Acquire SMBIOS table from coreboot.
@ -432,12 +438,12 @@ ParseSmbiosTable (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
SmbiosTable->SmBiosEntryPoint = (UINT64)(UINTN)MemTable;
return RETURN_SUCCESS;
}
/**
Acquire ACPI table from coreboot.
@ -461,12 +467,12 @@ ParseAcpiTableInfo (
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
AcpiTableHob->Rsdp = (UINT64)(UINTN)MemTable;
return RETURN_SUCCESS;
}
/**
Find the serial port information
@ -552,6 +558,7 @@ ParseGfxInfo (
} else if ((CbFbRec->blue_mask_pos == 0) && (CbFbRec->green_mask_pos == 8) && (CbFbRec->red_mask_pos == 16)) {
GfxMode->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;
}
GfxMode->PixelInformation.RedMask = ((1 << CbFbRec->red_mask_size) - 1) << CbFbRec->red_mask_pos;
GfxMode->PixelInformation.GreenMask = ((1 << CbFbRec->green_mask_size) - 1) << CbFbRec->green_mask_pos;
GfxMode->PixelInformation.BlueMask = ((1 << CbFbRec->blue_mask_size) - 1) << CbFbRec->blue_mask_pos;

4
UefiPayloadPkg/Library/DxeHobLib/HobLib.c
View File

@ -75,8 +75,10 @@ GetNextHob (
if (Hob.Header->HobType == Type) {
return Hob.Raw;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
return NULL;
}
@ -141,8 +143,10 @@ GetNextGuidHob (
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
break;
}
GuidHob.Raw = GET_NEXT_HOB (GuidHob);
}
return GuidHob.Raw;
}

1
UefiPayloadPkg/Library/DxeHobListLib/DxeHobListLib.c
View File

@ -7,7 +7,6 @@
**/
#include <Uefi.h>
VOID *gHobList = NULL;

1
UefiPayloadPkg/Library/DxeHobListLibNull/DxeHobListLibNull.c
View File

@ -7,7 +7,6 @@
**/
#include <Uefi.h>
/**

5
UefiPayloadPkg/Library/FlashDeviceLib/FlashDeviceLib.c
View File

@ -27,7 +27,6 @@ LibFvbFlashDeviceInit (
return SpiConstructor ();
}
/**
Read NumBytes bytes of data from the address specified by
PAddress into Buffer.
@ -66,7 +65,6 @@ LibFvbFlashDeviceRead (
return SpiFlashRead (FlashRegionBios, AddrOffset, ByteCount, Buffer);
}
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@ -105,7 +103,6 @@ LibFvbFlashDeviceWrite (
return SpiFlashWrite (FlashRegionBios, AddrOffset, ByteCount, Buffer);
}
/**
Erase the block starting at PAddress.
@ -140,7 +137,6 @@ LibFvbFlashDeviceBlockErase (
return SpiFlashErase (FlashRegionBios, AddrOffset, (UINT32)LbaLength);
}
/**
Lock or unlock the block starting at PAddress.
@ -162,4 +158,3 @@ LibFvbFlashDeviceBlockLock (
{
return EFI_SUCCESS;
}

39
UefiPayloadPkg/Library/PayloadEntryHobLib/Hob.c
View File

@ -35,7 +35,6 @@ GetHobList (
return mHobList;
}
/**
Build a Handoff Information Table HOB
@ -203,13 +202,13 @@ GetNextHob (
if (Hob.Header->HobType == Type) {
return Hob.Raw;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
return NULL;
}
/**
Returns the first instance of a HOB type among the whole HOB list.
@ -233,7 +232,6 @@ GetFirstHob (
return GetNextHob (Type, HobList);
}
/**
This function searches the first instance of a HOB from the starting HOB pointer.
Such HOB should satisfy two conditions:
@ -267,12 +265,13 @@ GetNextGuidHob (
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
break;
}
GuidHob.Raw = GET_NEXT_HOB (GuidHob);
}
return GuidHob.Raw;
}
/**
This function searches the first instance of a HOB among the whole HOB list.
Such HOB should satisfy two conditions:
@ -299,9 +298,6 @@ GetFirstGuidHob (
return GetNextGuidHob (Guid, HobList);
}
/**
Builds a HOB for a loaded PE32 module.
@ -328,8 +324,10 @@ BuildModuleHob (
{
EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob;
ASSERT (((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&
((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&
((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE));
@ -384,7 +382,6 @@ BuildGuidHob (
return Hob + 1;
}
/**
Copies a data buffer to a newly-built HOB.
@ -422,7 +419,6 @@ BuildGuidDataHob (
return CopyMem (HobData, Data, DataLength);
}
/**
Builds a Firmware Volume HOB.
@ -450,7 +446,6 @@ BuildFvHob (
Hob->Length = Length;
}
/**
Builds a EFI_HOB_TYPE_FV2 HOB.
@ -529,7 +524,6 @@ BuildFv3Hob (
}
}
/**
Builds a HOB for the CPU.
@ -562,7 +556,6 @@ BuildCpuHob (
ZeroMem (Hob->Reserved, sizeof (Hob->Reserved));
}
/**
Builds a HOB for the Stack.
@ -584,8 +577,10 @@ BuildStackHob (
{
EFI_HOB_MEMORY_ALLOCATION_STACK *Hob;
ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK));
@ -600,7 +595,6 @@ BuildStackHob (
ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));
}
/**
Update the Stack Hob if the stack has been moved
@ -636,12 +630,11 @@ UpdateStackHob (
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
}
/**
Builds a HOB for the memory allocation.
@ -665,8 +658,10 @@ BuildMemoryAllocationHob (
{
EFI_HOB_MEMORY_ALLOCATION *Hob;
ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION));

1
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h
View File

@ -113,4 +113,5 @@ CreateRootBridgeDevicePath (
IN UINT32 HID,
IN UINT32 UID
);
#endif

28
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
View File

@ -130,18 +130,25 @@ InitRootBridge (
RootBus->NoExtendedConfigSpace = FALSE;
DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate);
DevicePath = AllocateCopyPool (
sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate
);
if (DevicePath == NULL) {
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
return EFI_OUT_OF_RESOURCES;
}
DevicePath->AcpiDevicePath.UID = RootBusNumber;
RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
DEBUG ((DEBUG_INFO,
DEBUG ((
DEBUG_INFO,
"%a: populated root bus %d, with room for %d subordinate bus(es)\n",
__FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));
__FUNCTION__,
RootBusNumber,
MaxSubBusNumber - RootBusNumber
));
return EFI_SUCCESS;
}
@ -159,8 +166,11 @@ CreateRootBridgeDevicePath (
)
{
CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate);
DevicePath = AllocateCopyPool (
sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate
);
ASSERT (DevicePath != NULL);
DevicePath->AcpiDevicePath.HID = HID;
DevicePath->AcpiDevicePath.UID = UID;
@ -185,6 +195,7 @@ PciHostBridgeGetRootBridges (
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo;
EFI_HOB_GUID_TYPE *GuidHob;
UNIVERSAL_PAYLOAD_GENERIC_HEADER *GenericHeader;
//
// Find Universal Payload PCI Root Bridge Info hob
//
@ -203,6 +214,7 @@ PciHostBridgeGetRootBridges (
}
}
}
return ScanForRootBridges (Count);
}
@ -220,9 +232,10 @@ PciHostBridgeFreeRootBridges (
UINTN Count
)
{
if (Bridges == NULL && Count == 0) {
if ((Bridges == NULL) && (Count == 0)) {
return;
}
ASSERT (Bridges != NULL && Count > 0);
do {
@ -233,7 +246,6 @@ PciHostBridgeFreeRootBridges (
FreePool (Bridges);
}
/**
Inform the platform that the resource conflict happens.

74
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
View File

@ -63,9 +63,11 @@ AdjustRootBridgeResource (
if (MemAbove4G->Base < Mem->Base) {
Mem->Base = MemAbove4G->Base;
}
if (MemAbove4G->Limit > Mem->Limit) {
Mem->Limit = MemAbove4G->Limit;
}
MemAbove4G->Base = MAX_UINT64;
MemAbove4G->Limit = 0;
}
@ -74,9 +76,11 @@ AdjustRootBridgeResource (
if (PMemAbove4G->Base < Mem->Base) {
Mem->Base = PMemAbove4G->Base;
}
if (PMemAbove4G->Limit > Mem->Limit) {
Mem->Limit = PMemAbove4G->Limit;
}
PMemAbove4G->Base = MAX_UINT64;
PMemAbove4G->Limit = 0;
}
@ -196,11 +200,13 @@ PcatPciRootBridgeParseBars (
for (Offset = BarOffsetBase; Offset < BarOffsetEnd; Offset += sizeof (UINT32)) {
PcatPciRootBridgeBarExisted (
PCI_LIB_ADDRESS (Bus, Device, Function, Offset),
&OriginalValue, &Value
&OriginalValue,
&Value
);
if (Value == 0) {
continue;
}
if ((Value & BIT0) == BIT0) {
//
// IO Bar
@ -212,12 +218,14 @@ PcatPciRootBridgeParseBars (
if (!(Value & 0xFFFF0000)) {
Length &= 0x0000FFFF;
}
Limit = Base + Length - 1;
if ((Base > 0) && (Base < Limit)) {
if (Io->Base > Base) {
Io->Base = Base;
}
if (Io->Limit < Limit) {
Io->Limit = Limit;
}
@ -228,7 +236,6 @@ PcatPciRootBridgeParseBars (
// Mem Bar
//
if ((Command & EFI_PCI_COMMAND_MEMORY_SPACE) != 0) {
Mask = 0xfffffff0;
Base = OriginalValue & Mask;
Length = Value & Mask;
@ -274,6 +281,7 @@ PcatPciRootBridgeParseBars (
if (MemAperture->Base > Base) {
MemAperture->Base = Base;
}
if (MemAperture->Limit < Limit) {
MemAperture->Limit = Limit;
}
@ -315,7 +323,6 @@ ScanForRootBridges (
PCI_ROOT_BRIDGE *RootBridges;
UINTN BarOffsetEnd;
*NumberOfRootBridges = 0;
RootBridges = NULL;
@ -338,9 +345,7 @@ ScanForRootBridges (
// Scan all the PCI devices on the primary bus of the PCI root bridge
//
for (Device = 0, NumberOfDevices = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Function = 0; Function <= PCI_MAX_FUNC; Function++) {
//
// Compute the PCI configuration address of the PCI device to probe
//
@ -413,10 +418,12 @@ ScanForRootBridges (
Base |= ((UINT32)Pci.Bridge.IoBaseUpper16 << 16);
Limit |= ((UINT32)Pci.Bridge.IoLimitUpper16 << 16);
}
if ((Base > 0) && (Base < Limit)) {
if (Io.Base > Base) {
Io.Base = Base;
}
if (Io.Limit < Limit) {
Io.Limit = Limit;
}
@ -431,6 +438,7 @@ ScanForRootBridges (
if (Mem.Base > Base) {
Mem.Base = Base;
}
if (Mem.Limit < Limit) {
Mem.Limit = Limit;
}
@ -449,10 +457,12 @@ ScanForRootBridges (
Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);
MemAperture = &PMemAbove4G;
}
if ((Base > 0) && (Base < Limit)) {
if (MemAperture->Base > Base) {
MemAperture->Base = Base;
}
if (MemAperture->Limit < Limit) {
MemAperture->Limit = Limit;
}
@ -462,18 +472,22 @@ ScanForRootBridges (
// Look at the PPB Configuration for legacy decoding attributes
//
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_ISA)
== EFI_PCI_BRIDGE_CONTROL_ISA) {
== EFI_PCI_BRIDGE_CONTROL_ISA)
{
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;
}
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA)
== EFI_PCI_BRIDGE_CONTROL_VGA) {
== EFI_PCI_BRIDGE_CONTROL_VGA)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA_16)
!= 0) {
!= 0)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO_16;
}
@ -498,22 +512,30 @@ ScanForRootBridges (
OFFSET_OF (PCI_TYPE00, Device.Bar),
BarOffsetEnd,
&Io,
&Mem, &MemAbove4G,
&PMem, &PMemAbove4G
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G
);
//
// See if the PCI device is an IDE controller
//
if (IS_CLASS2 (&Pci, PCI_CLASS_MASS_STORAGE,
PCI_CLASS_MASS_STORAGE_IDE)) {
if (IS_CLASS2 (
&Pci,
PCI_CLASS_MASS_STORAGE,
PCI_CLASS_MASS_STORAGE_IDE
))
{
if (Pci.Hdr.ClassCode[0] & 0x80) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
if (Pci.Hdr.ClassCode[0] & 0x01) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
}
if (Pci.Hdr.ClassCode[0] & 0x04) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
@ -525,7 +547,8 @@ ScanForRootBridges (
//
if (IS_CLASS2 (&Pci, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA) ||
IS_CLASS2 (&Pci, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA)
) {
)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
@ -538,9 +561,10 @@ ScanForRootBridges (
// or ISA_POSITIVE_DECODE Bridge device
//
if (Pci.Hdr.ClassCode[2] == PCI_CLASS_BRIDGE) {
if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA ||
Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA ||
Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE) {
if ((Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) ||
(Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA) ||
(Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE))
{
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;
@ -551,7 +575,7 @@ ScanForRootBridges (
// If this device is not a multi function device, then skip the rest
// of this PCI device
//
if (Function == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
if ((Function == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
break;
}
}
@ -572,9 +596,16 @@ ScanForRootBridges (
AdjustRootBridgeResource (&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G);
InitRootBridge (
Attributes, Attributes, 0,
(UINT8) PrimaryBus, (UINT8) SubBus,
&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,
Attributes,
Attributes,
0,
(UINT8)PrimaryBus,
(UINT8)SubBus,
&Io,
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G,
&RootBridges[*NumberOfRootBridges]
);
RootBridges[*NumberOfRootBridges].ResourceAssigned = TRUE;
@ -612,15 +643,18 @@ RetrieveRootBridgeInfoFromHob (
if (PciRootBridgeInfo == NULL) {
return NULL;
}
if (PciRootBridgeInfo->Count == 0) {
return NULL;
}
Size = PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE);
PciRootBridges = (PCI_ROOT_BRIDGE *)AllocatePool (Size);
ASSERT (PciRootBridges != NULL);
if (PciRootBridges == NULL) {
return NULL;
}
ZeroMem (PciRootBridges, PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE));
//

1
UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.c
View File

@ -54,6 +54,7 @@ GetPciSegmentInfo (
AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
mPciSegment0.BaseAddress = AcpiBoardInfo->PcieBaseAddress;
}
*Count = 1;
return &mPciSegment0;
}

11
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
View File

@ -83,7 +83,8 @@ PlatformFindLoadOption (
(StrCmp (Key->Description, Array[Index].Description) == 0) &&
(CompareMem (Key->FilePath, Array[Index].FilePath, GetDevicePathSize (Key->FilePath)) == 0) &&
(Key->OptionalDataSize == Array[Index].OptionalDataSize) &&
(CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0)) {
(CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0))
{
return (INTN)Index;
}
}
@ -142,6 +143,7 @@ PlatformRegisterFvBootOption (
Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN)-1);
ASSERT_EFI_ERROR (Status);
}
EfiBootManagerFreeLoadOption (&NewOption);
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
}
@ -171,6 +173,7 @@ PlatformBootManagerBeforeConsole (
if (EFI_ERROR (Status)) {
mUniversalPayloadPlatformBootManagerOverrideInstance = NULL;
}
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->BeforeConsole ();
return;
@ -236,6 +239,7 @@ PlatformBootManagerAfterConsole (
mUniversalPayloadPlatformBootManagerOverrideInstance->AfterConsole ();
return;
}
Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;
White.Blue = White.Green = White.Red = White.Reserved = 0xFF;
@ -253,7 +257,6 @@ PlatformBootManagerAfterConsole (
L"ENTER to boot directly.\n"
L"\n"
);
}
/**
@ -270,6 +273,7 @@ PlatformBootManagerWaitCallback (
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->WaitCallback (TimeoutRemain);
}
return;
}
@ -289,6 +293,7 @@ PlatformBootManagerUnableToBoot (
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->UnableToBoot ();
}
return;
}
@ -328,11 +333,13 @@ PlatformBootManagerLibConstructor (
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) > GET_GUID_HOB_DATA_SIZE (GuidHob)) || (GenericHeader->Length > GET_GUID_HOB_DATA_SIZE (GuidHob))) {
return EFI_NOT_FOUND;
}
if (GenericHeader->Revision == UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION) {
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (GuidHob);
if (BootManagerMenuFile->Header.Length < UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU, FileName)) {
return EFI_NOT_FOUND;
}
Size = sizeof (BootManagerMenuFile->FileName);
Status = PcdSetPtrS (PcdBootManagerMenuFile, &Size, &BootManagerMenuFile->FileName);
ASSERT_EFI_ERROR (Status);

20
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
View File

@ -140,6 +140,7 @@ PrepareLpcBridgeDevicePath (
if (EFI_ERROR (Status)) {
return Status;
}
TempDevicePath = DevicePath;
//
@ -187,7 +188,7 @@ GetGopDevicePath (
UINTN GopHandleCount;
EFI_HANDLE *GopHandleBuffer;
if (PciDevicePath == NULL || GopDevicePath == NULL) {
if ((PciDevicePath == NULL) || (GopDevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@ -224,11 +225,13 @@ GetGopDevicePath (
if (EFI_ERROR (Status)) {
continue;
}
if (CompareMem (
PciDevicePath,
TempDevicePath,
GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH
) == 0) {
) == 0)
{
//
// In current implementation, we only enable one of the child handles
// as console device, i.e. sotre one of the child handle's device
@ -245,6 +248,7 @@ GetGopDevicePath (
EfiBootManagerUpdateConsoleVariable (ConOut, TempDevicePath, NULL);
}
}
gBS->FreePool (GopHandleBuffer);
}
@ -324,7 +328,6 @@ PreparePciSerialDevicePath (
return EFI_SUCCESS;
}
/**
For every PCI instance execute a callback function.
@ -383,7 +386,6 @@ VisitAllInstancesOfProtocol (
return EFI_SUCCESS;
}
/**
For every PCI instance execute a callback function.
@ -427,10 +429,8 @@ VisitingAPciInstance (
PciIo,
&Pci
);
}
/**
For every PCI instance execute a callback function.
@ -452,7 +452,6 @@ VisitAllPciInstances (
);
}
/**
Do platform specific PCI Device check and add them to
ConOut, ConIn, ErrOut.
@ -491,7 +490,8 @@ DetectAndPreparePlatformPciDevicePath (
((IS_PCI_ISA_PDECODE (Pci)) &&
(Pci->Hdr.VendorId == 0x8086)
)
) {
)
{
//
// Add IsaKeyboard to ConIn,
// add IsaSerial to ConOut, ConIn, ErrOut
@ -500,6 +500,7 @@ DetectAndPreparePlatformPciDevicePath (
PrepareLpcBridgeDevicePath (Handle);
return EFI_SUCCESS;
}
//
// Here we decide which Serial device to enable in PCI bus
//
@ -528,7 +529,6 @@ DetectAndPreparePlatformPciDevicePath (
return Status;
}
/**
Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut
@ -554,7 +554,6 @@ DetectAndPreparePlatformPciDevicePaths (
return VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);
}
/**
The function will connect root bridge
@ -611,5 +610,4 @@ PlatformConsoleInit (
// Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut
//
DetectAndPreparePlatformPciDevicePaths (FALSE);
}

1
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformData.c
View File

@ -18,7 +18,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[
}
};
GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {
{
{

4
UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
View File

@ -13,7 +13,6 @@
#include <Library/PcdLib.h>
#include <Library/HobLib.h>
/** Library Constructor
@retval RETURN_SUCCESS Success.
@ -75,14 +74,17 @@ PlatformHookSerialPortInitialize (
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet64S (PcdSerialRegisterBase, SerialPortInfo->RegisterBase);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialRegisterStride, SerialPortInfo->RegisterStride);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialBaudRate, SerialPortInfo->BaudRate);
if (RETURN_ERROR (Status)) {
return Status;

1
UefiPayloadPkg/Library/PlatformSupportLibNull/PlatformSupportLibNull.c
View File

@ -26,4 +26,3 @@ ParsePlatformInfo (
{
return EFI_SUCCESS;
}

7
UefiPayloadPkg/Library/SblParseLib/SblParseLib.c
View File

@ -38,14 +38,14 @@ GetParameterBase (
HandoffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)(UINTN)GET_BOOTLOADER_PARAMETER ();
if ((HandoffTable->Header.HobType == EFI_HOB_TYPE_HANDOFF) &&
(HandoffTable->Header.HobLength == sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) &&
(HandoffTable->Header.Reserved == 0)) {
(HandoffTable->Header.Reserved == 0))
{
return (VOID *)HandoffTable;
}
return NULL;
}
/**
This function retrieves a GUIDed HOB data from Slim Bootloader.
@ -137,7 +137,6 @@ ParseSmbiosTable (
return RETURN_SUCCESS;
}
/**
Acquire ACPI table from slim bootloader.
@ -194,7 +193,6 @@ ParseSerialInfo (
return RETURN_SUCCESS;
}
/**
Find the video frame buffer information
@ -291,4 +289,3 @@ ParseMiscInfo (
return Status;
}

11
UefiPayloadPkg/Library/SpiFlashLib/PchSpi.c
View File

@ -35,8 +35,6 @@ ReleaseSpiBar0 (
{
}
/**
This function is to enable/disable BIOS Write Protect in SMM phase.
@ -70,7 +68,6 @@ CpuSmmDisableBiosWriteProtect (
Data32 = MmioRead32 (0xFED30880);
}
/**
This function is a hook for Spi to disable BIOS Write Protect.
@ -88,7 +85,6 @@ DisableBiosWriteProtect (
IN UINT8 CpuSmmBwp
)
{
//
// Write clear BC_SYNC_SS prior to change WPD from 0 to 1.
//
@ -120,7 +116,6 @@ EnableBiosWriteProtect (
IN UINT8 CpuSmmBwp
)
{
//
// Disable the access to the BIOS space for write cycles
//
@ -149,9 +144,11 @@ SaveAndDisableSpiPrefetchCache (
BiosCtlSave = MmioRead8 (PchSpiBase + R_SPI_BCR) & B_SPI_BCR_SRC;
MmioAndThenOr32 (PchSpiBase + R_SPI_BCR, \
MmioAndThenOr32 (
PchSpiBase + R_SPI_BCR, \
(UINT32)(~B_SPI_BCR_SRC), \
(UINT32) (V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC));
(UINT32)(V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC)
);
return BiosCtlSave;
}

9
UefiPayloadPkg/Library/SpiFlashLib/RegsSpi.h
View File

@ -38,11 +38,9 @@
#define B_SPI_HSFS_FCERR BIT1 ///< Flash Cycle Error
#define B_SPI_HSFS_FDONE BIT0 ///< Flash Cycle Done
#define R_SPI_FADDR 0x08 ///< SPI Flash Address
#define B_SPI_FADDR_MASK 0x07FFFFFF ///< SPI Flash Address Mask (0~26bit)
#define R_SPI_FDATA00 0x10 ///< SPI Data 00 (32 bits)
#define R_SPI_FRAP 0x50 ///< SPI Flash Regions Access Permissions Register
@ -57,7 +55,6 @@
#define B_SPI_FRAP_BRRA_BIOS BIT1 ///< Region Read Access for Region1 BIOS
#define B_SPI_FRAP_BRRA_FLASHD BIT0 ///< Region Read Access for Region0 Flash Descriptor
#define R_SPI_FREG0_FLASHD 0x54 ///< Flash Region 0 (Flash Descriptor) (32bits)
#define B_SPI_FREG0_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG0_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
@ -88,14 +85,12 @@
#define B_SPI_FREG4_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG4_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define S_SPI_FREGX 4 ///< Size of Flash Region register
#define B_SPI_FREGX_LIMIT_MASK 0x7FFF0000 ///< Flash Region Limit [30:16] represents [26:12], [11:0] are assumed to be FFFh
#define N_SPI_FREGX_LIMIT 16 ///< Region limit bit position
#define N_SPI_FREGX_LIMIT_REPR 12 ///< Region limit bit represents position
#define B_SPI_FREGX_BASE_MASK 0x00007FFF ///< Flash Region Base, [14:0] represents [26:12]
#define R_SPI_FDOC 0xB4 ///< Flash Descriptor Observability Control Register (32 bits)
#define B_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) ///< Flash Descriptor Section Select
#define V_SPI_FDOC_FDSS_FSDM 0x0000 ///< Flash Signature and Descriptor Map
@ -104,13 +99,11 @@
#define R_SPI_FDOD 0xB8 ///< Flash Descriptor Observability Data Register (32 bits)
#define R_SPI_LVSCC 0xC4 ///< Vendor Specific Component Capabilities for Component 0 (32 bits)
#define B_SPI_LVSCC_EO_64K BIT29 ///< < 64k Erase valid (EO_64k_valid)
#define R_SPI_UVSCC 0xC8 ///< Vendor Specific Component Capabilities for Component 1 (32 bits)
#define R_SPI_FDBAR_FLASH_MAP0 0x14 ///< Flash MAP 0
#define N_SPI_FDBAR_NC 8 ///< < Number Of Components
#define B_SPI_FDBAR_NC 0x00000300 ///< Number Of Components
@ -118,12 +111,10 @@
#define R_SPI_FDBAR_FLASH_MAP1 0x18 ///< Flash MAP 1
#define B_SPI_FDBAR_FPSBA 0x00FF0000 ///< Flash Strap Base Address
//
// Flash Component Base Address (FCBA) from Flash Region 0
//
#define R_SPI_FCBA_FLCOMP 0x00 ///< Flash Components Register
#define B_SPI_FLCOMP_COMP1_MASK 0x0F ///< Flash Component 1 Density
#endif

5
UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h
View File

@ -73,7 +73,6 @@ typedef struct {
UINT32 Component1StartAddr;
} SPI_INSTANCE;
/**
Acquire SPI MMIO BAR
@ -87,7 +86,6 @@ AcquireSpiBar0 (
IN UINTN PchSpiBase
);
/**
Release SPI MMIO BAR. Do nothing.
@ -101,7 +99,6 @@ ReleaseSpiBar0 (
IN UINTN PchSpiBase
);
/**
This function is a hook for Spi to disable BIOS Write Protect
@ -135,7 +132,6 @@ EnableBiosWriteProtect (
IN UINT8 CpuSmmBwp
);
/**
This function disables SPI Prefetching and caching,
and returns previous BIOS Control Register value before disabling.
@ -165,7 +161,6 @@ SetSpiBiosControlRegister (
IN UINT8 BiosCtlValue
);
/**
This function sends the programmed SPI command to the slave device.

32
UefiPayloadPkg/Library/SpiFlashLib/SpiFlashLib.c
View File

@ -24,13 +24,13 @@ GetSpiInstance (
if (mSpiInstance == NULL) {
return NULL;
}
ZeroMem (mSpiInstance, sizeof (SPI_INSTANCE));
}
return mSpiInstance;
}
/**
Initialize an SPI library.
@ -57,6 +57,7 @@ SpiConstructor (
ASSERT (FALSE);
return EFI_NOT_FOUND;
}
SpiFlashInfo = (SPI_FLASH_INFO *)GET_GUID_HOB_DATA (GuidHob);
//
@ -66,6 +67,7 @@ SpiConstructor (
if (SpiInstance == NULL) {
return EFI_NOT_FOUND;
}
DEBUG ((DEBUG_INFO, "SpiInstance = %08X\n", SpiInstance));
SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;
@ -77,9 +79,11 @@ SpiConstructor (
if ((SpiFlashInfo->SpiAddress.AddressSpaceId != EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE) ||
(SpiFlashInfo->SpiAddress.RegisterBitWidth != 32) ||
(SpiFlashInfo->SpiAddress.RegisterBitOffset != 0) ||
(SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD)){
(SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD))
{
DEBUG ((DEBUG_ERROR, "SPI FLASH HOB is not expected. need check the hob or enhance SPI flash driver.\n"));
}
SpiInstance->PchSpiBase = (UINT32)(UINTN)SpiFlashInfo->SpiAddress.Address;
SpiInstance->Flags = SpiFlashInfo->Flags;
DEBUG ((DEBUG_INFO, "PchSpiBase at 0x%x\n", SpiInstance->PchSpiBase));
@ -146,7 +150,6 @@ SpiConstructor (
return EFI_SUCCESS;
}
/**
Read data from the flash part.
@ -453,6 +456,7 @@ SendSpiCmd (
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
BiosCtlSave = SaveAndDisableSpiPrefetchCache (SpiBaseAddress);
}
@ -467,8 +471,8 @@ SendSpiCmd (
HardwareSpiAddr = Address;
if ((FlashCycleType == FlashCycleRead) ||
(FlashCycleType == FlashCycleWrite) ||
(FlashCycleType == FlashCycleErase)) {
(FlashCycleType == FlashCycleErase))
{
switch (FlashRegionType) {
case FlashRegionDescriptor:
if (FlashCycleType == FlashCycleRead) {
@ -476,6 +480,7 @@ SendSpiCmd (
} else {
PermissionBit = B_SPI_FRAP_BRWA_FLASHD;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);
HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;
LimitAddress = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;
@ -487,6 +492,7 @@ SendSpiCmd (
} else {
PermissionBit = B_SPI_FRAP_BRWA_BIOS;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);
HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;
LimitAddress = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;
@ -498,6 +504,7 @@ SendSpiCmd (
} else {
PermissionBit = B_SPI_FRAP_BRWA_SEC;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);
HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;
LimitAddress = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;
@ -509,6 +516,7 @@ SendSpiCmd (
} else {
PermissionBit = B_SPI_FRAP_BRWA_GBE;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);
HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;
LimitAddress = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;
@ -520,6 +528,7 @@ SendSpiCmd (
} else {
PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);
HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;
LimitAddress = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;
@ -574,6 +583,7 @@ SendSpiCmd (
Status = EFI_INVALID_PARAMETER;
goto SendSpiCmdEnd;
}
break;
case FlashCycleReadSfdp:
@ -615,6 +625,7 @@ SendSpiCmd (
if (HardwareSpiAddr + ByteCount > ((HardwareSpiAddr + BIT8) &~(BIT8 - 1))) {
SpiDataCount = (((UINT32)(HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32)(HardwareSpiAddr);
}
//
// Calculate the number of bytes to shift in/out during the SPI data cycle.
// Valid settings for the number of bytes during each data portion of the
@ -630,7 +641,8 @@ SendSpiCmd (
if (FlashCycleType == FlashCycleErase) {
if (((ByteCount / SIZE_64KB) != 0) &&
((ByteCount % SIZE_64KB) == 0) &&
((HardwareSpiAddr % SIZE_64KB) == 0)) {
((HardwareSpiAddr % SIZE_64KB) == 0))
{
if (HardwareSpiAddr < SpiInstance->Component1StartAddr) {
//
// Check whether Component0 support 64k Erase
@ -653,6 +665,7 @@ SendSpiCmd (
} else {
SpiDataCount = SIZE_4KB;
}
if (SpiDataCount == SIZE_4KB) {
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);
} else {
@ -709,7 +722,8 @@ SendSpiCmd (
if ((FlashCycleType == FlashCycleRead) ||
(FlashCycleType == FlashCycleReadSfdp) ||
(FlashCycleType == FlashCycleReadJedecId) ||
(FlashCycleType == FlashCycleReadStatus)) {
(FlashCycleType == FlashCycleReadStatus))
{
if ((SpiDataCount & 0x07) != 0) {
//
// Use Byte read if Data Count is 0, 1, 2, 3, 4, 5, 6, 7
@ -783,8 +797,10 @@ WaitForSpiCycleComplete (
return TRUE;
}
}
MicroSecondDelay (WAIT_PERIOD);
}
return FALSE;
}
@ -825,9 +841,11 @@ SpiGetRegionAddress (
if (BaseAddress != NULL) {
*BaseAddress = 0;
}
if (RegionSize != NULL) {
*RegionSize = SpiInstance->Component1StartAddr;
}
return EFI_SUCCESS;
}

2
UefiPayloadPkg/PayloadLoaderPeim/ElfLib.h
View File

@ -32,7 +32,6 @@ typedef struct {
UINTN EntryPoint; ///< Return the actual entry point after LoadElfImage().
} ELF_IMAGE_CONTEXT;
typedef struct {
UINT32 PtType;
UINTN Offset;
@ -119,4 +118,5 @@ GetElfSectionPos (
OUT UINTN *Offset,
OUT UINTN *Size
);
#endif /* ELF_LIB_H_ */

13
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf32.h
View File

@ -37,7 +37,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SYS_ELF32_H_
#define _SYS_ELF32_H_ 1
/*
* ELF definitions common to all 32-bit architectures.
*/
@ -207,8 +206,7 @@ typedef struct {
#define ELF32_ST_VISIBILITY(oth) ((oth) & 0x3)
/* Structures used by Sun & GNU symbol versioning. */
typedef struct
{
typedef struct {
Elf32_Half vd_version;
Elf32_Half vd_flags;
Elf32_Half vd_ndx;
@ -218,14 +216,12 @@ typedef struct
Elf32_Word vd_next;
} Elf32_Verdef;
typedef struct
{
typedef struct {
Elf32_Word vda_name;
Elf32_Word vda_next;
} Elf32_Verdaux;
typedef struct
{
typedef struct {
Elf32_Half vn_version;
Elf32_Half vn_cnt;
Elf32_Word vn_file;
@ -233,8 +229,7 @@ typedef struct
Elf32_Word vn_next;
} Elf32_Verneed;
typedef struct
{
typedef struct {
Elf32_Word vna_hash;
Elf32_Half vna_flags;
Elf32_Half vna_other;

35
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf32Lib.c
View File

@ -83,8 +83,10 @@ GetElf32SectionByRange (
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {
return Shdr;
}
Shdr = ELF_NEXT_ENTRY (Elf32_Shdr, Shdr, Ehdr->e_shentsize);
}
return NULL;
}
@ -117,7 +119,8 @@ ProcessRelocation32 (
for ( Index = 0
; RelaEntrySize * Index < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf32_Rela, Rela, RelaEntrySize)
) {
)
{
//
// r_offset is the virtual address of the storage unit affected by the relocation.
//
@ -141,6 +144,7 @@ ProcessRelocation32 (
} else {
*Ptr += (UINT32)Delta;
}
break;
case R_386_RELATIVE:
@ -178,12 +182,14 @@ ProcessRelocation32 (
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
ASSERT (FALSE);
}
break;
default:
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
}
}
return EFI_SUCCESS;
}
@ -239,6 +245,7 @@ RelocateElf32Dynamic (
if (DynShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));
@ -253,7 +260,8 @@ RelocateElf32Dynamic (
for ( Index = 0, Dyn = (Elf32_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)
; Index < DynShdr->sh_size / DynShdr->sh_entsize
; Index++, Dyn = ELF_NEXT_ENTRY (Elf32_Dyn, Dyn, DynShdr->sh_entsize)
) {
)
{
switch (Dyn->d_tag) {
case DT_RELA:
case DT_REL:
@ -304,12 +312,14 @@ RelocateElf32Dynamic (
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {
break;
}
RelShdr = NULL;
}
if (RelShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (RelShdr->sh_type == RelaType);
ASSERT (RelShdr->sh_entsize == RelaEntrySize);
@ -318,7 +328,9 @@ RelocateElf32Dynamic (
//
ProcessRelocation32 (
(Elf32_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
(UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,
TRUE
);
@ -376,10 +388,12 @@ RelocateElf32Sections (
for ( Index = 0, RelShdr = (Elf32_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf32_Shdr, RelShdr, Ehdr->e_shentsize)
) {
)
{
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
Shdr = GetElf32SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {
//
@ -387,8 +401,11 @@ RelocateElf32Sections (
//
ProcessRelocation32 (
(Elf32_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
Delta, FALSE
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
Delta,
FALSE
);
}
}
@ -429,12 +446,14 @@ LoadElf32Image (
for ( Index = 0, Phdr = (Elf32_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf32_Phdr, Phdr, Ehdr->e_phentsize)
) {
)
{
//
// Skip segments that don't require load (type tells, or size is 0)
//
if ((Phdr->p_type != PT_LOAD) ||
(Phdr->p_memsz == 0)) {
(Phdr->p_memsz == 0))
{
continue;
}

1
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64.h
View File

@ -36,7 +36,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _SYS_ELF64_H_
#define _SYS_ELF64_H_ 1
/*
* ELF definitions common to all 64-bit architectures.
*/

35
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c
View File

@ -83,8 +83,10 @@ GetElf64SectionByRange (
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {
return Shdr;
}
Shdr = ELF_NEXT_ENTRY (Elf64_Shdr, Shdr, Ehdr->e_shentsize);
}
return NULL;
}
@ -117,7 +119,8 @@ ProcessRelocation64 (
for ( Index = 0
; MultU64x64 (RelaEntrySize, Index) < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf64_Rela, Rela, RelaEntrySize)
) {
)
{
//
// r_offset is the virtual address of the storage unit affected by the relocation.
//
@ -142,6 +145,7 @@ ProcessRelocation64 (
} else {
*Ptr += Delta;
}
break;
case R_X86_64_32:
@ -187,12 +191,14 @@ ProcessRelocation64 (
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
ASSERT (FALSE);
}
break;
default:
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
}
}
return EFI_SUCCESS;
}
@ -248,6 +254,7 @@ RelocateElf64Dynamic (
if (DynShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));
@ -262,7 +269,8 @@ RelocateElf64Dynamic (
for ( Index = 0, Dyn = (Elf64_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)
; Index < DivU64x64Remainder (DynShdr->sh_size, DynShdr->sh_entsize, NULL)
; Index++, Dyn = ELF_NEXT_ENTRY (Elf64_Dyn, Dyn, DynShdr->sh_entsize)
) {
)
{
switch (Dyn->d_tag) {
case DT_RELA:
case DT_REL:
@ -313,12 +321,14 @@ RelocateElf64Dynamic (
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {
break;
}
RelShdr = NULL;
}
if (RelShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (RelShdr->sh_type == RelaType);
ASSERT (RelShdr->sh_entsize == RelaEntrySize);
@ -327,7 +337,9 @@ RelocateElf64Dynamic (
//
ProcessRelocation64 (
(Elf64_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
(UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,
TRUE
);
@ -385,10 +397,12 @@ RelocateElf64Sections (
for ( Index = 0, RelShdr = (Elf64_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf64_Shdr, RelShdr, Ehdr->e_shentsize)
) {
)
{
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
Shdr = GetElf64SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {
//
@ -396,8 +410,11 @@ RelocateElf64Sections (
//
ProcessRelocation64 (
(Elf64_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
Delta, FALSE
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
Delta,
FALSE
);
}
}
@ -438,12 +455,14 @@ LoadElf64Image (
for ( Index = 0, Phdr = (Elf64_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf64_Phdr, Phdr, Ehdr->e_phentsize)
) {
)
{
//
// Skip segments that don't require load (type tells, or size is 0)
//
if ((Phdr->p_type != PT_LOAD) ||
(Phdr->p_memsz == 0)) {
(Phdr->p_memsz == 0))
{
continue;
}

1
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfCommon.h
View File

@ -979,5 +979,4 @@ typedef struct {
#define R_X86_64_GOTPCRELX 41 /* Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable. */
#define R_X86_64_REX_GOTPCRELX 42 /* Load from 32 bit signed pc relative offset to GOT entry with REX prefix, relaxable. */
#endif /* !_SYS_ELF_COMMON_H_ */

16
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfLib.c
View File

@ -35,7 +35,8 @@ IsElfFormat (
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||
(Elf32Hdr->e_ident[EI_MAG2] != ELFMAG2)
) {
)
{
return FALSE;
}
@ -101,6 +102,7 @@ IsElfFormat (
return FALSE;
}
}
return TRUE;
}
@ -137,6 +139,7 @@ CalculateElfFileSize (
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
FileSize1 = Offset + Size;
// Use end of section header as end of file
@ -241,6 +244,7 @@ ParseElfImage (
if (ElfCt == NULL) {
return EFI_INVALID_PARAMETER;
}
ZeroMem (ElfCt, sizeof (ELF_IMAGE_CONTEXT));
if (ImageBase == NULL) {
@ -258,10 +262,12 @@ ParseElfImage (
if ((Elf32Hdr->e_type != ET_EXEC) && (Elf32Hdr->e_type != ET_DYN)) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
Elf32Shdr = (Elf32_Shdr *)GetElf32SectionByIndex (ElfCt->FileBase, Elf32Hdr->e_shstrndx);
if (Elf32Shdr == NULL) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
ElfCt->EntryPoint = (UINTN)Elf32Hdr->e_entry;
ElfCt->ShNum = Elf32Hdr->e_shnum;
ElfCt->PhNum = Elf32Hdr->e_phnum;
@ -272,10 +278,12 @@ ParseElfImage (
if ((Elf64Hdr->e_type != ET_EXEC) && (Elf64Hdr->e_type != ET_DYN)) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
Elf64Shdr = (Elf64_Shdr *)GetElf64SectionByIndex (ElfCt->FileBase, Elf64Hdr->e_shstrndx);
if (Elf64Shdr == NULL) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
ElfCt->EntryPoint = (UINTN)Elf64Hdr->e_entry;
ElfCt->ShNum = Elf64Hdr->e_shnum;
ElfCt->PhNum = Elf64Hdr->e_phnum;
@ -307,10 +315,12 @@ ParseElfImage (
if (Base > (SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1))) {
Base = SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1);
}
if (End < ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1) {
End = ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1;
}
}
//
// 0 - MAX_UINT32 + 1 equals to 0.
//
@ -318,7 +328,7 @@ ParseElfImage (
ElfCt->PreferredImageAddress = (VOID *)Base;
CalculateElfFileSize (ElfCt, &ElfCt->FileSize);
return (ElfCt->ParseStatus = EFI_SUCCESS);;
return (ElfCt->ParseStatus = EFI_SUCCESS);
}
/**
@ -366,7 +376,6 @@ LoadElfImage (
return Status;
}
/**
Get a ELF section name from its index.
@ -419,7 +428,6 @@ GetElfSectionName (
return EFI_SUCCESS;
}
/**
Get the offset and size of x-th ELF section.

1
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfLibInternal.h
View File

@ -20,7 +20,6 @@
#define ELF_NEXT_ENTRY(EntryType, Current, EntrySize) \
((EntryType *) ((UINT8 *)Current + EntrySize))
/**
Return the section header specified by Index.

16
UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c
View File

@ -75,8 +75,11 @@ PeiLoadFileLoadPayload (
} while (EFI_ERROR (Status));
DEBUG ((
DEBUG_INFO, "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
Context.FileSize, Context.ImageSize, Context.ReloadRequired
DEBUG_INFO,
"Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
Context.FileSize,
Context.ImageSize,
Context.ReloadRequired
));
//
@ -89,6 +92,7 @@ PeiLoadFileLoadPayload (
if (EFI_ERROR (Status)) {
continue;
}
DEBUG ((DEBUG_INFO, "Payload Section[%d]: %a\n", Index, SectionName));
if (AsciiStrCmp (SectionName, UNIVERSAL_PAYLOAD_INFO_SEC_NAME) == 0) {
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);
@ -120,6 +124,7 @@ PeiLoadFileLoadPayload (
if (EFI_ERROR (Status)) {
continue;
}
if (AsciiStrnCmp (SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);
if (!EFI_ERROR (Status)) {
@ -137,7 +142,7 @@ PeiLoadFileLoadPayload (
}
}
if (Context.ReloadRequired || Context.PreferredImageAddress != Context.FileBase) {
if (Context.ReloadRequired || (Context.PreferredImageAddress != Context.FileBase)) {
Context.ImageAddress = AllocatePages (EFI_SIZE_TO_PAGES (Context.ImageSize));
} else {
Context.ImageAddress = Context.FileBase;
@ -152,20 +157,20 @@ PeiLoadFileLoadPayload (
*EntryPoint = Context.EntryPoint;
*ImageSizeArg = Context.ImageSize;
}
return Status;
}
EFI_PEI_LOAD_FILE_PPI mPeiLoadFilePpi = {
PeiLoadFileLoadPayload
};
EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiLoadFilePpiGuid,
&mPeiLoadFilePpi
};
/**
Install Pei Load File PPI.
@ -185,6 +190,7 @@ InitializePayloadLoaderPeim (
)
{
EFI_STATUS Status;
Status = PeiServicesInstallPpi (&gPpiLoadFilePpiList);
return Status;

18
UefiPayloadPkg/PchSmiDispatchSmm/PchSmiDispatchSmm.c
View File

@ -44,6 +44,7 @@ FindContextBySwSmiInputValue (
return Dispatch2Context;
}
}
return NULL;
}
@ -69,6 +70,7 @@ FindContextByDispatchHandle (
return Dispatch2Context;
}
}
return NULL;
}
@ -122,6 +124,7 @@ SmmSwDispatcher (
if (EFI_ERROR (Status)) {
continue;
}
if (IoInfo.IoPort == SMM_CONTROL_PORT) {
//
// Great! Find it.
@ -147,6 +150,7 @@ SmmSwDispatcher (
Status = EFI_SUCCESS;
goto End;
}
DEBUG ((DEBUG_VERBOSE, "Prepare to call handler for 0x%x\n", SwContext.CommandPort));
//
@ -163,7 +167,6 @@ End:
//
IoOr32 (mSmiPchReg.SmiApmStsAddr, 1 << mSmiPchReg.ApmBitOffset);
//
// Set EOS bit
//
@ -172,7 +175,6 @@ End:
return Status;
}
/**
Check the SwSmiInputValue is already used
@ -201,7 +203,6 @@ SmiInputValueCheck (
return EFI_SUCCESS;
}
/**
Register a child SMI source dispatch function for the specified software SMI.
@ -256,6 +257,7 @@ SmmSwDispatch2Register (
break;
}
}
if (RegContext->SwSmiInputValue == (UINTN)-1) {
return EFI_OUT_OF_RESOURCES;
}
@ -285,7 +287,6 @@ SmmSwDispatch2Register (
return Status;
}
/**
Unregister a child SMI source dispatch function for the specified software SMI.
@ -320,14 +321,12 @@ SmmSwDispatch2UnRegister (
return EFI_SUCCESS;
}
EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {
SmmSwDispatch2Register,
SmmSwDispatch2UnRegister,
MAXIMUM_SWI_VALUE
};
/**
Get specified SMI register based on given register ID
@ -367,7 +366,8 @@ GetSmmCtrlRegById (
(PldReg->Address.Address == 0) ||
(PldReg->Address.RegisterBitWidth != 1) ||
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||
(PldReg->Value != 1)) {
(PldReg->Value != 1))
{
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));
@ -380,7 +380,6 @@ GetSmmCtrlRegById (
return PldReg;
}
/**
Entry Point for this driver.
@ -415,6 +414,7 @@ PchSmiDispatchEntryPoint (
DEBUG ((DEBUG_ERROR, "SMI EOS reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiPchReg.SmiEosAddr = (UINT32)SmiEosReg->Address.Address;
mSmiPchReg.EosBitOffset = SmiEosReg->Address.RegisterBitOffset;
@ -423,6 +423,7 @@ PchSmiDispatchEntryPoint (
DEBUG ((DEBUG_ERROR, "SMI APM status reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiPchReg.SmiApmStsAddr = (UINT32)SmiApmStsReg->Address.Address;
mSmiPchReg.ApmBitOffset = SmiApmStsReg->Address.RegisterBitOffset;
@ -452,4 +453,3 @@ PchSmiDispatchEntryPoint (
return Status;
}

1
UefiPayloadPkg/PchSmiDispatchSmm/PchSmiDispatchSmm.h
View File

@ -34,4 +34,3 @@ typedef struct {
} EFI_SMM_SW_DISPATCH2_CONTEXT;
#endif

10
UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.c
View File

@ -215,20 +215,26 @@ SmmAccessEntryPoint (
DEBUG ((DEBUG_INFO, "SMRAM HOB NOT found\n"));
return EFI_NOT_FOUND;
}
SmramHob = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)GET_GUID_HOB_DATA (GuidHob);
SmmRegionNum = SmramHob->NumberOfSmmReservedRegions;
mSmmAccess.SmramDesc = AllocateZeroPool (sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);
if (mSmmAccess.SmramDesc == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmmAccess.SmramDesc, &SmramHob->Descriptor, sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);
DEBUG ((DEBUG_INFO, "NumberOfSmmReservedRegions = 0x%x\n", SmmRegionNum));
for (Index = 0; Index < SmmRegionNum; Index++) {
DEBUG ((DEBUG_INFO, "%d: base=0x%x, size = 0x%x, State=0x%x\n",Index,
DEBUG ((
DEBUG_INFO,
"%d: base=0x%x, size = 0x%x, State=0x%x\n",
Index,
SmramHob->Descriptor[Index].PhysicalStart,
SmramHob->Descriptor[Index].PhysicalSize,
SmramHob->Descriptor[Index].RegionState));
SmramHob->Descriptor[Index].RegionState
));
mSmmAccess.SmramDesc[Index].RegionState &= EFI_ALLOCATED;
mSmmAccess.SmramDesc[Index].RegionState |= EFI_SMRAM_CLOSED | EFI_CACHEABLE;
}

1
UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.h
View File

@ -19,7 +19,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/BaseMemoryLib.h>
#include <Guid/SmramMemoryReserve.h>
#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('S', 'M', 'M', 'A')
typedef struct {

8
UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.c
View File

@ -150,7 +150,8 @@ GetSmmCtrlRegById (
(PldReg->Address.Address == 0) ||
(PldReg->Address.RegisterBitWidth != 1) ||
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||
(PldReg->Value != 1)) {
(PldReg->Value != 1))
{
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));
@ -159,10 +160,10 @@ GetSmmCtrlRegById (
DEBUG ((DEBUG_INFO, "Address = 0x%lx\n", PldReg->Address.Address));
return NULL;
}
return PldReg;
}
/**
Fixup data pointers so that the services can be called in virtual mode.
@ -181,7 +182,6 @@ SmmControlVirtualAddressChangeEvent (
EfiConvertPointer (0x0, (VOID **)&(mSmmControl2.Clear));
}
/**
This function installs EFI_SMM_CONTROL2_PROTOCOL.
@ -217,6 +217,7 @@ SmmControlEntryPoint (
DEBUG ((DEBUG_ERROR, "SMI global enable reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiCtrlReg.Address = (UINT32)SmiGblEnReg->Address.Address;
mSmiCtrlReg.GblBitOffset = SmiGblEnReg->Address.RegisterBitOffset;
@ -231,6 +232,7 @@ SmmControlEntryPoint (
DEBUG ((DEBUG_ERROR, "APM:0x%x, GBL:0x%x\n", SmiApmEnReg->Address.Address, mSmiCtrlReg.Address));
return EFI_UNSUPPORTED;
}
mSmiCtrlReg.ApmBitOffset = SmiApmEnReg->Address.RegisterBitOffset;
//

17
UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c
View File

@ -9,7 +9,6 @@
#include "UefiPayloadEntry.h"
/**
Find the board related info from ACPI table
@ -116,6 +115,7 @@ Done:
AcpiBoardInfo->PcieBaseAddress = 0;
AcpiBoardInfo->PcieBaseSize = 0;
}
DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
@ -156,21 +156,25 @@ Done:
if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
(Fadt->SmiCmd == 0) &&
!SciEnabled) {
!SciEnabled)
{
//
// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
// table does not provide a means to enable it through FADT->SmiCmd
//
DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
DEBUG ((
DEBUG_ERROR,
"ERROR: The ACPI enabling status is inconsistent: SCI is not"
" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
" This may cause issues in OS.\n"));
" This may cause issues in OS.\n"
));
}
DEBUG_CODE_END ();
return RETURN_SUCCESS;
}
/**
Build ACPI board info HOB using infomation from ACPI table
@ -196,7 +200,6 @@ BuildHobFromAcpi (
CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));
}
return NewAcpiBoardInfo;
}

44
UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
View File

@ -36,15 +36,33 @@ typedef struct _X64_IDT_TABLE {
//
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
/* selector { Global Segment Descriptor } */
/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
/* 0x00 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // null descriptor
/* 0x08 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear data segment descriptor
/* 0x10 */ {
{ 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear code segment descriptor
/* 0x18 */ {
{ 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x20 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system code segment descriptor
/* 0x28 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
/* 0x30 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x38 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 }
}, // system code segment descriptor
/* 0x40 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
};
//
@ -125,9 +143,10 @@ Create4GPageTablesIa32Pae (
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {
if ((IsNullDetectionEnabled () && PhysicalAddress == 0)
if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0))
|| ( (PhysicalAddress < StackBase + StackSize)
&& ((PhysicalAddress + SIZE_2MB) > StackBase))) {
&& ((PhysicalAddress + SIZE_2MB) > StackBase)))
{
//
// Need to split this 2M page that covers stack range.
//
@ -331,7 +350,6 @@ HandOffToDxeCore (
gLidtDescriptor.Base = (UINTN)IdtTable;
AsmWriteIdtr (&gLidtDescriptor);
DEBUG ((
@ -360,6 +378,4 @@ HandOffToDxeCore (
ASSERT (FALSE);
CpuDeadLoop ();
}
}

10
UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c
View File

@ -35,6 +35,7 @@ AllocateCodePages (
Hob.MemoryAllocation->AllocDescriptor.MemoryType = EfiBootServicesCode;
return Alloc;
}
Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, GET_NEXT_HOB (Hob));
}
@ -44,7 +45,6 @@ AllocateCodePages (
return NULL;
}
/**
Loads and relocates a PE/COFF image
@ -86,6 +86,7 @@ LoadPeCoffImage (
if (Buffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;
//
@ -174,7 +175,7 @@ FvFindFileByTypeGuid (
// Look for file type
//
if (File->Type == FileType) {
if (Guid == NULL || CompareGuid(&File->Name, Guid)) {
if ((Guid == NULL) || CompareGuid (&File->Name, Guid)) {
*FileHeader = File;
return EFI_SUCCESS;
}
@ -184,7 +185,6 @@ FvFindFileByTypeGuid (
return EFI_NOT_FOUND;
}
/**
This function searchs a given section type within a valid FFS file.
@ -214,6 +214,7 @@ FileFindSection (
} else {
FileSize = FFS_FILE_SIZE (FileHeader);
}
FileSize -= sizeof (EFI_FFS_FILE_HEADER);
Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);
@ -225,6 +226,7 @@ FileFindSection (
} else {
*SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER));
}
return EFI_SUCCESS;
}
@ -244,7 +246,6 @@ FileFindSection (
return EFI_NOT_FOUND;
}
/**
Find DXE core from FV and build DXE core HOBs.
@ -275,6 +276,7 @@ LoadDxeCore (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_FIRMWARE_VOLUME_IMAGE, (VOID **)&DxeCoreFv);
if (EFI_ERROR (Status)) {
return Status;

3
UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c
View File

@ -137,7 +137,6 @@ AllocateAlignedPages (
return (VOID *)(UINTN)(((UINTN)Memory + AlignmentMask) & ~AlignmentMask);
}
/**
Allocates a buffer of type EfiBootServicesData.
@ -197,5 +196,3 @@ AllocateZeroPool (
return Buffer;
}

20
UefiPayloadPkg/UefiPayloadEntry/PrintHob.c
View File

@ -75,7 +75,6 @@ typedef struct{
CHAR8 *Type;
} PRINT_MEMORY_ALLOCCATION_HOB;
/**
Print the Hex value of a given range.
@param[in] DataStart A pointer to the start of data to be printed.
@ -99,6 +98,7 @@ PrintHex (
DEBUG ((DEBUG_VERBOSE, " %02x", *DataStart));
DataStart++;
}
DEBUG ((DEBUG_VERBOSE, "\n"));
}
@ -119,6 +119,7 @@ PrintHandOffHob(
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.HandoffInformationTable));
DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));
@ -161,6 +162,7 @@ PrintMemoryAllocationHob (
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocation));
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_TYPE_MEMORY_ALLOCATION\n"));
}
DEBUG ((DEBUG_INFO, " MemoryBaseAddress = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress));
DEBUG ((DEBUG_INFO, " MemoryLength = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength));
DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));
@ -188,6 +190,7 @@ PrintResourceDiscriptorHob (
if (!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {
DEBUG ((DEBUG_INFO, " Owner = %g\n", Hob.ResourceDescriptor->Owner));
}
DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG ((DEBUG_INFO, " PhysicalStart = 0x%lx\n", Hob.ResourceDescriptor->PhysicalStart));
DEBUG ((DEBUG_INFO, " ResourceLength = 0x%lx\n", Hob.ResourceDescriptor->ResourceLength));
@ -209,6 +212,7 @@ PrintAcpiGuidHob (
)
{
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= AcpiTableHob->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));
@ -231,6 +235,7 @@ PrintSerialGuidHob (
)
{
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SerialPortInfo->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));
@ -255,6 +260,7 @@ PrintSmbios3GuidHob (
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
@ -277,6 +283,7 @@ PrintSmbiosTablGuidHob (
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
@ -299,6 +306,7 @@ PrintAcpiBoardInfoGuidHob (
)
{
ACPI_BOARD_INFO *AcpBoardInfo;
AcpBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*AcpBoardInfo));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));
@ -330,6 +338,7 @@ PrintPciRootBridgeInfoGuidHob (
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;
UINTN Index;
UINTN Length;
Index = 0;
PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);
@ -367,6 +376,7 @@ PrintPciRootBridgeInfoGuidHob (
DEBUG ((DEBUG_INFO, " PMemAbove4G.Translation = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Translation));
Index += 1;
}
return EFI_SUCCESS;
}
@ -401,6 +411,7 @@ PrintExtraDataGuidHob (
DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Size));
Index += 1;
}
return EFI_SUCCESS;
}
@ -490,6 +501,7 @@ PrintGuidHob (
return Status;
}
}
DEBUG ((DEBUG_INFO, " Name = %g\n", &Hob.Guid->Name));
PrintHex (GET_GUID_HOB_DATA (Hob.Raw), GET_GUID_HOB_DATA_SIZE (Hob.Raw));
return EFI_SUCCESS;
@ -613,6 +625,7 @@ PrintFv3Hob (
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume3));
@ -641,7 +654,6 @@ HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
{ EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob }
};
/**
Print all HOBs info from the HOB list.
@param[in] HobStart A pointer to the HOB list
@ -655,6 +667,7 @@ PrintHob (
EFI_PEI_HOB_POINTERS Hob;
UINTN Count;
UINTN Index;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *)HobStart;
@ -672,13 +685,16 @@ PrintHob (
break;
}
}
if (Index == ARRAY_SIZE (mHobHandles)) {
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %d, Offset = 0x%p, Length = 0x%x\n", Count, Hob.Header->HobType, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));
DEBUG ((DEBUG_INFO, " Unkown Hob type\n"));
PrintHex (Hob.Raw, Hob.Header->HobLength);
}
Count++;
Hob.Raw = GET_NEXT_HOB (Hob);
}
DEBUG ((DEBUG_INFO, "There are totally %d Hobs, the End Hob address is %p\n", Count, Hob.Raw));
}

26
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
View File

@ -42,7 +42,7 @@ MemInfoCallbackMmio (
//
// Skip types already handled in MemInfoCallback
//
if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type == E820_ACPI) {
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI)) {
return EFI_SUCCESS;
}
@ -79,8 +79,9 @@ MemInfoCallbackMmio (
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);
DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
if (MemoryMapEntry->Type == E820_UNUSABLE ||
MemoryMapEntry->Type == E820_DISABLED) {
if ((MemoryMapEntry->Type == E820_UNUSABLE) ||
(MemoryMapEntry->Type == E820_DISABLED))
{
BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);
} else if (MemoryMapEntry->Type == E820_PMEM) {
BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);
@ -89,7 +90,6 @@ MemInfoCallbackMmio (
return EFI_SUCCESS;
}
/**
Callback function to find TOLUD (Top of Lower Usable DRAM)
@ -120,7 +120,8 @@ FindToludCallback (
// Skip memory types not RAM or reserved
//
if ((MemoryMapEntry->Type == E820_UNUSABLE) || (MemoryMapEntry->Type == E820_DISABLED) ||
(MemoryMapEntry->Type == E820_PMEM)) {
(MemoryMapEntry->Type == E820_PMEM))
{
return EFI_SUCCESS;
}
@ -132,7 +133,8 @@ FindToludCallback (
}
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI) ||
(MemoryMapEntry->Type == E820_NVS)) {
(MemoryMapEntry->Type == E820_NVS))
{
//
// It's usable DRAM. Update TOLUD.
//
@ -154,7 +156,6 @@ FindToludCallback (
return EFI_SUCCESS;
}
/**
Callback function to build resource descriptor HOB
@ -182,7 +183,8 @@ MemInfoCallback (
// It will be added later.
//
if ((MemoryMapEntry->Type != E820_RAM) && (MemoryMapEntry->Type != E820_ACPI) &&
(MemoryMapEntry->Type != E820_NVS)) {
(MemoryMapEntry->Type != E820_NVS))
{
return RETURN_SUCCESS;
}
@ -210,8 +212,6 @@ MemInfoCallback (
return RETURN_SUCCESS;
}
/**
It will build HOBs based on information from bootloaders.
@ -240,6 +240,7 @@ BuildHobFromBl (
if (EFI_ERROR (Status)) {
return Status;
}
DEBUG ((DEBUG_INFO, "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));
//
@ -262,7 +263,6 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));
}
Status = ParseGfxDeviceInfo (&GfxDeviceInfo);
if (!EFI_ERROR (Status)) {
NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));
@ -271,7 +271,6 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));
}
//
// Creat SmBios table Hob
//
@ -333,7 +332,6 @@ BuildHobFromBl (
return EFI_SUCCESS;
}
/**
This function will build some generic HOBs that doesn't depend on information from bootloaders.
@ -374,10 +372,8 @@ BuildGenericHob (
);
BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_MAPPED_IO, ResourceAttribute, 0xFEC80000, SIZE_512KB);
BuildMemoryAllocationHob (0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);
}
/**
Entry point to the C language phase of UEFI payload.

1
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
View File

@ -42,7 +42,6 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3

16
UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
View File

@ -67,6 +67,7 @@ FixUpPcdDatabase (
//
return EFI_SUCCESS;
}
PeiDatabase = (PEI_PCD_DATABASE *)GET_GUID_HOB_DATA (GuidHob);
DEBUG ((DEBUG_INFO, "Find the Pei PCD data base, the total local token number is %d\n", PeiDatabase->LocalTokenCount));
@ -75,6 +76,7 @@ FixUpPcdDatabase (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_RAW, &PcdRawData);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
@ -87,6 +89,7 @@ FixUpPcdDatabase (
for (Index = 0; Index < UplDatabase->ExTokenCount; Index++) {
ExMapTable[Index].TokenNumber += PeiDatabase->LocalTokenCount;
}
DEBUG ((DEBUG_INFO, "Fix up UPL PCD database successfully\n"));
return EFI_SUCCESS;
}
@ -106,6 +109,7 @@ AddNewHob (
if (Hob->Raw == NULL) {
return;
}
NewHob.Header = CreateHob (Hob->Header->HobType, Hob->Header->HobLength);
if (NewHob.Header != NULL) {
@ -147,6 +151,7 @@ FindResourceDescriptorByRange (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@ -157,11 +162,14 @@ FindResourceDescriptorByRange (
if (Base < ResourceHob->PhysicalStart) {
continue;
}
if (Top > (ResourceHob->PhysicalStart + ResourceHob->ResourceLength)) {
continue;
}
return ResourceHob;
}
return NULL;
}
@ -184,6 +192,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;
ReturnResourceHob = NULL;
for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
@ -201,6 +210,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@ -211,12 +221,14 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob == ExceptResourceHob) {
continue;
}
//
// Skip Resource Descriptor HOBs that are beyond 4G
//
if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) > BASE_4GB) {
continue;
}
//
// Skip Resource Descriptor HOBs that are too small
//
@ -235,6 +247,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
}
}
}
return ReturnResourceHob;
}
@ -276,7 +289,6 @@ BuildHobs (
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);
//
// Try to find Resource Descriptor HOB that contains Hob range EfiMemoryBottom..EfiMemoryTop
//
@ -325,6 +337,7 @@ BuildHobs (
FreeMemoryTop = ResourceHob->PhysicalStart + ResourceHob->ResourceLength;
MemoryTop = FreeMemoryTop;
}
HobConstructor ((VOID *)(UINTN)MemoryBottom, (VOID *)(UINTN)MemoryTop, (VOID *)(UINTN)FreeMemoryBottom, (VOID *)(UINTN)FreeMemoryTop);
//
// From now on, mHobList will point to the new Hob range.
@ -342,6 +355,7 @@ BuildHobs (
// Add this hob to payload HOB
AddNewHob (&Hob);
}
Hob.Raw = GET_NEXT_HOB (Hob);
}

11
UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
View File

@ -17,7 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "UefiPayloadEntry.h"
#define STACK_SIZE 0x20000
/**
Transfers control to DxeCore.
@ -49,7 +48,6 @@ HandOffToDxeCore (
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
}
//
// Allocate 128KB for the Stack
//
@ -74,8 +72,12 @@ HandOffToDxeCore (
//
// Create page table and save PageMapLevel4 to CR3
//
PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
(EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
PageTables = CreateIdentityMappingPageTables (
(EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,
STACK_SIZE,
(EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,
GhcbSize
);
} else {
//
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
@ -85,7 +87,6 @@ HandOffToDxeCore (
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
}
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
AsmWriteCr3 (PageTables);
}

84
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
View File

@ -62,25 +62,36 @@ ClearFirst4KPage (
//
// Check if page 0 exists and free
//
while ((RscHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw)) != NULL) {
if (RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY &&
RscHob.ResourceDescriptor->PhysicalStart == 0) {
while ((RscHob.Raw = GetNextHob (
EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw
)) != NULL)
{
if ((RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
(RscHob.ResourceDescriptor->PhysicalStart == 0))
{
DoClear = TRUE;
//
// Make sure memory at 0-4095 has not been allocated.
//
while ((MemHob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw)) != NULL) {
while ((MemHob.Raw = GetNextHob (
EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw
)) != NULL)
{
if (MemHob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
< EFI_PAGE_SIZE) {
< EFI_PAGE_SIZE)
{
DoClear = FALSE;
break;
}
MemHob.Raw = GET_NEXT_HOB (MemHob);
}
break;
}
RscHob.Raw = GET_NEXT_HOB (RscHob);
}
@ -203,12 +214,12 @@ ToSplitPageTable (
IN UINTN GhcbSize
)
{
if (IsNullDetectionEnabled () && Address == 0) {
if (IsNullDetectionEnabled () && (Address == 0)) {
return TRUE;
}
if (PcdGetBool (PcdCpuStackGuard)) {
if (StackBase >= Address && StackBase < (Address + Size)) {
if ((StackBase >= Address) && (StackBase < (Address + Size))) {
return TRUE;
}
}
@ -227,6 +238,7 @@ ToSplitPageTable (
return FALSE;
}
/**
Initialize a buffer pool for page table use only.
@ -316,8 +328,9 @@ AllocatePageTableMemory (
//
// Renew the pool if necessary.
//
if (mPageTablePool == NULL ||
Pages > mPageTablePool->FreePages) {
if ((mPageTablePool == NULL) ||
(Pages > mPageTablePool->FreePages))
{
if (!InitializePageTablePool (Pages)) {
return NULL;
}
@ -386,13 +399,16 @@ Split2MPageTo4K (
if ( (GhcbBase == 0)
|| (PhysicalAddress4K < GhcbBase)
|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0)) {
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0))
{
PageTableEntry->Uint64 |= AddressEncMask;
}
PageTableEntry->Bits.ReadWrite = 1;
if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
(PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K == StackBase)) {
if ((IsNullDetectionEnabled () && (PhysicalAddress4K == 0)) ||
(PcdGetBool (PcdCpuStackGuard) && (PhysicalAddress4K == StackBase)))
{
PageTableEntry->Bits.Present = 0;
} else {
PageTableEntry->Bits.Present = 1;
@ -400,7 +416,8 @@ Split2MPageTo4K (
if ( PcdGetBool (PcdSetNxForStack)
&& (PhysicalAddress4K >= StackBase)
&& (PhysicalAddress4K < StackBase + StackSize)) {
&& (PhysicalAddress4K < StackBase + StackSize))
{
//
// Set Nx bit for stack.
//
@ -560,7 +577,6 @@ SetPageTablePoolReadOnly (
}
break;
} else {
//
// The smaller granularity of page must be needed.
@ -573,12 +589,14 @@ SetPageTablePoolReadOnly (
PhysicalAddress = PageAttr & LevelMask[Level];
for (EntryIndex = 0;
EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);
++EntryIndex) {
++EntryIndex)
{
NewPageTable[EntryIndex] = PhysicalAddress | AddressEncMask |
IA32_PG_P | IA32_PG_RW;
if (Level > 2) {
NewPageTable[EntryIndex] |= IA32_PG_PS;
}
PhysicalAddress += LevelSize[Level - 1];
}
@ -733,8 +751,12 @@ CreateIdentityMappingPageTables (
Page5LevelSupport = FALSE;
if (PcdGetBool (PcdUse5LevelPageTable)) {
AsmCpuidEx (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL,
&EcxFlags.Uint32, NULL, NULL
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL,
&EcxFlags.Uint32,
NULL,
NULL
);
if (EcxFlags.Bits.FiveLevelPage != 0) {
Page5LevelSupport = TRUE;
@ -749,7 +771,7 @@ CreateIdentityMappingPageTables (
// due to either unsupported by HW, or disabled by PCD.
//
ASSERT (PhysicalAddressBits <= 52);
if (!Page5LevelSupport && PhysicalAddressBits > 48) {
if (!Page5LevelSupport && (PhysicalAddressBits > 48)) {
PhysicalAddressBits = 48;
}
@ -788,9 +810,14 @@ CreateIdentityMappingPageTables (
TotalPagesNum--;
}
DEBUG ((DEBUG_INFO, "Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded, NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded, (UINT64)TotalPagesNum));
DEBUG ((
DEBUG_INFO,
"Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded,
NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded,
(UINT64)TotalPagesNum
));
BigPageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
ASSERT (BigPageAddress != 0);
@ -806,11 +833,13 @@ CreateIdentityMappingPageTables (
PageMapLevel5Entry = PageMap;
BigPageAddress += SIZE_4KB;
}
PageAddress = 0;
for ( IndexOfPml5Entries = 0
; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
; IndexOfPml5Entries++) {
; IndexOfPml5Entries++)
{
//
// Each PML5 entry points to a page of PML4 entires.
// So lets allocate space for them and fill them in in the IndexOfPml4Entries loop.
@ -831,7 +860,8 @@ CreateIdentityMappingPageTables (
for ( IndexOfPml4Entries = 0
; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
; IndexOfPml4Entries++, PageMapLevel4Entry++) {
; IndexOfPml4Entries++, PageMapLevel4Entry++)
{
//
// Each PML4 entry points to a page of Page Directory Pointer entires.
// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
@ -865,7 +895,8 @@ CreateIdentityMappingPageTables (
} else {
for ( IndexOfPdpEntries = 0
; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
; IndexOfPdpEntries++, PageDirectoryPointerEntry++)
{
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
@ -936,4 +967,3 @@ CreateIdentityMappingPageTables (
return (UINTN)PageMap;
}

5
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h
View File

@ -13,13 +13,12 @@ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _VIRTUAL_MEMORY_H_
#define _VIRTUAL_MEMORY_H_
#define SYS_CODE64_SEL 0x38
#pragma pack(1)
typedef union {
@ -235,7 +234,6 @@ CreateIdentityMappingPageTables (
IN UINTN GhcbkSize
);
/**
Fix up the vector number in the vector code.
@ -251,7 +249,6 @@ AsmVectorFixup (
UINT8 VectorNum
);
/**
Get the information of vector template.