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IntelSiliconPkg MicrocodeUpdateDxe: Honor FIT table

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It is the second step for
https://bugzilla.tianocore.org/show_bug.cgi?id=540.

V2: Use error handling instead of ASSERT for FIT table checking result.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Star Zeng
2018-03-28 16:52:12 +08:00
parent 0edb7ec5ce
commit e91797885a
4 changed files with 601 additions and 29 deletions
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3
IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
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@ -3,7 +3,7 @@
#
# Produce FMP instance to update Microcode.
#
# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -65,6 +65,7 @@
[Depex]
gEfiVariableArchProtocolGuid AND
gEfiVariableWriteArchProtocolGuid AND
gEfiMpServiceProtocolGuid
[UserExtensions.TianoCore."ExtraFiles"]