MdePkg/PciSegmentLib: Fix typo in function header comments
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
@@ -1,7 +1,7 @@
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/** @file
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PCI Segment Library implementation using PCI CFG2 PPI.
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Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are
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licensed and made available under the terms and conditions of
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the BSD License which accompanies this distribution. The full
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@@ -168,7 +168,7 @@ PeiPciSegmentLibPciCfg2WriteWorker (
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Bus, Device, Function and
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@param Address Address that encodes the PCI Bus, Device, Function and
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Register.
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@retval RETURN_SUCCESS The PCI device was registered for runtime access.
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@@ -195,11 +195,10 @@ PciSegmentRegisterForRuntimeAccess (
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Reads and returns the 8-bit PCI configuration register specified by Address.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function,
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and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 8-bit PCI configuration register specified by Address.
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@@ -220,10 +219,10 @@ PciSegmentRead8 (
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Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
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Value is returned. This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@@ -249,10 +248,10 @@ PciSegmentWrite8 (
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and writes the result to the 8-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -278,7 +277,7 @@ PciSegmentOr8 (
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -297,18 +296,18 @@ PciSegmentAnd8 (
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/**
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Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
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followed a bitwise OR with another 8-bit value.
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Reads the 8-bit PCI configuration register specified by Address,
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performs a bitwise AND between the read result and the value specified by AndData,
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performs a bitwise OR between the result of the AND operation and the value specified by OrData,
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and writes the result to the 8-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -337,7 +336,7 @@ PciSegmentAndThenOr8 (
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If EndBit is greater than 7, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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@param Address The PCI configuration register to read.
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@param Address PCI configuration register to read.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -371,12 +370,12 @@ PciSegmentBitFieldRead8 (
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If EndBit is less than StartBit, then ASSERT().
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If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..7.
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@param Value The new value of the bit field.
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@param Value New value of the bit field.
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@return The value written back to the PCI configuration register.
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@@ -413,7 +412,7 @@ PciSegmentBitFieldWrite8 (
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If EndBit is less than StartBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -455,7 +454,7 @@ PciSegmentBitFieldOr8 (
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -482,8 +481,7 @@ PciSegmentBitFieldAnd8 (
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/**
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Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
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bitwise OR, and writes the result back to the bit field in the
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8-bit port.
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bitwise OR, and writes the result back to the bit field in the 8-bit port.
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Reads the 8-bit PCI configuration register specified by Address, performs a
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bitwise AND followed by a bitwise OR between the read result and
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@@ -500,7 +498,7 @@ PciSegmentBitFieldAnd8 (
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -532,11 +530,11 @@ PciSegmentBitFieldAndThenOr8 (
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Reads and returns the 16-bit PCI configuration register specified by Address.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 16-bit PCI configuration register specified by Address.
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@@ -557,11 +555,11 @@ PciSegmentRead16 (
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Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
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Value is returned. This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The parameter of Value.
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@@ -584,16 +582,15 @@ PciSegmentWrite16 (
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a 16-bit value.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized.
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bitwise OR between the read result and the value specified by OrData, and
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writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned. This function
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must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function and
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@param Address Address that encodes the PCI Segment, Bus, Device, Function and
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@@ -618,11 +615,11 @@ PciSegmentOr16 (
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and writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -641,18 +638,18 @@ PciSegmentAnd16 (
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/**
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Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
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followed a bitwise OR with another 16-bit value.
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise AND between the read result and the value specified by AndData,
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performs a bitwise OR between the result of the AND operation and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@@ -683,7 +680,7 @@ PciSegmentAndThenOr16 (
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If EndBit is greater than 15, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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@param Address The PCI configuration register to read.
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@param Address PCI configuration register to read.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -718,12 +715,12 @@ PciSegmentBitFieldRead16 (
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If EndBit is less than StartBit, then ASSERT().
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If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..15.
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@param Value The new value of the bit field.
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@param Value New value of the bit field.
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@return The value written back to the PCI configuration register.
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@@ -744,9 +741,15 @@ PciSegmentBitFieldWrite16 (
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}
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/**
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
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the result back to the bit field in the 16-bit port.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized. Extra left bits in OrData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@@ -755,7 +758,7 @@ PciSegmentBitFieldWrite16 (
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If EndBit is less than StartBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -781,31 +784,31 @@ PciSegmentBitFieldOr16 (
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}
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/**
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
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and writes the result back to the bit field in the 16-bit port.
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Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
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AND, writes the result back to the bit field in the 16-bit register.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise AND between the read result and the value specified by AndData, and
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writes the result to the 16-bit PCI configuration register specified by
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Address. The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are
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serialized. Extra left bits in AndData are stripped.
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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Extra left bits in OrData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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If StartBit is greater than 7, then ASSERT().
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If EndBit is greater than 7, then ASSERT().
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If StartBit is greater than 15, then ASSERT().
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If EndBit is greater than 15, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param StartBit The ordinal of the least significant bit in the bit field.
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The ordinal of the least significant bit in a byte is bit 0.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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The ordinal of the most significant bit in a byte is bit 7.
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@param AndData The value to AND with the read value from the PCI configuration register.
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Range 0..15.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@return The value written back to the PCI configuration register.
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**/
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UINT16
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@@ -843,7 +846,7 @@ PciSegmentBitFieldAnd16 (
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@@ -875,12 +878,11 @@ PciSegmentBitFieldAndThenOr16 (
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Reads and returns the 32-bit PCI configuration register specified by Address.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function,
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and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 32-bit PCI configuration register specified by Address.
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@@ -901,12 +903,11 @@ PciSegmentRead32 (
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Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
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Value is returned. This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device,
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Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The parameter of Value.
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@@ -932,11 +933,11 @@ PciSegmentWrite32 (
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and writes the result to the 32-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -960,12 +961,11 @@ PciSegmentOr32 (
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and writes the result to the 32-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function,
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and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@@ -984,19 +984,18 @@ PciSegmentAnd32 (
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/**
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Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
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followed a bitwise OR with another 32-bit value.
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Reads the 32-bit PCI configuration register specified by Address,
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performs a bitwise AND between the read result and the value specified by AndData,
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performs a bitwise OR between the result of the AND operation and the value specified by OrData,
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and writes the result to the 32-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function,
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and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@@ -1027,7 +1026,7 @@ PciSegmentAndThenOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1062,12 +1061,12 @@ PciSegmentBitFieldRead32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@@ -1104,7 +1103,7 @@ PciSegmentBitFieldWrite32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1133,7 +1132,7 @@ PciSegmentBitFieldOr32 (
|
||||
Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
|
||||
AND, and writes the result back to the bit field in the 32-bit register.
|
||||
|
||||
|
||||
|
||||
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise
|
||||
AND between the read result and the value specified by AndData, and writes the result
|
||||
to the 32-bit PCI configuration register specified by Address. The value written to
|
||||
@@ -1146,7 +1145,7 @@ PciSegmentBitFieldOr32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1191,7 +1190,7 @@ PciSegmentBitFieldAnd32 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@@ -1233,10 +1232,10 @@ PciSegmentBitFieldAndThenOr32 (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus,
|
||||
Device, Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size
|
||||
|
||||
@@ -1332,10 +1331,10 @@ PciSegmentReadBuffer (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus,
|
||||
Device, Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer containing the data to write.
|
||||
|
||||
@return The parameter of Size.
|
||||
|
||||
|
Reference in New Issue
Block a user