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SourceLevelDebugPkg DebugCommUsb3: Refine some formats/comments

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Refine some formats/comments and remove some unused prototypes.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
Star Zeng
2018-03-01 10:10:29 +08:00
parent 3ecca00330
commit f0c562761f
2 changed files with 13 additions and 50 deletions
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16
SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
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@ -85,15 +85,15 @@ XhcClearR32Bit(
Write the data to the XHCI debug register.
@param Handle Debug port handle.
@param Offset The offset of the runtime register.
@param Offset The offset of the debug register.
@param Data The data to write.
**/
VOID
XhcWriteDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Data
IN UINT32 Offset,
IN UINT32 Data
)
{
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
@ -116,7 +116,7 @@ XhcWriteDebugReg (
UINT32
XhcReadDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
IN UINT32 Offset
)
{
UINT32 Data;
@ -129,16 +129,16 @@ XhcReadDebugReg (
}
/**
Set one bit of the runtime register while keeping other bits.
Set one bit of the debug register while keeping other bits.
@param Handle Debug port handle.
@param Offset The offset of the runtime register.
@param Offset The offset of the debug register.
@param Bit The bit mask of the register to set.
**/
VOID
XhcSetDebugRegBit (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
)
@ -216,7 +216,7 @@ UpdateXhcResource (
@param Handle Debug port handle.
@retval RETURN_UNSUPPORTED The usb host controller does not supported usb debug port capability.
@retval RETURN_UNSUPPORTED The usb host controller does not support usb debug port capability.
@retval RETURN_SUCCESS Get bar and offset successfully.
**/