DynamicTablesPkg: Add CM_ARM_LPI_INFO object

Introduce the CM_ARM_LPI_INFO CmObj in the ArmNameSpaceObjects.
This allows to describe LPI state information, as described in
ACPI 6.4, s8.4.4.3 "_LPI (Low Power Idle States)".

Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>

DynamicTablesPkg/Include/ArmNameSpaceObjects.h

@@ -58,6 +58,7 @@ typedef enum ArmObjectID {
   EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity
   EArmObjSerialPortInfo,               ///< 35 - Generic Serial Port Info
   EArmObjCmn600Info,                   ///< 36 - CMN-600 Info
+  EArmObjLpiInfo,                      ///< 37 - Lpi Info
   EArmObjMax
 } EARM_OBJECT_ID;
 
@@ -711,6 +712,10 @@ typedef struct CmArmProcHierarchyInfo {
   /// the NoOfPrivateResources is 0, in which case it is recommended to set
   /// this field to CM_NULL_TOKEN.
   CM_OBJECT_TOKEN   PrivateResourcesArrayToken;
+  /// Optional field: Reference Token for the Lpi state of this processor.
+  /// Token identifying a CM_ARM_OBJ_REF structure, itself referencing
+  /// CM_ARM_LPI_INFO objects.
+  CM_OBJECT_TOKEN   LpiToken;
 } CM_ARM_PROC_HIERARCHY_INFO;
 
 /** A structure that describes the Cache Type Structure (Type 1) in PPTT
@@ -878,6 +883,69 @@ typedef struct CmArmCmn600Info {
   CM_ARM_EXTENDED_INTERRUPT  DtcInterrupt[4];
 } CM_ARM_CMN_600_INFO;
 
+/** A structure that describes the Lpi information.
+
+  The Low Power Idle states are described in DSDT/SSDT and associated
+  to cpus/clusters in the cpu topology.
+
+  ID: EArmObjLpiInfo
+*/
+typedef struct CmArmLpiInfo {
+  /** Minimum Residency. Time in microseconds after which a
+      state becomes more energy efficient than any shallower state.
+  */
+  UINT32                                  MinResidency;
+
+  /** Worst case time in microseconds from a wake interrupt
+      being asserted to the return to a running state
+  */
+  UINT32                                  WorstCaseWakeLatency;
+
+  /** Flags.
+  */
+  UINT32                                  Flags;
+
+  /** Architecture specific context loss flags.
+  */
+  UINT32                                  ArchFlags;
+
+  /** Residency counter frequency in cycles-per-second (Hz).
+  */
+  UINT32                                  ResCntFreq;
+
+  /** Every shallower power state in the parent is also enabled.
+  */
+  UINT32                                  EnableParentState;
+
+  /** The EntryMethod _LPI field can be described as an integer
+      or in a Register resource data descriptor.
+
+  If IsInteger is TRUE, the IntegerEntryMethod field is used.
+  If IsInteger is FALSE, the RegisterEntryMethod field is used.
+  */
+  BOOLEAN                                 IsInteger;
+
+  /** EntryMethod described as an Integer.
+  */
+  UINT64                                  IntegerEntryMethod;
+
+  /** EntryMethod described as a EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR.
+  */
+  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  RegisterEntryMethod;
+
+  /** Residency counter register.
+  */
+  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  ResidencyCounterRegister;
+
+  /** Usage counter register.
+  */
+  EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  UsageCounterRegister;
+
+  /** String representing the Lpi state
+  */
+  CHAR8                                   StateName[16];
+} CM_ARM_LPI_INFO;
+
 #pragma pack()
 
 #endif // ARM_NAMESPACE_OBJECTS_H_