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UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode

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During CpuDxe initialization, MMU will be setup with the highest
mode that HW supports.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Tuan Phan
2023-07-14 12:08:24 -07:00
committed by mergify[bot]
parent cc13dcc576
commit f220dcbba8
10 changed files with 874 additions and 2 deletions
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UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf
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@@ -37,6 +37,8 @@
TimerLib
PeCoffGetEntryPointLib
RiscVSbiLib
RiscVMmuLib
CacheMaintenanceLib
[Sources]
CpuDxe.c