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SourceLevelDebugPkg DebugUsb3: Fix some typos

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Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
Star Zeng
2018-02-04 17:33:10 +08:00
parent a2acb04ca6
commit f4043414da
4 changed files with 12 additions and 12 deletions
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4
SourceLevelDebugPkg/SourceLevelDebugPkg.uni
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@@ -8,7 +8,7 @@
// and host, PeCoffExtraActionLib instance to report symbol path information,
// etc.
//
// Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
// Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials are licensed and made available under
// the terms and conditions of the BSD License that accompanies this distribution.
@@ -70,7 +70,7 @@
#string STR_gEfiSourceLevelDebugPkgTokenSpaceGuid_PcdDebugPortHandleBufferSize_HELP #language en-US "The data buffer size used by debug port in debug communication library instances.\n"
"Its value is not suggested to be changed in platform DSC file."
#string STR_gEfiSourceLevelDebugPkgTokenSpaceGuid_PcdUsbXhciMemorySpaceBase_PROMPT #language en-US "Configure ehci host controller memory BAR."
#string STR_gEfiSourceLevelDebugPkgTokenSpaceGuid_PcdUsbXhciMemorySpaceBase_PROMPT #language en-US "Configure xhci host controller memory BAR."
#string STR_gEfiSourceLevelDebugPkgTokenSpaceGuid_PcdUsbXhciMemorySpaceBase_HELP #language en-US "The memory BAR of xhci host controller, in which usb debug feature is enabled.\n"
"Note that the memory BAR address is only used before Pci bus resource allocation."