FmpDevicePkg: Fix various typos
Fix one typo in FmpDevicePkg. Signed-off-by: Cœur <coeur@gmx.fr> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
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Chasel Chiu
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8a842b31b9
commit
f527942e6b
@@ -194,9 +194,9 @@ StackSetupDone:
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;
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; Pass BFV into the PEI Core
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; It uses relative address to calucate the actual boot FV base
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; It uses relative address to calculate the actual boot FV base
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; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and
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; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
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; PcdFspAreaBaseAddress are the same. For FSP with multiple FVs,
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; they are different. The code below can handle both cases.
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;
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call ASM_PFX(AsmGetFspBaseAddress)
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@@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Abstract:
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@@ -46,7 +46,7 @@ ASM_PFX(InitializeFloatingPointUnits):
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fldcw [ASM_PFX(mFpuControlWord)]
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;
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; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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;
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mov eax, 1
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@@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Abstract:
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@@ -150,7 +150,7 @@ NextAddress:
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fldcw [FpuControlWord]
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;
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; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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;
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mov eax, 1
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@@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Abstract:
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@@ -58,7 +58,7 @@ ASM_PFX(SecSwitchStack):
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mov esp, eax ; From now, esp is pointed to permanent memory
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;
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; Fixup the ebp point to permenent memory
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; Fixup the ebp point to permanent memory
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;
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mov eax, ebp
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sub eax, ebx
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@@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@@ -169,7 +169,7 @@ FspGlobalDataInit (
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SerialPortInitialize ();
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//
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// Ensure the golbal data pointer is valid
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// Ensure the global data pointer is valid
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//
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ASSERT (GetFspGlobalDataPointer () == PeiFspData);
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@@ -110,7 +110,7 @@ SecStartup (
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// |-------------------|---->
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// | |
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// | |
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// | Heap | PeiTemporayRamSize
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// | Heap | PeiTemporaryRamSize
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// | |
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// | |
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// |-------------------|----> TempRamBase
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@@ -2,7 +2,7 @@
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; Reset Vector Data structure
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; This structure is located at 0xFFFFFFC0
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;
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; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;;
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@@ -61,7 +61,7 @@ ApStartup:
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;
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; Jmp Rel16 instruction
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; Use machine code directly in case of the assembler optimization
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; SEC entry point relatvie address will be fixed up by some build tool.
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; SEC entry point relative address will be fixed up by some build tool.
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;
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; Typically, SEC entry point is the function _ModuleEntryPoint() defined in
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; SecEntry.asm
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