ArmPlatformPkg: Code cleaning
- Fix coding style to follow EDK2 coding convention - Remove deprecated function - Remove unused PCDs git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11808 6f19259b-4bc3-4df7-8a09-765794883524
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@@ -13,29 +13,17 @@
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*
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**/
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#include <PiPei.h>
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#include <Ppi/TemporaryRamSupport.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/PrintLib.h>
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#include <Library/ArmLib.h>
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#include <Library/SerialPortLib.h>
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#include <Chipset/ArmV7.h>
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EFI_STATUS
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EFIAPI
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SecTemporaryRamSupport (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
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IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
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IN UINTN CopySize
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);
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VOID
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SecSwitchStack (
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INTN StackDelta
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);
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#include "PrePeiCore.h"
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EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};
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@@ -47,10 +35,6 @@ EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {
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}
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};
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// Vector Table for Pei Phase
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VOID PeiVectorTable (VOID);
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VOID
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CEntryPoint (
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IN UINTN CoreId,
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@@ -64,8 +48,8 @@ CEntryPoint (
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ArmInvalidateInstructionCache();
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// Enable Instruction & Data caches
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ArmEnableDataCache();
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ArmEnableInstructionCache();
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ArmEnableDataCache ();
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ArmEnableInstructionCache ();
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//
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// Note: Doesn't have to Enable CPU interface in non-secure world,
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@@ -81,9 +65,9 @@ CEntryPoint (
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//If not primary Jump to Secondary Main
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if(0 == CoreId) {
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//Goto primary Main.
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primary_main(PeiCoreEntryPoint);
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PrimaryMain (PeiCoreEntryPoint);
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} else {
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secondary_main(CoreId);
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SecondaryMain (CoreId);
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}
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// PEI Core should always load and never return
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@@ -101,7 +85,7 @@ SecTemporaryRamSupport (
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{
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//
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// Migrate the whole temporary memory to permenent memory.
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//
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//
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CopyMem (
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(VOID*)(UINTN)PermanentMemoryBase,
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(VOID*)(UINTN)TemporaryMemoryBase,
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