ArmPlatformPkg: Add support to configure PL011 UART clock

On some platforms the UART clock is not the same for all the serial
ports. The PL011 driver must be capable of handling serial ports with
different clock rates, so must not rely on a PCD for the clock rate.

This patch allows the UART clock rate to be passed as a parameter
to PL011UartInitializePort(), which is called from the serial port
library. This patch also contains the corresponding changes in the
serial port library.

The PCD in Drivers/PL011Uart is replaced by an extra parameter for
PL011UartInitializePort.  The PCD is moved to Library/PL011SerialPortLib
to supply the value to pass.

A corresponding patch to ArmVirtPkg is included in the same bundle to
align that with these changes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>

ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c

@@ -50,13 +50,14 @@ SerialPortInitialize (
   StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
 
   return PL011UartInitializePort (
-      (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
-      &BaudRate,
-      &ReceiveFifoDepth,
-      &Parity,
-      &DataBits,
-      &StopBits
-      );
+           (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
+           FixedPcdGet32 (PL011UartClkInHz),
+           &BaudRate,
+           &ReceiveFifoDepth,
+           &Parity,
+           &DataBits,
+           &StopBits
+           );
 }
 
 /**
@@ -158,13 +159,14 @@ SerialPortSetAttributes (
   )
 {
   return PL011UartInitializePort (
-    (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
-    BaudRate,
-    ReceiveFifoDepth,
-    Parity,
-    DataBits,
-    StopBits
-    );
+           (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
+           FixedPcdGet32 (PL011UartClkInHz),
+           BaudRate,
+           ReceiveFifoDepth,
+           Parity,
+           DataBits,
+           StopBits
+           );
 }
 
 /**

ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf

@@ -41,3 +41,4 @@
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+  gArmPlatformTokenSpaceGuid.PL011UartClkInHz