UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4337 This patch is to avoid configure SMBASE if SmBase relocation has been done. If gSmmBaseHobGuid found, means SmBase info has been relocated and recorded in the SmBase array. No need to do the relocation in SmmCpuFeaturesInitializeProcessor(). Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Zeng Star <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@@ -1,7 +1,7 @@
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/** @file
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Implementation shared across all library instances.
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Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.<BR>
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Copyright (c) Microsoft Corporation.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@@ -38,6 +38,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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UINT32 mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;
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UINT32 mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;
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//
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// Indicate SmBase for each Processors has been relocated or not. If TRUE,
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// means no need to do the relocation in SmmCpuFeaturesInitializeProcessor().
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//
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BOOLEAN mSmmCpuFeaturesSmmRelocated;
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//
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// Set default value to assume MTRRs need to be configured on each SMI
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//
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@@ -144,6 +150,12 @@ CpuFeaturesLibInitialization (
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//
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mSmrrEnabled = (BOOLEAN *)AllocatePool (sizeof (BOOLEAN) * GetCpuMaxLogicalProcessorNumber ());
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ASSERT (mSmrrEnabled != NULL);
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//
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// If gSmmBaseHobGuid found, means SmBase info has been relocated and recorded
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// in the SmBase array.
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//
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mSmmCpuFeaturesSmmRelocated = (BOOLEAN)(GetFirstGuidHob (&gSmmBaseHobGuid) != NULL);
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}
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/**
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@@ -187,10 +199,15 @@ SmmCpuFeaturesInitializeProcessor (
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UINTN ModelId;
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//
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// Configure SMBASE.
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// No need to configure SMBASE if SmBase relocation has been done.
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//
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
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if (!mSmmCpuFeaturesSmmRelocated) {
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//
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// Configure SMBASE.
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//
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
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}
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//
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// Intel(R) 64 and IA-32 Architectures Software Developer's Manual
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