sravan/system76-edk2
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

UefiCpuPkg/PiSmmCpuDxeSmm: Use public MSR_IA32_MISC_ENABLE definition

Browse Source 
Use the MSR MSR_IA32_MISC_ENABLE definition defined in UefiCpuPkg/Include and
remove the local definition.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Jeff Fan
2016-04-08 13:55:14 +08:00
committed by Michael Kinney
parent 846704334c
commit f85d3ce2ef
4 changed files with 23 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
View File

@@ -1013,13 +1013,14 @@ SmiRendezvous (
IN UINTN CpuIndex
)
{
EFI_STATUS Status;
BOOLEAN ValidSmi;
BOOLEAN IsBsp;
BOOLEAN BspInProgress;
UINTN Index;
UINTN Cr2;
BOOLEAN XdDisableFlag;
EFI_STATUS Status;
BOOLEAN ValidSmi;
BOOLEAN IsBsp;
BOOLEAN BspInProgress;
UINTN Index;
UINTN Cr2;
BOOLEAN XdDisableFlag;
MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;
//
// Save Cr2 because Page Fault exception in SMM may override its value
@@ -1083,9 +1084,11 @@ SmiRendezvous (
//
XdDisableFlag = FALSE;
if (mXdSupported) {
if ((AsmReadMsr64 (MSR_IA32_MISC_ENABLE) & B_XD_DISABLE_BIT) != 0) {
MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
if (MiscEnableMsr.Bits.XD == 1) {
XdDisableFlag = TRUE;
AsmMsrAnd64 (MSR_IA32_MISC_ENABLE, ~B_XD_DISABLE_BIT);
MiscEnableMsr.Bits.XD = 0;
AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
}
ActivateXd ();
}
@@ -1176,7 +1179,9 @@ SmiRendezvous (
// Restore XD
//
if (XdDisableFlag) {
AsmMsrOr64 (MSR_IA32_MISC_ENABLE, B_XD_DISABLE_BIT);
MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
MiscEnableMsr.Bits.XD = 1;
AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
}
}