Revert "EhciDxe: Use common buffer for AsyncInterruptTransfer"
There is concern at the thread
https://lists.01.org/pipermail/edk2-devel/2018-November/031951.html.
And the time point is a little sensitive as it is near edk2-stable201811.
This reverts commit 0cd6452503
.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
@@ -778,6 +778,7 @@ EhciDelAsyncIntTransfer (
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EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
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RemoveEntryList (&Urb->UrbList);
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gBS->FreePool (Urb->Data);
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EhcFreeUrb (Ehc, Urb);
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return EFI_SUCCESS;
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}
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@@ -808,6 +809,7 @@ EhciDelAllAsyncIntTransfers (
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EhcUnlinkQhFromPeriod (Ehc, Urb->Qh);
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RemoveEntryList (&Urb->UrbList);
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gBS->FreePool (Urb->Data);
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EhcFreeUrb (Ehc, Urb);
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}
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}
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@@ -846,8 +848,16 @@ EhciInsertAsyncIntTransfer (
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IN UINTN Interval
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)
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{
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VOID *Data;
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URB *Urb;
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Data = AllocatePool (DataLen);
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if (Data == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: failed to allocate buffer\n", __FUNCTION__));
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return NULL;
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}
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Urb = EhcCreateUrb (
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Ehc,
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DevAddr,
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@@ -858,8 +868,7 @@ EhciInsertAsyncIntTransfer (
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Hub,
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EHC_INT_TRANSFER_ASYNC,
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NULL,
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TRUE,
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NULL,
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Data,
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DataLen,
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Callback,
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Context,
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@@ -868,6 +877,7 @@ EhciInsertAsyncIntTransfer (
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if (Urb == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: failed to create URB\n", __FUNCTION__));
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gBS->FreePool (Data);
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return NULL;
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}
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@@ -881,6 +891,60 @@ EhciInsertAsyncIntTransfer (
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return Urb;
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}
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/**
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Flush data from PCI controller specific address to mapped system
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memory address.
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@param Ehc The EHCI device.
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@param Urb The URB to unmap.
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@retval EFI_SUCCESS Success to flush data to mapped system memory.
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@retval EFI_DEVICE_ERROR Fail to flush data to mapped system memory.
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**/
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EFI_STATUS
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EhcFlushAsyncIntMap (
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IN USB2_HC_DEV *Ehc,
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IN URB *Urb
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)
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{
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS PhyAddr;
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EFI_PCI_IO_PROTOCOL_OPERATION MapOp;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINTN Len;
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VOID *Map;
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PciIo = Ehc->PciIo;
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Len = Urb->DataLen;
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if (Urb->Ep.Direction == EfiUsbDataIn) {
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MapOp = EfiPciIoOperationBusMasterWrite;
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} else {
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MapOp = EfiPciIoOperationBusMasterRead;
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}
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Status = PciIo->Unmap (PciIo, Urb->DataMap);
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if (EFI_ERROR (Status)) {
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goto ON_ERROR;
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}
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Urb->DataMap = NULL;
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Status = PciIo->Map (PciIo, MapOp, Urb->Data, &Len, &PhyAddr, &Map);
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if (EFI_ERROR (Status) || (Len != Urb->DataLen)) {
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goto ON_ERROR;
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}
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Urb->DataPhy = (VOID *) ((UINTN) PhyAddr);
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Urb->DataMap = Map;
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return EFI_SUCCESS;
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ON_ERROR:
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return EFI_DEVICE_ERROR;
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}
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/**
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Update the queue head for next round of asynchronous transfer.
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@@ -986,6 +1050,7 @@ EhcMonitorAsyncRequests (
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BOOLEAN Finished;
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UINT8 *ProcBuf;
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URB *Urb;
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EFI_STATUS Status;
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OldTpl = gBS->RaiseTPL (EHC_TPL);
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Ehc = (USB2_HC_DEV *) Context;
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@@ -1003,6 +1068,15 @@ EhcMonitorAsyncRequests (
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continue;
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}
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//
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// Flush any PCI posted write transactions from a PCI host
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// bridge to system memory.
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//
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Status = EhcFlushAsyncIntMap (Ehc, Urb);
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if (EFI_ERROR (Status)) {
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DEBUG ((EFI_D_ERROR, "EhcMonitorAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));
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}
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//
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// Allocate a buffer then copy the transferred data for user.
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// If failed to allocate the buffer, update the URB for next
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