UefiCpuPkg/CpuTimerDxeRiscV64: Add support for Sstc
Sstc extension allows to program the timer and receive the interrupt without using an SBI call. This reduces the latency to generate the timer interrupt. So, detect whether Sstc extension is supported and use the stimecmp register directly to program the timer interrupt. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Dhaval Sharma <dhaval@rivosinc.com>
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@@ -26,6 +26,8 @@
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//
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#define DEFAULT_TIMER_TICK_DURATION 100000
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#define RISCV_CPU_FEATURE_SSTC_BITMASK BIT1
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extern VOID
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RiscvSetTimerPeriod (
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UINT32 TimerPeriod
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