ArmPkg/ArmLib: remove CCSIDR based cache info routines

The ARM architecture does not allow the actual geometries of the caches
to be inferred from the CCSIDR cache info system register, since the
geometry it reports is intended for performing cache maintenance by
set/way and nothing else. Since the ArmLib cache info routines are
based solely on CCSIDR contents, they should not be used.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18753 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel
2015-11-09 13:26:32 +00:00
committed by abiesheuvel
parent acdb6dc8b7
commit f97ab1bbf4
6 changed files with 0 additions and 488 deletions

View File

@@ -26,30 +26,6 @@
#error "Unknown chipset."
#endif
typedef enum {
ARM_CACHE_TYPE_WRITE_BACK,
ARM_CACHE_TYPE_UNKNOWN
} ARM_CACHE_TYPE;
typedef enum {
ARM_CACHE_ARCHITECTURE_UNIFIED,
ARM_CACHE_ARCHITECTURE_SEPARATE,
ARM_CACHE_ARCHITECTURE_UNKNOWN
} ARM_CACHE_ARCHITECTURE;
typedef struct {
ARM_CACHE_TYPE Type;
ARM_CACHE_ARCHITECTURE Architecture;
BOOLEAN DataCachePresent;
UINTN DataCacheSize;
UINTN DataCacheAssociativity;
UINTN DataCacheLineLength;
BOOLEAN InstructionCachePresent;
UINTN InstructionCacheSize;
UINTN InstructionCacheAssociativity;
UINTN InstructionCacheLineLength;
} ARM_CACHE_INFO;
/**
* The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.
*
@@ -126,66 +102,12 @@ typedef enum {
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
ARM_CACHE_TYPE
EFIAPI
ArmCacheType (
VOID
);
ARM_CACHE_ARCHITECTURE
EFIAPI
ArmCacheArchitecture (
VOID
);
VOID
EFIAPI
ArmCacheInformation (
OUT ARM_CACHE_INFO *CacheInfo
);
BOOLEAN
EFIAPI
ArmDataCachePresent (
VOID
);
UINTN
EFIAPI
ArmDataCacheSize (
VOID
);
UINTN
EFIAPI
ArmDataCacheAssociativity (
VOID
);
UINTN
EFIAPI
ArmDataCacheLineLength (
VOID
);
BOOLEAN
EFIAPI
ArmInstructionCachePresent (
VOID
);
UINTN
EFIAPI
ArmInstructionCacheSize (
VOID
);
UINTN
EFIAPI
ArmInstructionCacheAssociativity (
VOID
);
UINTN
EFIAPI
ArmInstructionCacheLineLength (