ArmVirtualizationPkg: Xen/PV relocatable platformlib instance
Add a ArmPlatformLib instance that can deal with the self relocation and truly dynamic discovery of system RAM base and size. Contributed-under: TianoCore Contribution Agreement 1.0 Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16964 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel
lersek
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/*
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* Copyright (c) 2014, Linaro Ltd. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*/
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/*
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* Theory of operation
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* -------------------
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*
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* This code parses a Flattened Device Tree binary (DTB) to find the base of
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* system RAM. It is written in assembly so that it can be executed before a
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* stack has been set up.
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*
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* To find the base of system RAM, we have to traverse the FDT to find a memory
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* node. In the context of this implementation, the first node that has a
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* device_type property with the value 'memory' and a 'reg' property is
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* acceptable, and the name of the node (memory[@xxx]) is ignored, as are any
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* other nodes that match the above constraints.
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*
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* In pseudo code, this implementation does the following:
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*
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* for each node {
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* have_device_type = false
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* have_reg = false
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*
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* for each property {
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* if property value == 'memory' {
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* if property name == 'device_type' {
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* have_device_type = true
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* }
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* } else {
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* if property name == 'reg' {
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* have_reg = true
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* membase = property value[0]
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* memsize = property value[1]
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* }
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* }
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* }
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* if have_device_type and have_reg {
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* return membase and memsize
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* }
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* }
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* return NOT_FOUND
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*/
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#define FDT_MAGIC 0xedfe0dd0
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#define FDT_BEGIN_NODE 0x1
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#define FDT_END_NODE 0x2
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#define FDT_PROP 0x3
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#define FDT_END 0x9
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xMEMSIZE .req x0 // recorded system RAM size
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xMEMBASE .req x1 // recorded system RAM base
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xLR .req x8 // our preserved link register
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xDTP .req x9 // pointer to traverse the DT structure
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xSTRTAB .req x10 // pointer to the DTB string table
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xMEMNODE .req x11 // bit field to record found properties
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#define HAVE_REG 0x1
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#define HAVE_DEVICE_TYPE 0x2
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.text
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.align 3
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_memory:
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.asciz "memory"
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_reg:
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.asciz "reg"
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_device_type:
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.asciz "device_type"
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/*
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* Compare strings in x4 and x5, return in w7
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*/
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.align 3
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strcmp:
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ldrb w2, [x4], #1
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ldrb w3, [x5], #1
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subs w7, w2, w3
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cbz w2, 0f
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cbz w3, 0f
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beq strcmp
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0: ret
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.globl find_memnode
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find_memnode:
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// preserve link register
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mov xLR, x30
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mov xDTP, x0
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/*
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* Check the DTB magic at offset 0
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*/
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movz w4, #:abs_g0_nc:FDT_MAGIC
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movk w4, #:abs_g1:FDT_MAGIC
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ldr w5, [xDTP]
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cmp w4, w5
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bne err_invalid_magic
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/*
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* Read the string offset and store it for later use
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*/
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ldr w4, [xDTP, #12]
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rev w4, w4
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add xSTRTAB, xDTP, x4
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/*
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* Read the struct offset and add it to the DT pointer
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*/
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ldr w5, [xDTP, #8]
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rev w5, w5
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add xDTP, xDTP, x5
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/*
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* Check current tag for FDT_BEGIN_NODE
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*/
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ldr w5, [xDTP]
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rev w5, w5
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cmp w5, #FDT_BEGIN_NODE
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bne err_unexpected_begin_tag
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begin_node:
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mov xMEMNODE, #0
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add xDTP, xDTP, #4
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/*
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* Advance xDTP past NULL terminated string
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*/
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0: ldrb w4, [xDTP], #1
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cbnz w4, 0b
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next_tag:
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/*
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* Align the DT pointer xDTP to the next 32-bit boundary
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*/
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add xDTP, xDTP, #3
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and xDTP, xDTP, #~3
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/*
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* Read the next tag, could be BEGIN_NODE, END_NODE, PROP, END
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*/
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ldr w5, [xDTP]
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rev w5, w5
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cmp w5, #FDT_BEGIN_NODE
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beq begin_node
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cmp w5, #FDT_END_NODE
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beq end_node
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cmp w5, #FDT_PROP
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beq prop_node
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cmp w5, #FDT_END
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beq err_end_of_fdt
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b err_unexpected_tag
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prop_node:
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/*
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* If propname == 'reg', record as membase and memsize
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* If propname == 'device_type' and value == 'memory',
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* set the 'is_memnode' flag for this node
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*/
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ldr w6, [xDTP, #4]
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add xDTP, xDTP, #12
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rev w6, w6
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mov x5, xDTP
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adr x4, _memory
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bl strcmp
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/*
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* Get handle to property name
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*/
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ldr w5, [xDTP, #-4]
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rev w5, w5
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add x5, xSTRTAB, x5
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cbz w7, check_device_type
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/*
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* Check for 'reg' property
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*/
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adr x4, _reg
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bl strcmp
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cbnz w7, inc_and_next_tag
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/*
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* Extract two 64-bit quantities from the 'reg' property. These values
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* will only be used if the node also turns out to have a device_type
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* property with a value of 'memory'.
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*
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* NOTE: xDTP is only guaranteed to be 32 bit aligned, and we are most
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* likely executing with the MMU off, so we cannot use 64 bit
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* wide accesses here.
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*/
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ldp w4, w5, [xDTP]
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orr xMEMBASE, x4, x5, lsl #32
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ldp w4, w5, [xDTP, #8]
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orr xMEMSIZE, x4, x5, lsl #32
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rev xMEMBASE, xMEMBASE
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rev xMEMSIZE, xMEMSIZE
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orr xMEMNODE, xMEMNODE, #HAVE_REG
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b inc_and_next_tag
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check_device_type:
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/*
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* Check whether the current property's name is 'device_type'
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*/
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adr x4, _device_type
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bl strcmp
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cbnz w7, inc_and_next_tag
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orr xMEMNODE, xMEMNODE, #HAVE_DEVICE_TYPE
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inc_and_next_tag:
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add xDTP, xDTP, x6
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b next_tag
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end_node:
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/*
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* Check for device_type = memory and reg = xxxx
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* If we have both, we are done
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*/
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add xDTP, xDTP, #4
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cmp xMEMNODE, #(HAVE_REG | HAVE_DEVICE_TYPE)
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bne next_tag
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ret xLR
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err_invalid_magic:
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err_unexpected_begin_tag:
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err_unexpected_tag:
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err_end_of_fdt:
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wfi
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@@ -0,0 +1,167 @@
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#
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLibV8.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_EXPORT(ArmGetPhysAddrTop)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
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.LFdtMagic:
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.byte 0xd0, 0x0d, 0xfe, 0xed
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.LArm64LinuxMagic:
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.byte 0x41, 0x52, 0x4d, 0x64
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// VOID
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// ArmPlatformPeiBootAction (
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// VOID *DeviceTreeBaseAddress, // passed by loader in x0
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// VOID *ImageBase // passed by FDF trampoline in x1
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// );
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ASM_PFX(ArmPlatformPeiBootAction):
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mov x29, x30 // preserve LR
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//
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// If we are booting from RAM using the Linux kernel boot protocol, x0 will
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// point to the DTB image in memory. Otherwise, we are just coming out of
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// reset, and x0 will be 0. Check also the FDT magic.
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//
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cbz x0, .Lout
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ldr w8, .LFdtMagic
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ldr w9, [x0]
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cmp w8, w9
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bne .Lout
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//
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// The base of the runtime image has been preserved in x1. Check whether
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// the expected magic number can be found in the header.
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//
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ldr w8, .LArm64LinuxMagic
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ldr w9, [x1, #0x38]
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cmp w8, w9
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bne .Lout
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//
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//
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// OK, so far so good. We have confirmed that we likely have a DTB and are
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// booting via the arm64 Linux boot protocol. Update the base-of-image PCD
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// to the actual relocated value, and add the shift of PcdFdBaseAddress to
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// PcdFvBaseAddress as well
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//
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adr x8, PcdGet64 (PcdFdBaseAddress)
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adr x9, PcdGet64 (PcdFvBaseAddress)
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ldr x6, [x8]
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ldr x7, [x9]
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sub x7, x7, x6
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add x7, x7, x1
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str x1, [x8]
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str x7, [x9]
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//
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// Copy the DTB to the slack space right after the 64 byte arm64/Linux style
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// image header at the base of this image (defined in the FDF), and record the
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// pointer in PcdDeviceTreeInitialBaseAddress.
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//
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adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
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add x1, x1, #0x40
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str x1, [x8]
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ldr w8, [x0, #4] // get DTB size (BE)
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mov x9, x1
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rev w8, w8
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add x8, x8, x0
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0:ldp x6, x7, [x0], #16
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stp x6, x7, [x9], #16
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cmp x0, x8
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blt 0b
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//
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// Discover the memory size and offset from the DTB, and record in the
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// respective PCDs
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//
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mov x0, x1
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bl find_memnode // returns (size, base) size in (x0, x1)
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cbz x0, .Lout
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adr x8, PcdGet64 (PcdSystemMemorySize)
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adr x9, PcdGet64 (PcdSystemMemoryBase)
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str x0, [x8]
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str x1, [x9]
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.Lout:
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ret x29
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//UINTN
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//ArmPlatformGetPrimaryCoreMpId (
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// VOID
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// );
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ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
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ldrh w0, [x0]
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ret
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//UINTN
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//ArmPlatformIsPrimaryCore (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformIsPrimaryCore):
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mov x0, #1
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ret
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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// With this function: CorePos = (ClusterId * 4) + CoreId
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ASM_PFX(ArmPlatformGetCorePosition):
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and x1, x0, #ARM_CORE_MASK
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and x0, x0, #ARM_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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//EFI_PHYSICAL_ADDRESS
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//GetPhysAddrTop (
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// VOID
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// );
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ASM_PFX(ArmGetPhysAddrTop):
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mrs x0, id_aa64mmfr0_el1
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adr x1, .LPARanges
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and x0, x0, #7
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ldrb w1, [x1, x0]
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mov x0, #1
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lsl x0, x0, x1
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ret
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//
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// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
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// physical address space support on this CPU:
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// 0 == 32 bits, 1 == 36 bits, etc etc
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// 6 and 7 are reserved
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//
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.LPARanges:
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.byte 32, 36, 40, 42, 44, 48, -1, -1
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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