ArmPlatformPkg: Added Aarch64 Foundation Model
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14495 6f19259b-4bc3-4df7-8a09-765794883524
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oliviermartin
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#/* @file
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#*/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = RTSMArmVExpressFoundationLib
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FILE_GUID = ce5d91ae-0893-11e2-b6bb-1c6f650265cc
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = ArmPlatformLib
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[Packages]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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ArmPkg/ArmPkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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[LibraryClasses]
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IoLib
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ArmLib
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MemoryAllocationLib
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SerialPortLib
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PrintLib
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[Sources.common]
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RTSMFoundation.c
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RTSMFoundationMem.c
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[Sources.AARCH64]
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AArch64/RTSMHelper.S | GCC
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[FeaturePcd]
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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[FixedPcd]
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gArmTokenSpaceGuid.PcdSystemMemoryBase
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gArmTokenSpaceGuid.PcdSystemMemorySize
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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@@ -0,0 +1,50 @@
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#/* @file
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#*/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = RTSMArmVExpressFoundationLibSec
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FILE_GUID = bc6e6418-0894-11e2-9dc3-1c6f650265cc
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = ArmPlatformLib
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[Packages]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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ArmPkg/ArmPkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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[LibraryClasses]
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IoLib
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ArmLib
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SerialPortLib
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[Sources.common]
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RTSMFoundation.c
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[Sources.AARCH64]
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AArch64/RTSMHelper.S | GCC
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[FeaturePcd]
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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[FixedPcd]
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gArmTokenSpaceGuid.PcdSystemMemoryBase
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gArmTokenSpaceGuid.PcdSystemMemorySize
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmPlatformTokenSpaceGuid.PcdCoreCount
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/** @file
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*
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Library/IoLib.h>
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#include <Library/ArmPlatformLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Ppi/ArmMpCoreInfo.h>
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#include <ArmPlatform.h>
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UINTN
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ArmGetCpuCountPerCluster (
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VOID
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);
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ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
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{
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// Cluster 0, Core 0
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0x0, 0x0,
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// NOTE:
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// The foundation model does not have the VE_SYS_REGS like all the other VE
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// platforms. We pick a spot in RAM that *should* be safe in the simple case
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// of no UEFI apps interfering (Only the Linux loader getting used). By the
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// time we come to load Linux we should have all the cores in a safe place.
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// The image expects to be loaded at 0xa0000000. We also place the mailboxes
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// here as it does not matter if we corrupt the image at this time.
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// NOTE also see: "ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S"
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(UINT64)0x0
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},
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{
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// Cluster 0, Core 1
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0x0, 0x1,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(UINT64)0x0
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},
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{
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// Cluster 0, Core 2
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0x0, 0x2,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(UINT64)0x0
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},
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{
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// Cluster 0, Core 3
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0x0, 0x3,
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// MP Core MailBox Set/Get/Clear Addresses and Clear Value
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(EFI_PHYSICAL_ADDRESS)0xa0000000,
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(UINT64)0x0
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}
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};
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/**
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Return the current Boot Mode
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This function returns the boot reason on the platform
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@return Return the current Boot Mode of the platform
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**/
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EFI_BOOT_MODE
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ArmPlatformGetBootMode (
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VOID
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)
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{
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return BOOT_WITH_FULL_CONFIGURATION;
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}
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/**
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Initialize controllers that must setup in the normal world
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This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
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in the PEI phase.
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**/
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RETURN_STATUS
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ArmPlatformInitialize (
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IN UINTN MpId
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)
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{
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/* The Foundation model has no SP810 to initialise. */
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return RETURN_SUCCESS;
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}
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/**
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Initialize the system (or sometimes called permanent) memory
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This memory is generally represented by the DRAM.
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**/
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VOID
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ArmPlatformInitializeSystemMemory (
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VOID
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)
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{
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// Nothing to do here
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}
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EFI_STATUS
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PrePeiCoreGetMpCoreInfo (
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OUT UINTN *CoreCount,
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OUT ARM_CORE_INFO **ArmCoreTable
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)
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{
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// Foundation model has no VE_SYS_REGS
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// Only support one cluster
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*CoreCount = ArmGetCpuCountPerCluster ();
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*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
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return EFI_SUCCESS;
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}
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// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the context of PrePeiCore
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EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
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ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
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EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
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{
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EFI_PEI_PPI_DESCRIPTOR_PPI,
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&mArmMpCoreInfoPpiGuid,
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&mMpCoreInfoPpi
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}
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};
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VOID
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ArmPlatformGetPlatformPpiList (
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OUT UINTN *PpiListSize,
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OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
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)
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{
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*PpiListSize = sizeof(gPlatformPpiTable);
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*PpiList = gPlatformPpiTable;
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}
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/** @file
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*
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Library/ArmPlatformLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <ArmPlatform.h>
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// Number of Virtual Memory Map Descriptors without a Logic Tile
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#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
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// DDR attributes
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#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
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#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
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/**
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Return the Virtual Memory Map of your platform
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This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
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@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
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Virtual Memory mapping. This array must be ended by a zero-filled
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entry
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**/
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VOID
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ArmPlatformGetVirtualMemoryMap (
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IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
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)
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{
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ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
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UINTN Index = 0;
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ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
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ASSERT(VirtualMemoryMap != NULL);
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VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
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if (VirtualMemoryTable == NULL) {
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return;
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}
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if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
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CacheAttributes = DDR_ATTRIBUTES_CACHED;
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} else {
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CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
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}
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// DDR
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VirtualMemoryTable[Index].PhysicalBase = ARM_VE_DRAM_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
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VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
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VirtualMemoryTable[Index].Attributes = CacheAttributes;
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// CPU peripherals. TRM. Manual says not all of them are implemented.
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VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
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VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
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VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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// Peripheral CS2 and CS3
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VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
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VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
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VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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// End of Table
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VirtualMemoryTable[++Index].PhysicalBase = 0;
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VirtualMemoryTable[Index].VirtualBase = 0;
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VirtualMemoryTable[Index].Length = 0;
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VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
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*VirtualMemoryMap = VirtualMemoryTable;
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}
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