ArmPlatformPkg: Added Aarch64 Foundation Model

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14495 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Harry Liebel
2013-07-19 00:07:16 +00:00
committed by oliviermartin
parent 6cf5778961
commit f9cec5f1d9
15 changed files with 1650 additions and 0 deletions

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#/* @file
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#*/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = RTSMArmVExpressFoundationLib
FILE_GUID = ce5d91ae-0893-11e2-b6bb-1c6f650265cc
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmPlatformLib
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
IoLib
ArmLib
MemoryAllocationLib
SerialPortLib
PrintLib
[Sources.common]
RTSMFoundation.c
RTSMFoundationMem.c
[Sources.AARCH64]
AArch64/RTSMHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
[FixedPcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmPlatformTokenSpaceGuid.PcdCoreCount

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#/* @file
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#*/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = RTSMArmVExpressFoundationLibSec
FILE_GUID = bc6e6418-0894-11e2-9dc3-1c6f650265cc
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmPlatformLib
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
IoLib
ArmLib
SerialPortLib
[Sources.common]
RTSMFoundation.c
[Sources.AARCH64]
AArch64/RTSMHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
[FixedPcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmPlatformTokenSpaceGuid.PcdCoreCount

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/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/IoLib.h>
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Ppi/ArmMpCoreInfo.h>
#include <ArmPlatform.h>
UINTN
ArmGetCpuCountPerCluster (
VOID
);
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
{
// Cluster 0, Core 0
0x0, 0x0,
// NOTE:
// The foundation model does not have the VE_SYS_REGS like all the other VE
// platforms. We pick a spot in RAM that *should* be safe in the simple case
// of no UEFI apps interfering (Only the Linux loader getting used). By the
// time we come to load Linux we should have all the cores in a safe place.
// The image expects to be loaded at 0xa0000000. We also place the mailboxes
// here as it does not matter if we corrupt the image at this time.
// NOTE also see: "ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S"
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(UINT64)0x0
},
{
// Cluster 0, Core 1
0x0, 0x1,
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(UINT64)0x0
},
{
// Cluster 0, Core 2
0x0, 0x2,
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(UINT64)0x0
},
{
// Cluster 0, Core 3
0x0, 0x3,
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(EFI_PHYSICAL_ADDRESS)0xa0000000,
(UINT64)0x0
}
};
/**
Return the current Boot Mode
This function returns the boot reason on the platform
@return Return the current Boot Mode of the platform
**/
EFI_BOOT_MODE
ArmPlatformGetBootMode (
VOID
)
{
return BOOT_WITH_FULL_CONFIGURATION;
}
/**
Initialize controllers that must setup in the normal world
This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
in the PEI phase.
**/
RETURN_STATUS
ArmPlatformInitialize (
IN UINTN MpId
)
{
/* The Foundation model has no SP810 to initialise. */
return RETURN_SUCCESS;
}
/**
Initialize the system (or sometimes called permanent) memory
This memory is generally represented by the DRAM.
**/
VOID
ArmPlatformInitializeSystemMemory (
VOID
)
{
// Nothing to do here
}
EFI_STATUS
PrePeiCoreGetMpCoreInfo (
OUT UINTN *CoreCount,
OUT ARM_CORE_INFO **ArmCoreTable
)
{
// Foundation model has no VE_SYS_REGS
// Only support one cluster
*CoreCount = ArmGetCpuCountPerCluster ();
*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
return EFI_SUCCESS;
}
// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the context of PrePeiCore
EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
{
EFI_PEI_PPI_DESCRIPTOR_PPI,
&mArmMpCoreInfoPpiGuid,
&mMpCoreInfoPpi
}
};
VOID
ArmPlatformGetPlatformPpiList (
OUT UINTN *PpiListSize,
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
)
{
*PpiListSize = sizeof(gPlatformPpiTable);
*PpiList = gPlatformPpiTable;
}

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/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <ArmPlatform.h>
// Number of Virtual Memory Map Descriptors without a Logic Tile
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
/**
Return the Virtual Memory Map of your platform
This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
Virtual Memory mapping. This array must be ended by a zero-filled
entry
**/
VOID
ArmPlatformGetVirtualMemoryMap (
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
)
{
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
UINTN Index = 0;
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
ASSERT(VirtualMemoryMap != NULL);
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
if (VirtualMemoryTable == NULL) {
return;
}
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
CacheAttributes = DDR_ATTRIBUTES_CACHED;
} else {
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
}
// DDR
VirtualMemoryTable[Index].PhysicalBase = ARM_VE_DRAM_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
VirtualMemoryTable[Index].Attributes = CacheAttributes;
// CPU peripherals. TRM. Manual says not all of them are implemented.
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Peripheral CS2 and CS3
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// End of Table
VirtualMemoryTable[++Index].PhysicalBase = 0;
VirtualMemoryTable[Index].VirtualBase = 0;
VirtualMemoryTable[Index].Length = 0;
VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
*VirtualMemoryMap = VirtualMemoryTable;
}