UefiCpuPkg/CpuDxe: Add stackless assembly AP entry points

The AP startup code simply jumps into this code with the CpuDxe driver
without setting up a stack for the processor.

Therefore, this code must setup the stack before calling into C code.

This is the basic flow:
* AP enters CpuDxe driver code (AsmApEntryPoint) without stack
  - AP grabs a lock
  - AP sets up stack
  - AP calls CpuMp.c:ApEntryPointInC
  - If ApEntryPointInC returns, the lock is freed, and another AP may
    run
  - The AP C code may call AsmApDoneWithCommonStack to indicate that
    the AP is no longer using the stack, and another may therefore
    proceed to use the stack and then call ApEntryPointInC

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16347 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jordan Justen
2014-11-13 18:24:59 +00:00
committed by jljusten
parent 1535c888c6
commit fab82c1873
7 changed files with 326 additions and 0 deletions

View File

@@ -53,11 +53,17 @@
Ia32/CpuAsm.asm | MSFT
Ia32/CpuAsm.asm | INTEL
Ia32/CpuAsm.S | GCC
Ia32/MpAsm.asm | MSFT
Ia32/MpAsm.asm | INTEL
Ia32/MpAsm.nasm | GCC
[Sources.X64]
X64/CpuAsm.asm | MSFT
X64/CpuAsm.asm | INTEL
X64/CpuAsm.S | GCC
X64/MpAsm.asm | MSFT
X64/MpAsm.asm | INTEL
X64/MpAsm.nasm | GCC
[Protocols]
gEfiCpuArchProtocolGuid ## PRODUCES