BaseTools: Various typo

Various typo in BaseTools.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Coeur <coeur@gmx.fr>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Antoine Coeur
2019-02-06 15:44:39 +08:00
committed by Liming Gao
parent 325ad62260
commit fb0b35e05f
172 changed files with 510 additions and 515 deletions

View File

@@ -497,7 +497,7 @@ typedef struct {
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
//
// "SPCR" Serial Port Concole Redirection Table
// "SPCR" Serial Port Console Redirection Table
//
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053

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@@ -650,7 +650,7 @@ typedef struct {
#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE 0x4746434D
//
// "SPCR" Serial Port Concole Redirection Table
// "SPCR" Serial Port Console Redirection Table
//
#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053

View File

@@ -98,7 +98,7 @@ typedef union {
} PCI_TYPE_GENERIC;
typedef struct {
UINT32 CardBusSocketReg; // Cardus Socket/ExCA Base
UINT32 CardBusSocketReg; // Cardbus Socket/ExCA Base
// Address Register
//
UINT16 Reserved;
@@ -197,7 +197,7 @@ typedef struct {
#define PCI_IF_8259_PIC 0x00
#define PCI_IF_ISA_PIC 0x01
#define PCI_IF_EISA_PIC 0x02
#define PCI_IF_APIC_CONTROLLER 0x10 // I/O APIC interrupt controller , 32 bye none-prefectable memory.
#define PCI_IF_APIC_CONTROLLER 0x10 // I/O APIC interrupt controller , 32 byte none-prefetchable memory.
#define PCI_IF_APIC_CONTROLLER2 0x20
#define PCI_SUBCLASS_TIMER 0x02
#define PCI_IF_8254_TIMER 0x00