BaseTools: Various typo
Various typo in BaseTools. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Coeur <coeur@gmx.fr> Reviewed-by: Liming Gao <liming.gao@intel.com>
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Liming Gao
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fb0b35e05f
@@ -497,7 +497,7 @@ typedef struct {
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#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
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//
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// "SPCR" Serial Port Concole Redirection Table
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// "SPCR" Serial Port Console Redirection Table
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//
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#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
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@@ -650,7 +650,7 @@ typedef struct {
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#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE 0x4746434D
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//
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// "SPCR" Serial Port Concole Redirection Table
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// "SPCR" Serial Port Console Redirection Table
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//
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#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
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@@ -98,7 +98,7 @@ typedef union {
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} PCI_TYPE_GENERIC;
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typedef struct {
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UINT32 CardBusSocketReg; // Cardus Socket/ExCA Base
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UINT32 CardBusSocketReg; // Cardbus Socket/ExCA Base
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// Address Register
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//
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UINT16 Reserved;
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@@ -197,7 +197,7 @@ typedef struct {
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#define PCI_IF_8259_PIC 0x00
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#define PCI_IF_ISA_PIC 0x01
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#define PCI_IF_EISA_PIC 0x02
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#define PCI_IF_APIC_CONTROLLER 0x10 // I/O APIC interrupt controller , 32 bye none-prefectable memory.
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#define PCI_IF_APIC_CONTROLLER 0x10 // I/O APIC interrupt controller , 32 byte none-prefetchable memory.
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#define PCI_IF_APIC_CONTROLLER2 0x20
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#define PCI_SUBCLASS_TIMER 0x02
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#define PCI_IF_8254_TIMER 0x00
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