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Revert "Always set WP in CR0."

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This reverts SVN r18960 / git commit
8e496a7abc.

The patch series had been fully reviewed on edk2-devel, but it got
committed as a single squashed patch. Revert it for now.

Link: http://thread.gmane.org/gmane.comp.bios.edk2.devel/4951
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18977 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Laszlo Ersek
2015-11-27 12:00:26 +00:00
committed by lersek
parent 83886d746e
commit fc8c919525
9 changed files with 24 additions and 28 deletions
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10
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
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@@ -785,7 +785,7 @@ Gen4GPageTable (
// Set Page Directory Pointers
//
for (Index = 0; Index < 4; Index++) {
Pte[Index] = (UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1) + PAGE_ATTRIBUTE_BITS;
Pte[Index] = (UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1) + IA32_PG_P;
}
Pte += EFI_PAGE_SIZE / sizeof (*Pte);
@@ -793,7 +793,7 @@ Gen4GPageTable (
// Fill in Page Directory Entries
//
for (Index = 0; Index < EFI_PAGE_SIZE * 4 / sizeof (*Pte); Index++) {
Pte[Index] = (Index << 21) | IA32_PG_PS | PAGE_ATTRIBUTE_BITS;
Pte[Index] = (Index << 21) + IA32_PG_PS + IA32_PG_RW + IA32_PG_P;
}
if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
@@ -802,7 +802,7 @@ Gen4GPageTable (
Pdpte = (UINT64*)PageTable;
for (PageIndex = Low2MBoundary; PageIndex <= High2MBoundary; PageIndex += SIZE_2MB) {
Pte = (UINT64*)(UINTN)(Pdpte[BitFieldRead32 ((UINT32)PageIndex, 30, 31)] & ~(EFI_PAGE_SIZE - 1));
Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | PAGE_ATTRIBUTE_BITS;
Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages + IA32_PG_RW + IA32_PG_P;
//
// Fill in Page Table Entries
//
@@ -819,7 +819,7 @@ Gen4GPageTable (
GuardPage = 0;
}
} else {
Pte[Index] = PageAddress | PAGE_ATTRIBUTE_BITS;
Pte[Index] = PageAddress + IA32_PG_RW + IA32_PG_P;
}
PageAddress+= EFI_PAGE_SIZE;
}
@@ -886,7 +886,7 @@ SetCacheability (
NewPageTable[Index] |= (UINT64)(Index << EFI_PAGE_SHIFT);
}
PageTable[PTIndex] = ((UINTN)NewPageTableAddress & gPhyMask) | PAGE_ATTRIBUTE_BITS;
PageTable[PTIndex] = ((UINTN)NewPageTableAddress & gPhyMask) | IA32_PG_P;
}
ASSERT (PageTable[PTIndex] & IA32_PG_P);