OvmfPkg/CloudHv: Remove Q35 specifics
Anything specific to the QEMU Q35 platform is not relevant for the CloudHv target. Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
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mergify[bot]
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@ -533,14 +533,6 @@
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
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!endif
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!endif
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# This PCD is used to set the base address of the PCI express hierarchy. It
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# is only consulted when OVMF runs on Q35. In that case it is programmed into
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# the PCIEXBAR register.
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#
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# On Q35 machine types that QEMU intends to support in the long term, QEMU
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# never lets the RAM below 4 GB exceed 2816 MB.
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gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
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!if $(SOURCE_DEBUG_ENABLE) == TRUE
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!if $(SOURCE_DEBUG_ENABLE) == TRUE
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gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
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gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
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!endif
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!endif
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@ -631,8 +623,6 @@
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gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
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gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
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!if $(SMM_REQUIRE) == TRUE
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!if $(SMM_REQUIRE) == TRUE
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
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!endif
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!endif
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