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IntelFrameworkModulePkg: Update LegacyBiosDxe to use UmaAddress and UmaSize in CSM 0.98.

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The UmaAddress/UmaSize fields allows the CSM to have writable memory 
between the top of the option ROMs and the start of its read-only code segment.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Elvin Li <elvin.li@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17131 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
David Woodhouse
2015-04-08 01:44:22 +00:00
committed by li-elvin
parent 881644d741
commit ff247afd22
2 changed files with 31 additions and 3 deletions
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18
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
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@ -1238,6 +1238,24 @@ GenericLegacyBoot (
0x40000,
&Granularity
);
if ((Private->Legacy16Table->TableLength >= OFFSET_OF (EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&
((Private->Legacy16Table->UmaAddress != 0) && (Private->Legacy16Table->UmaSize != 0))) {
//
// Here we could reduce UmaAddress down as far as Private->OptionRom, taking into
// account the granularity of the access control.
//
DEBUG((EFI_D_INFO, "Unlocking UMB RAM region 0x%x-0x%x\n", Private->Legacy16Table->UmaAddress,
Private->Legacy16Table->UmaAddress + Private->Legacy16Table->UmaSize));
Private->LegacyRegion->UnLock (
Private->LegacyRegion,
Private->Legacy16Table->UmaAddress,
Private->Legacy16Table->UmaSize,
&Granularity
);
}
//
// Lock attributes of the Legacy Region if chipset supports
//