Use on-demand paging for CpuSaveStates read/write. It was measured about 200us for either read or write the PI CpuSaveStates to framework, ~400us in total on a platform with 80 CPUs with original for loop implementation. So with on-demand paging, if the framework SMI handler doesn’t read/write CpuSaveStates, ~400us will be saved. If the handler happens to use CpuSaveStates, there will be about 20us overhead for either read or write a page which contains 5 continuous CpuSaveStates.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10328 6f19259b-4bc3-4df7-8a09-765794883524

EdkCompatibilityPkg/Compatibility/SmmBaseHelper/X64/PageFaultHandler.S

@@ -0,0 +1,46 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2010, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+#   PageFaultHandler.S
+#
+# Abstract:
+#
+#   Defines page fault handler used to hook SMM IDT
+#
+#------------------------------------------------------------------------------
+
+ASM_GLOBAL ASM_PFX(PageFaultHandlerHook)
+ASM_PFX(PageFaultHandlerHook):
+    pushq    %rax                         # save all volatile registers
+    pushq    %rcx
+    pushq    %rdx
+    pushq    %r8
+    pushq    %r9
+    pushq    %r10
+    pushq    %r11
+    addq     $-0x20, %rsp
+    call     ASM_PFX(PageFaultHandler)
+    addq     $0x20, %rsp
+    test     %rax, %rax
+    popq     %r11
+    popq     %r10
+    popq     %r9
+    popq     %r8
+    popq     %rdx
+    popq     %rcx
+    popq     %rax                         # restore all volatile registers
+    jnz      L1
+    jmp      ASM_PFX(mOriginalHandler)
+L1:
+    addq     $0x08, %rsp                  # skip error code for PF
+    iretq

EdkCompatibilityPkg/Compatibility/SmmBaseHelper/X64/PageFaultHandler.asm

@@ -0,0 +1,52 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2010, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   PageFaultHandler.asm
+;
+; Abstract:
+;
+;   Defines page fault handler used to hook SMM IDT
+;
+;------------------------------------------------------------------------------
+
+mOriginalHandler PROTO
+PageFaultHandler PROTO
+
+  .code
+
+PageFaultHandlerHook PROC
+    push    rax                         ; save all volatile registers
+    push    rcx
+    push    rdx
+    push    r8
+    push    r9
+    push    r10
+    push    r11
+    add     rsp, -20h
+    call    PageFaultHandler
+    add     rsp, 20h
+    test    rax, rax
+    pop     r11
+    pop     r10
+    pop     r9
+    pop     r8
+    pop     rdx
+    pop     rcx
+    pop     rax                         ; restore all volatile registers
+    jnz     @F
+    jmp     mOriginalHandler
+@@:
+    add     rsp, 08h                    ; skip error code for PF
+    iretq
+PageFaultHandlerHook ENDP
+  END