ArmPkg: Fix various typos

Fix various typos in ArmPkg.

Signed-off-by: Coeur <coeur@gmx.fr>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Antoine Cœur
2019-02-06 23:39:35 +08:00
committed by Leif Lindholm
parent 080981d72d
commit ff5fef1428
31 changed files with 62 additions and 62 deletions

View File

@@ -146,7 +146,7 @@ CpuIoCheckParameter (
//
// Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
// can also be the maximum integer value supported by the CPU, this range
// check must be adjusted to avoid all oveflow conditions.
// check must be adjusted to avoid all overflow conditions.
//
// The following form of the range check is equivalent but assumes that
// MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).

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@@ -281,7 +281,7 @@ GetMemoryRegionRec (
BlockEntry++;
} else if (EntryType == BlockEntryType) {
// We have found the BlockEntry attached to the address. We save its start address (the start
// address might be before the 'BaseAdress') and attributes
// address might be before the 'BaseAddress') and attributes
*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
*RegionLength = 0;
*RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;

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@@ -234,7 +234,7 @@ SyncCacheConfig (
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
DEBUG ((EFI_D_PAGE, "SyncCacheConfig()\n"));
DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
// This code assumes MMU is enabled and filed with section translations
ASSERT (ArmMmuEnabled ());

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@@ -188,7 +188,7 @@ CpuSetMemoryAttributes (
if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
// Minimum granularity is SIZE_4KB (4KB on ARM)
DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
DEBUG ((DEBUG_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum granularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes));
return EFI_UNSUPPORTED;
}

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@@ -61,7 +61,7 @@ PublishArmProcessorTable (
// Allocate Runtime memory for ARM processor table
ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
// Check if the memory allocation is succesful or not
// Check if the memory allocation is successful or not
ASSERT(NULL != ArmProcessorTable);
// Set ARM processor table to default values
@@ -81,7 +81,7 @@ PublishArmProcessorTable (
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
// Check if the memory allocation is succesful or not
// Check if the memory allocation is successful or not
ASSERT(NULL != ArmProcessorTable->ArmCpus);
// Copy ARM Processor Table data from HOB list to newly allocated memory

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@@ -27,7 +27,7 @@ InitializeExceptions (
VectorInfo = VectorInfoList;
}
// intialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
// initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
InitializeCpuExceptionHandlers(VectorInfo);
Status = EFI_SUCCESS;

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@@ -23,7 +23,7 @@ Abstract:
//
#include <PiPei.h>
//
// The protocols, PPI and GUID defintions for this module
// The protocols, PPI and GUID definitions for this module
//
#include <Ppi/ArmMpCoreInfo.h>

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@@ -365,7 +365,7 @@ TimerInitialize (
UINT32 TimerHypIntrNum;
if (ArmIsArchTimerImplemented () == 0) {
DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence cann't use this Driver \n"));
DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence can't use this Driver \n"));
ASSERT (0);
}