9 Commits

Author SHA1 Message Date
Star Zeng
b0898ad483 IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3)
Add PcdVTdPeiDmaBufferSize(S3) to replace the hard coded value
TOTAL_DMA_BUFFER_SIZE and TOTAL_DMA_BUFFER_SIZE_S3 in IntelVTdPmrPei.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 339cb0af96)
2018-05-10 14:23:51 +08:00
Jiewen Yao
864f8a3217 IntelSiliconPkg/dec: Clarify VTdPolicy.
Clarify the VTdPolicy is for both PEI and DXE.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 8be3ff8fb8)
2018-05-10 14:23:33 +08:00
Jiewen Yao
a6845dfa70 IntelSiliconPkg/dec: Add VTD_INFO PPI GUID
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 0b7df50021)
2018-05-10 14:23:23 +08:00
Jiewen Yao
16d682ef75 IntelSiliconPkg/dec: Add VTd policy PCD
BIT0: This is to control if a platform wants to enable VTd
based protection during boot.
BIT1: This is to control if a platform wants to keep VTd
enabled at ExitBootService.

The default configuration is BIT0:1, BIT1:0.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 0d12b73306)
2018-05-10 14:23:20 +08:00
Jiewen Yao
68b7aeaf22 IntelSiliconPkg/Dec: Add ProtocolGuid.
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit b7ff5027fe)
2018-05-10 14:23:07 +08:00
Laszlo Ersek
2048ab4b3e IntelSiliconPkg/IntelSiliconPkg.dec: drop bogus semicolon from GUID def
The DEC spec doesn't allow the trailing semicolon:

  2.6 [Guids] Usage

  GuidCName = {C Format Guid Value} # Comment

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-17 14:49:09 +01:00
Giri P Mudusuru
a5991c8832 IntelSiliconPkg: Add PCD for Graphics VBT FFS GUID
Added PCD PcdIntelGraphicsVbtFileGuid to store raw format
Graphics Video BIOS Table (VBT) in FFS.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-14 10:28:38 -08:00
Mudusuru, Giri P
63998d7cd4 IntelSiliconPkg: Add SMBIOS data HOB GUID
Add gIntelSmbiosDataHobGuid used to publish SMBIOS data from PEI phase.
The HOB data format will be same as SMBIOS spec define formats for
Types 0 to 127 and OEM defined types for 128 to 255.

Generic library or DXE driver can add SMBIOS records using this HOB(s).

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2016-11-01 20:14:09 +08:00
Jiewen Yao
9429e8a07d IntelSiliconPkg: Add initial version.
This package will include open source common Intel silicon related modules.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-06-15 09:31:28 +08:00