5 Commits

Author SHA1 Message Date
Star Zeng
62b8b5be71 PcAtChipsetPkg AcpiTimerLib: Get more accurate TSC Frequency
Minimize the code overhead between the two TSC reads by adding
new internal API to calculate TSC Frequency instead of reusing
MicroSecondDelay ().

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Paul A Lohr <paul.a.lohr@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2016-08-12 15:42:44 +08:00
wang xiaofeng
dde4aedc35 PcAtChipsetPkg AcpiTimerLib: Fix a logic error
if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister) &
EnableMask) != EnableMask)) {

The bracket place is not right, I think it should be

if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) &
EnableMask) != EnableMask)

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: wang xiaofeng <winggundum82@163.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-05-15 17:45:25 +08:00
Liming Gao
9ff926d6d7 PcAtChipsetPkg: Update BaseAcpiTimerLib
Introduce new PcdAcpiIoPortBaseAddressMask to mask BITS ACPI IO Port Base Address.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16952 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28 05:34:38 +00:00
Tian, Hot
8edfdee0dc Minor format update: add missing space in copyright line
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Tian, Hot <hot.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16034 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-02 07:50:29 +00:00
Gao, Liming
83d1ffb92f PcAtChipsetPkg: new AcpiTimerLib libraries.
Two library instances are added to support BASE type and DXE type. Those libraries provides basic timer support using the ACPI timer hardware.  The performance  counter features are provided by the processors time stamp counter.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Kinney, Michael D <michael.d.kinney@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15803 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-14 14:30:32 +00:00