Ronald Cron
3402aac7d9
ARM Packages: Removed trailing spaces
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Trailing spaces create issue/warning when generating/applying patches.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com >
Reviewed-By: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:29:52 +00:00
Ronald Cron
62d441fb17
ARM Packages: Corrected non-DOS line endings
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com >
Reviewed-By: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15832 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-19 13:22:20 +00:00
Olivier Martin
6defc4db4c
ArmPkg/CpuDxe/ArmV6: Return error status when ExceptionHandlersStart is not 32-byte aligned
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The function should detect and return the error in non-debug builds when the ASSERT does nothing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15606 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-01 09:24:07 +00:00
Olivier Martin
ec17f0f56a
ArmPkg/CpuDxe: Stack Pointer is not 8-bytes aligned in AArch32 interrupt handling
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See section "2.1 The need to align SP to a multiple of 8 at conforming call sites" in
"Advisory Note. SP must be 8-byte aligned on entry to AAPCS-conforming functions"
Source: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15553 6f19259b-4bc3-4df7-8a09-765794883524
2014-06-03 16:42:18 +00:00
Olivier Martin
71fd27cbee
ArmPkg/CpuDxe: Removed LR adjustement for SVC call
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The Link Register (LR) does not need adjustement when receiving a Supervisor Call (SVC).
Note: SVC might be generated by debuggers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14911 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-28 21:38:56 +00:00
Olivier Martin
5ad9b48f98
ArmPkg/CpuDxe: Fixed the condition that checks if the level-1 descriptor points to a level-2 page table
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14700 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-23 09:38:53 +00:00
Eugene Cohen
1bc3923d08
ArmPkg/CpuDxe: Exception Handling SP Adjust
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The exception handling support code appears to adjust the stack pointer in the wrong direction.
It decrements the stack pointer by 0x60, but this should be an increment (add) for the
downward-growing stack.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com >
Reviewed-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14646 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-10 10:10:56 +00:00
Olivier Martin
b75d7605b4
ArmPkg/CpuDxe: Fixed calculation of the Page Table Index (Level 2 Descriptor)
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14617 6f19259b-4bc3-4df7-8a09-765794883524
2013-09-02 13:12:17 +00:00
Olivier Martin
2e969d2e9e
ArmPkg/CpuDxe: Added support to not set a memory region with the same attribute
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Changing the attribute implies some cache management (clean & invalidate).
Preventing the cache management should improve the performance.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14568 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19 17:38:39 +00:00
Olivier Martin
6adbd5b4d2
ArmPkg/ArmLib: Added ConvertSectionAttributesToPageAttributes()
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This helper function converts the section attributes into their page equivalents.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14567 6f19259b-4bc3-4df7-8a09-765794883524
2013-08-19 17:37:50 +00:00
Olivier Martin
5b53eaffe8
ArmPkg,ArmPlatformPkg: Free memory allocated by Get.*SpaceMap()
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14507 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-26 17:12:12 +00:00
Olivier Martin
591fb3781a
ArmPkg/CpuDxe: Moved memory mapping functions that are not architecture specific to 'CpuMmuCommon.c'
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14482 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-18 06:20:33 +00:00
oliviermartin
2614b0c474
ArmPkg: Moved ARMv7 specific files to a 'Arm' subdirectory
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14180 6f19259b-4bc3-4df7-8a09-765794883524
2013-03-12 00:49:42 +00:00
oliviermartin
1e57a46299
ARM Packages: Fixed line endings
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This large code change only modifies the line endings to be CRLF to be
compliant with the EDK2 coding convention document.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
2013-01-25 11:28:06 +00:00
oliviermartin
21de944e03
ARM Packages: Moved ARM assembly files to 'Arm' subdirectory
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Signed-off-by: Olivier Martin <olivier.martin@arm.com >
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13772 6f19259b-4bc3-4df7-8a09-765794883524
2012-09-28 10:52:16 +00:00