REF: https://bugzilla.tianocore.org/show_bug.cgi?id=650
Today's implementation converts the untested more reliable memory
from reserved GCD type to system memory GCD type.
Though it doesn't impact the return result of gBS->GetMemoryMap().
But it impacts the return result of gDS->GetMemorySpaceDescriptor().
The patch fixes the bug to convert the untested more reliable memory
from reserved GCD type to more reliable memory GCD type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 1c06bd485e)
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=650
Today's implementation converts the untested more reliable memory
from reserved GCD type to system memory GCD type.
Though it doesn't impact the return result of gBS->GetMemoryMap().
But it impacts the return result of gDS->GetMemorySpaceDescriptor().
The patch fixes the bug to convert the untested more reliable memory
from reserved GCD type to more reliable memory GCD type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 2e5fb984ed)
The updated Length value should be returned
for EFI_BUFFER_TOO_SMALL case.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit f068aa038d)
The commit places the check for MediaId at the beginning of Block IO
services:
RamDiskBlkIoReadBlocks and
RamDiskBlkIoWriteBlocks
This aligns with the Block IO protocol implementations for other
devices.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 0feca62c7a)
In below calling stack:
UsbBootIsUnitReady()
UsbBootExecCmdWithRetry()
UsbBootExecCmd()
UsbBootRequestSense()
When USB CDROM is hot-plugged, UsbBootRequestSense() retrieves sense
key (6 = UnitAttention), additional sense code (29h = Power ON).
But it wrongly maps such sense data to Device Error status.
It causes UsbBootExecCmd() executed again.
In the second time call to UsbBootExecCmd(), UsbBootRequestSense()
retrieves sense key (6 = UnitAttention), additional sense code
(28h = media changed).
The above analysis explains why hot-plug USB CDROM cannot be
recognized after below commit:
SHA1 a662afb5b0
* MdeModulePkg/UsbStorage: Fix "map -r" cannot detect media change,
which removes the media changed status check in UsbBootDetectMedia().
The proper fix to this problem is to map the ASC (additional sense
code 29h) properly to success status so that no second call to
UsbBootExecCmd() is made.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
(cherry picked from commit 6461344c31)
V2: Just update the commit message to reference the hash value of
new performance infrastructure.
Our new performance infrastructure (edk2 trunk commit hash value:
SHA-1: 73fef64f14 ~
SHA-1: 115eae650b) can support to
dump performance date form ACPI table in OS. So we can remove
the old perf code to write performance data to OS.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 3a039a567a)
V2: Just update the commit message to reference the hash value of
new performance infrastructure.
Our new performance infrastructure (edk2 trunk commit hash value:
SHA-1: 73fef64f14 ~
SHA-1: 115eae650b) can support to
dump performance date form ACPI table in OS. So we can remove
the old perf code to write performance data to OS.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 9f0d7651b3)
For a structure with a series of bit fields and used as a storage
in vfr file, and if the bit fields do not add up to the size of
the defined type.In the C code use sizeof() to get size of the
structure, the results may vary form the compiler(VS,GCC...).
But the size of the storage calculated by VfrCompiler is fixed
(calculate with alignment).To avoid the issue cased by above case,
we need to make the total width of the bit fields in the structure
aligned with the size of the defined type for these bit fields.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 6b86f6f336)
The Reset Notification protocol is added in UEFI spec to support
reset notification mechanism in the DXE phase.
This patch adds similar EDKII specific Reset Notification PPI to PEI
phase to provide the same support.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit ce2697abeb)
The library class that provides services to generate a GUID specific
reset, parse the GUID from a GUID specific reset, and build the
ResetData buffer for any type of reset that requires extra data.
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit e12ceb40ce)
Add a PEI instance of ResetSystemLib that calls the ResetSystem2()
service in the PEI Services Table.
Add a DXE instance of ResetSystemLib that calls the ResetSystem()
service in the UEFI Runtime Services Table.
These 2 library instances should be the default ResetSystemLib
mapping for most PEIMs and DXE drivers so all reset system requests
go through the core service.
Only the implementation of the core servies should use the
platform specific instance of the ResetSystemLib that actually
performs the hardware actions to reset the platform.
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
(cherry picked from commit ce3cd892c8)
The patch adds more debug message in ResetSystem().
It also removes unnecessary check of mResetNotifyDepth.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 4bf95a9f36)
Add support for platform specific reset filters and platform
specific reset handlers to ResetSystem(). A filter may modify
the reset type and reset data and call ResetSystem() with the
modified parameters. A handler performs the reset action.
The support for platform specific filters and platform specific
handlers is based on the Reset Notification feature added to the
UEFI 2.7 Specification.
Platform specific reset filters are processed first so the final
reset type and reset data can be determined. In the DXE Phase
The UEFI Reset Notifications are processed second so all UEFI
Drivers that have registered for a Reset Notification can perform
any required clean up actions. The platform specific reset
handlers are processed third. If there are no registered
platform specific reset handlers or none of them reset the
platform, then the default reset action based on the
ResetSystemLib is performed.
In the PEI Phase, filters and handlers are registered through
the following 2 PPIs that are based on
EFI_RESET_NOTIFICATION_PROTOCOL.
* gEdkiiPlatformSpecificResetFilterPpiGuid
* gEdkiiPlatformSpecificResetHandlerPpiGuid
In the DXE Phase, filters and handlers are registered through
the following 2 Protocols that are based on
EFI_RESET_NOTIFICATION_PROTOCOL.
* gEdkiiPlatformSpecificResetFilterProtocolGuid
* gEdkiiPlatformSpecificResetHandlerProtocolGuid
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
(cherry picked from commit 99a6529e1e)
# Conflicts:
# MdeModulePkg/MdeModulePkg.dec
V3:
a. Remove unused definitions
b. Get records size form the records buffer when getting size action
is triggered.
V2:
Update FirmwarePerformanceSmm to receive the address
of performance records instead of records content.
Receive buffer address of Boot performance records
which are reported by SmmCorePerformanceLib.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 718a937ed9)
V4:
Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.
V3:Add handling for the case when performance feature is not enabled.
V2:
Update FirmwarePerformanceDxe to receive the address
of performance records instead of records content.
1. Remove the macro EXTENSION_RECORD_SIZE, since the extension
size can be got through PcdExtFpdtBootRecordPadSize.
2. Hook EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT to install ACPI table
3. Copy SMM record accord to the allocated size
4. Receive Boot performance table address instead of
contents which are reported DxeCorePerformanceLib.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 9e62c23017)
V3:
a. Handle the case when string is empty in String Record.
b. Use gEdkiiFpdtExtendedFirmwarePerformanceGuid to report status
code.
c. Refine the code logic.
V2:
Update SmmCorePerformanceLib to report the buffer address of
boot performance records instead of records contents.
Updated to convert Pref entry to FPDT record in SMM phase and then
export records to FPDT table.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 2001f84e8c)
V4:
a.Update the GUID for status code in DxeCorePerformanceLib and
FirmwarePerformanceDxe.
b. Add check for Insert FPDT record in DxeCorePerformanceLib
to avoid re-entry case.
V3:
a. Handle the case when string is empty in String Record.
b. refine the code logic.
V2:
Update DxecorePerformanceLib to report the boot performance table
address instead of records contents.
Updated to convert Pref entry to FPDT record in DXE phase and then
allocate boot performance table to save the record and report
the address of boot performance table to FirmwarePerformanceDxe.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 9609d24b19)
V3:Handle the case when string is empty in String Record.
Updated to convert Pref entry to FPDT record in PEI phase and then
report the records to DxeCorePerfLib through GUID hob.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit 9169f67690)
EBC build failure is caused by d7a09cb86a.
It changes MAX_UINTN and MAX_ADDRESS definition as below. VarCheckUefiLib
and DxeCore uses MAX_UINTN and MAX_ADDRESS in the global data initialization.
New style has >> operator, and not supported by EBC compiler.
The fix is not to build VarCheckUefiLib and DxeCore for EBC arch.
#define MAX_UINTN ((UINTN) ~0)
==>
#define MAX_UINTN ((UINTN)(~0ULL >> (64 - sizeof (INTN) * 8)))
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit f1f8ce6de7)
The Heap Guard feature wrapped SmmInternalFreePagesEx with
SmmInternalFreePagesExWithGuard but didn't add necessary
parameter check. This patch fixes this situation.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 7823611cda)
Initialize local variable to suppress warning C4703:
potentially uninitialized local pointer variable.
Both reads (dereferences) of "PciRootBridgeIo" in
PciBusDriverBindingStart() are only reached if
"gFullEnumeration" is TRUE on entry *and* we successfully
open the EfiPciRootBridgeIoProtocol interface.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit a012bf6e3e)
Install IOMMU PPI for pre-memory phase and return
EFI_NOT_AVAILABLE_YET to indicate that DMA protection has been enabled,
but DMA buffer are not available to be allocated yet.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit 20b58eb850)
Current PXE driver uses zero GUID if failed to get the system GUID from smbios
table, and some OS PXE boot may fail in such case. This patch is to add a warning
message to inform user that smbios table is missed on the platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
SmiHandlerUnRegister() validates the DispatchHandle by checking
whether the first 32bit matches to a certain signature
(SMI_HANDLER_SIGNATURE).
But if a caller calls *UnRegister() twice and the memory freed by
first call still contains the signature, the second call may hang.
The patch fixes this issue by locating the DispatchHandle
in all SMI handlers, instead of checking the signature.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 8a641d2b73)
Considering following scenario (both NX memory protection and heap guard
are enabled):
1. Allocate 3 pages. The attributes of adjacent memory pages will be
|NOT-PRESENT| present | present | present |NOT-PRESENT|
2. Free the middle page. The attributes of adjacent memory pages should be
|NOT-PRESENT| present |NOT-PRESENT| present |NOT-PRESENT|
But the NX feature will overwrite the attributes of middle page. So it
looks still like below, which is wrong.
|NOT-PRESENT| present | PRESENT | present |NOT-PRESENT|
The solution is checking the first and/or last page of a memory block to be
marked as NX, and skipping them if they are Guard pages.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit a6a0a59756)
If enabled, NX memory protection feature will mark all free memory as
NX (non-executable), including page 0. This will overwrite the attributes
of page 0 if NULL pointer detection feature is also enabled and then
compromise the functionality of it. The solution is skipping the NX
attributes setting to page 0 if NULL pointer detection feature is enabled.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 9b17c6511d)
This issue is a regression one caused by a patch at
425d25699b
That fix didn't take the 0 page to free into account, which still
needs to call UnsetGuardPage() even no memory needs to free.
The fix is just moving the calling of UnsetGuardPage() to the place
right after calling AdjustMemoryF().
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 1263ecf2ff)
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
(cherry picked from commit c9e6803cf4)
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
(cherry picked from commit c095341cc4)
Today's implementation only return key state when there is key.
But when user doesn't press any key, the key state cannot be
returned.
The patch changes the ReadKeyStrokeEx() to always return the
key state even there is no key pressed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
(cherry picked from commit 20ddbc133f)
"Entry->Link.ForwardLink = NULL;" is present in RemoveMemoryMapEntry()
for DxeCore, that is correct.
"Entry->Link.ForwardLink = NULL;" is absent in RemoveOldEntry()
for PiSmmCore, that is incorrect.
Without this fix, when FromStack in Entry is TRUE,
the "InsertTailList (&mMapStack[mMapDepth].Link, &Entry->Link);" in
following calling to CoreFreeMemoryMapStack() will fail as the entry
at mMapStack[mMapDepth] actually has been removed from the list.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
(cherry picked from commit e434be3c9c)
The call in ProbeMediaStatusEx() to the ReadDisk() function of the
EFI_DISK_IO_PROTOCOL interface implemented in DiskIoDxe/DiskIo.c
crashed in DiskIo2ReadWriteDisk() because of the NULL value of
the destination buffer pointer.
Pass the address of a buffer in the stack instead of a NULL
pointer.
The similar fix was applied to ProbeMediaStatus in commit
df473cc1fc
* MdeModulePkg/PartitionDxe: Fix media probe
Somehow ProbeMediaStatusEx() wasn't changed together.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Tested-by: Jian J Wang <jian.j.wang@intel.com>
(cherry picked from commit 68599525d8)
After HTTP boot successfully in home mode, the HTTP device path will be
updated accordingly. So, the new device path may be appended with a DNS
device path node. When executing home mode boot again, the original HTTP
device path will mismatch with the new updated one, which will cause the
HTTP boot failure. So, we need update the current match algorithm to match
the correct FilePath. Since the DNS device path is an optional, we can skip
it check.
This patch is to fix above issue.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
(cherry picked from commit 6945837e4c)
Within function NvmExpressPassThru():
The data buffer for the below 2 Admin command:
Create I/O Completion Queue command (Opcode 01h)
Create I/O Submission Queue command (Opcode 05h)
are not mapped to the PCI controller specific addresses.
But the current code logic also prevents the below NVM command:
Write (Opcode 01h)
from mapping its data buffer.
Hence, this commit refine the logic to resolve this issue.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 748cd9a680)
Per PI spec, the PciEnumerationComplete protocol installation
should be after PciIo installation.
Today's implementation installs the PciEnumerationComplete
after hardware enumeration is completed, but before PciIo
installation.
The change corrects the spec/implementation gap.
The change also benefits certain implementation that depends on
the PciIo handle in PciEnumerationComplete callback.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 42e8bc7d16)
The patch is just a code cleanup with no functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
(cherry picked from commit 2632981783)
