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74 Commits

Author SHA1 Message Date
Chasel Chiu
26638d2aa3 IntelFsp2WrapperPkg: Check header revision for MultiPhase support. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4119

Earlier version of FSP header may not have MultiPhase fields present in
the FspInfoHeader so the handler should verify header revision before
accessing the MultiPhase fields from the header.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-10-25 23:12:10 +00:00
Chasel Chiu
1bd2ff1866 IntelFsp2WrapperPkg: Remove CI exception of PlatformMultiPhaseLib. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092

Duplicate library class header issue will be resolved and CI
exception for FspWrapperPlatformMultiPhaseLib should be removed too.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
 2022-10-05 04:13:53 +00:00
Chasel Chiu
f054beec54 IntelFsp2WrapperPkg: Add header for PlatformMultiPhaseLib. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4092

To comply with coding style rule each library class
should have its own header even if it is just a private child library
instance consumed by parent public library in the same package.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-10-05 04:13:53 +00:00
Michael Kubacki
9ecab62d40 IntelFsp2WrapperPkg: Add CI YAML file 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2WrapperPkg to the list of supported build packages
for edk2 CI and defines an initial set of CI configuration options.

Adds a special case for the Library Class check CI plugin to ignore
FspWrapperPlatformMultiPhaseLib with an explanatory comment.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney>
 2022-10-04 16:53:59 +00:00
Michael Kubacki
7c424c28b0 IntelFsp2WrapperPkg: Fix code formatting errors 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney>
 2022-10-04 16:53:59 +00:00
Chasel Chiu
96f3efbd99 IntelFsp2WrapperPkg: Implement FSP 2.4 MultiPhase wrapper handlers. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916

Implement MultiPhase wrapper handlers and only call to MultiPhase
handlers when FSP supports.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-09-26 20:22:44 +00:00
Chasel Chiu
ec87181192 IntelFsp2WrapperPkg: Rename PlatformMultiPhaseLibSample. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916

Basing on offline feedbacks to rename
FspWrapperPlatformMultiPhaseLibSample to
FspWrapperPlatformMultiPhaseLibNull.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-09-01 23:45:32 +00:00
Pierre Gondois
6edd257861 IntelFsp2WrapperPkg: Remove duplicated words 
In an effort to clean the documentation of the above
package, remove duplicated words.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-09-01 23:22:53 +00:00
Chasel Chiu
31a94f7fba IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3916

Provide FSP 2.4 MultiPhase wrapper support library.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-08-31 16:48:07 +00:00
Chasel Chiu
24eac4caf3 IntelFsp2WrapperPkg: Support 64bit FspResetType for X64 build. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3999
FspResetType will be either 32bit or 64 bit basing on
the build type.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-07-19 22:24:31 +00:00
Duggapu, Chinni B
df1c7e91b4 IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call for X64 Calling Convention 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
Pass Input parameters using RCX.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Ted Kuo <ted.kuo@intel.com>
 2022-05-31 11:14:20 +00:00
Yu Pu
3afa0a2096 IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on UefiCpuLib. 
There are two libraries: MdePkg/CpuLib and UefiCpuPkg/UefiCpuLib and
UefiCpuPkg/UefiCpuLib will be merged to MdePkg/CpuLib. To avoid build
failure, add CpuLib dependency to all modules that depend on UefiCpuLib.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Yu Pu <yu.pu@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2022-05-06 07:48:15 +00:00
Ted Kuo
91a03f78ba IntelFsp2WrapperPkg: SecFspWrapperPlatformSecLibSample support for X64 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3893
1.Added SecFspWrapperPlatformSecLibSample support for X64.
2.Adopted FSPT_ARCH2_UPD in SecFspWrapperPlatformSecLibSample.
3.Moved Fsp.h up one level to be shared across IA32 and X64.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-04-16 00:18:14 +00:00
Ted Kuo
86a2f3c439 IntelFsp2WrapperPkg: BaseFspWrapperApiLib support for X64 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
Add Execute64BitCode to execute 64bit code from long mode directly
in PEI 64bit.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-04-16 00:18:14 +00:00
Ted Kuo
4a6ed7e46a IntelFsp2WrapperPkg: Adopt FSPM_UPD_COMMON_FSP24 for X64 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
Adopt FSPM_UPD_COMMON_FSP24 in FspmWrapperPeim to support X64.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2022-04-16 00:18:14 +00:00
Chasel Chiu
9ec2cc1f31 IntelFsp2WrapperPkg : Remove EFIAPI from local functions. 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642

Local functions do not need EFIAPI.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2021-12-22 05:11:50 +00:00
S, Ashraf Ali
de9e5b7dc7 IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
when the module is not building in IA32 mode which will lead to building
error. when a module built-in X64 function pointer will be the size of
64bit width which cannot be fit in 32bit address which will lead to
error. to overcome this issue introducing the 2 new PCD's for the 64bit
modules can consume it. based on the which pcd platform set, use that.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Kuo Ted <ted.kuo@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Digant H Solanki <digant.h.solanki@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2021-12-20 03:42:50 +00:00
Michael Kubacki
7c7184e201 IntelFsp2WrapperPkg: Apply uncrustify changes 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2WrapperPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2021-12-07 17:24:28 +00:00
Zhang Xiaoqiang
f334c5a41d IntelFsp2WrapperPkg: Make PcdFspModeSelection dynamic 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3632

PcdFspModeSelection will be used to set FSP mode.
Make PcdFspModeSelection dynamic and set it accordingly.

Signed-off-by: Zhang Xiaoqiang <xiaoqiang.zhang@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2021-09-22 08:37:09 +00:00
Lou, Yun
fe5da0927a IntelFsp2WrapperPkg: Remove microcode related PCDs 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334

IntelFsp2WrapperPkg defines following PCDs:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize
  PcdFlashMicrocodeOffset

But the PCD name caused confusion because UefiCpuPkg defines:
  PcdCpuMicrocodePatchAddress
  PcdCpuMicrocodePatchRegionSize

PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base
address of the FV that holds the microcode.
PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the
microcode.

The relationship between the PCDs is:
IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress
 +  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchAddress

IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize
 -  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
 == UefiCpuPkg.PcdCpuMicrocodePatchRegionSize

To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg
are only used by a sample FSP-T wrapper, this patch removes
the 3 PCDs defined in IntelFsp2WrapperPkg.

The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2021-05-31 03:14:08 +00:00
Dandan Bi
2b46d175cb IntelFsp2WrapperPkg: Consume MdeLibs.dsc.inc for RegisterFilterLib 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246

MdeLibs.dsc.inc was added for some basic/default library
instances provided by MdePkg and RegisterFilterLibNull Library
was also added into it as the first version of MdeLibs.dsc.inc.

So update platform dsc to consume MdeLibs.dsc.inc for
RegisterFilterLibNull which will be consumed by IoLib and BaseLib.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2021-03-31 05:47:10 +00:00
Qi Zhang
414d7d11e6 IntelFsp2WrapperPkg： remove gPeiTpmInitializationDonePpiGuid from Depex 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2963

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-09-16 05:16:02 +00:00
Qi Zhang
0c5c45a133 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec: add FspMeasurementLib.h 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2944

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Message-Id: <20200831020721.8967-1-qi1.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-09-01 15:40:02 +00:00
Qi Zhang
63d92674d2 IntelFsp2WrapperPkg/dsc: add HashLib, Tpm2CommandLib and Tpm2DeviceLib 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Qi Zhang <qi1.zhang@intel.com>
Message-Id: <20200818062618.3698-9-qi1.zhang@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-08-26 15:56:11 +00:00
Jiewen Yao
c1a42bb0e2 IntelFsp2Wrapper/dsc: Add FspTpmMeasurementLib and PcdFspMeasurementConfig. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200818062618.3698-7-qi1.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
[lersek@redhat.com: extend (C) notice in DEC to 2020 per Chasel's request]
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-08-26 15:56:11 +00:00
Jiewen Yao
53ea57fea4 IntelFsp2WraperPkg/Fsp{m|s}WrapperPeim: Add FspBin measurement. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200818062618.3698-5-qi1.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-08-26 15:56:11 +00:00
Jiewen Yao
6c02386403 IntelFsp2WrapperPkg/FspMeasurementLib: Add BaseFspMeasurementLib. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200818062618.3698-4-qi1.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-08-26 15:56:11 +00:00
Jiewen Yao
17f65e4063 IntelFsp2WrapperPkg/FspMeasurementLib: Add header file. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2376

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Message-Id: <20200818062618.3698-3-qi1.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2020-08-26 15:56:11 +00:00
Chasel Chiu
1a99203052 IntelFsp2WrapperPkg: Add FSP*_ARCH_UPD. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2781

Provides sample code to include FSPT_ARCH_UPD initial values with
UPD header revision set to 2.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2020-06-23 04:22:49 +00:00
Antoine Coeur
97eedf5dfb IntelFsp2WrapperPkg: Fix various typos 
Fix various typos in comments and documentation.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2019-12-11 01:42:31 +00:00
Ray Ni
7bf5255997 IntelFsp2WrapperPkg: Remove unneeded MdeModulePkg dependency 
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2019-09-05 02:10:03 +08:00
Zhichao Gao
9ed8c3a806 IntelFsp2WrapperPkg/FspWrapperNotifyDxe: make global variable static 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1740

Add a 'static' storage-class specifier to the global variables
that only used in a single file to minimize the name collisions.
This is only for the variable named 'mExitBootServicesEvent'.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
 2019-04-28 10:54:27 +08:00
Chasel Chiu
00e3e48014 IntelFsp2WrapperPkg/FspsWrapperPeim: Fix coding style. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1730

Internal code quality check failed after this commit:
68d47eea42, fixed those
coding style issues.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2019-04-23 10:39:47 +08:00
Chasel, Chiu
68d47eea42 IntelFsp2WrapperPkg: Perform post FSP-S process. 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1716

In API mode FSP wrapper will perform some post
FSP-S process but such process was skipped in Dispatch
mode which may impact some of the boot loaders.
To align behavior between API and Dispatch, an
End-of-Pei callback is introduced to perform same process
in Dispatch mode.

Note: If boot loader implemented its own
      PostFspsHobProcess (), it has to check
      PcdFspModeSelection and support each mode
      properly.

Test: Verified on internal platform and both
      FSP API and Dispatch modes booted successfully.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2019-04-16 12:46:58 +08:00
Michael D Kinney
512e23a333 IntelFsp2WrapperPkg: Replace BSD License with BSD+Patent License 
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2019-04-09 10:58:03 -07:00
Chasel, Chiu
e8f40b770f IntelFsp2WrapperPkg: Fix constant if statements issue 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1351

Internal code quality scanning found 2 constant if
statements related to FixedPcdGet8 () usage.
Since the PCD can be PatchableInModule too, it should be
changed to PcdGet8 () to fix this issue.

Test: Verified on internal platform and booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
 2018-11-26 11:40:38 +08:00
Chasel, Chiu
2098de6279 IntelFsp2WrapperPkg: Fix line ending format issue 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352

Fixed line ending format wrong issues on some files.

Test: Verified building successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
 2018-11-26 11:40:27 +08:00
Chasel, Chiu
115336ccaf IntelFsp2WrapperPkg: Support FSP Dispatch mode 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2018-11-20 12:03:52 +08:00
Chasel, Chiu
de1e1195b3 IntelFsp2WrapperPkg: Revert 90c5bc08 
Commit message issue and reverted commit
90c5bc081d.

Will re-submit with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2018-11-20 11:55:24 +08:00
Chasel, Chiu
90c5bc081d IntelFsp2WrapperPkg: Support FSP Dispatch mode 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
 2018-11-20 11:33:14 +08:00
shenglei
631db6b24d IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: Remove PCDs 
The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2018-09-28 10:55:10 +08:00
shenglei
8a9678c7a4 IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an unused PCD 
The PCD below is unused, so it has been removed from inf.
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2018-09-28 10:55:01 +08:00
Chasel, Chiu
ed5de31189 IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b 
Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2018-09-28 10:50:43 +08:00
Chasel, Chiu
6532fdec11 [PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: 
Remove PCDs

The PCDs below are unused, so they have been removed from inf.
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2018-09-27 15:42:57 +08:00
Chasel, Chiu
70493a8d54 [PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an 
unused PCD

The PCD below is unused, so it has been removed from inf.
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2018-09-27 15:42:57 +08:00
Chasel, Chiu
14a6beac3b IntelFsp2WrapperPkg: Add EFIAPI to AsmExecute32BitCode 
AsmExecute32BitCode is assembly code and needs EFIAPI

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2018-08-22 09:41:25 +08:00
Liming Gao
cae524cdad IntelFsp2WrapperPkg: Clean up source files 
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
 2018-06-28 11:19:44 +08:00
Liming Gao
c45f4c5e75 IntelFsp2WrapperPkg: Update BaseFspWrapperApiLib to pass XCODE5 build 
XCODE5 doesn't support absolute addressing in the assembly code.
This change uses lea instruction to get the address.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2018-01-18 15:39:54 +08:00
Liming Gao
466bab06be IntelFspWrapperPkg: Convert INF file to dos format 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2017-12-28 12:48:03 +08:00
Chasel, Chiu
e69dcef54e IntelFsp2WrapperPkg: Support UPD allocation outside FspWrapper 
UPD allocation and patching can be done outside FspWrapper
as implementation choice so adding a PCD to select between
original FspWrapper allocation model or outside model

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2017-11-29 15:52:25 +08:00