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261 Commits

Author SHA1 Message Date
f40dc199c2 Merge pull request #6 from system76/boot-uefi-only
Skip volumes that do not have an EFI volume
2020-01-27 15:47:07 -07:00
3f54e8f57a Skip volumes that do not have an EFI volume 2020-01-27 15:32:04 -07:00
55849a4a46 IntelFrameworkModulePkg/BdsDxe: Ensure forms have unique IDs 2020-01-24 19:13:51 -07:00
74f2015276 Expand HD paths when checking for invalid options 2020-01-24 19:13:51 -07:00
6dff36c9b2 Add PlatformBdsPreBoot to allow hooks immediately before booting an option 2020-01-24 18:50:48 -07:00
814c0fa862 Load firmware-smmstore driver 2020-01-24 18:50:48 -07:00
a05aa4aff0 Also ignore keysizes of 0 2020-01-24 18:50:48 -07:00
30c84e8277 Update numbering 2020-01-24 18:50:48 -07:00
2ba9869baa Prioritize Udf and ElTorito partition types over Mbr to fix ISO boots 2020-01-24 18:50:48 -07:00
826b9d30cf Add firmware version to front page 2020-01-24 18:50:48 -07:00
b0e7e3919f Add SPACE for recovery message 2020-01-24 18:50:48 -07:00
976842130a Revise key handling in boot phase
Add escape key handler as early as possible, and set timeout immediately
upon displaying splash.
2020-01-24 18:50:48 -07:00
52d5d1b2c5 Improve error output when boot option fails to load 2020-01-24 18:50:48 -07:00
7050fc3a26 Make it possible to delete SMMSTORE variable by appending it with size 0 2020-01-24 18:50:48 -07:00
0eca9e3c1a Replace Front Page with computer name 2020-01-24 18:43:52 -07:00
19304f2144 Edit strings 2020-01-24 18:43:52 -07:00
b062ed0c86 Make Change Boot Order the primary boot maintenance manager page 2020-01-24 18:32:19 -07:00
d9cf95c6a2 Remove cruft from boot options 2020-01-24 18:10:15 -07:00
75a5161506 Ignore DEBUG interrupt (happens on gaze14) 2020-01-24 18:10:09 -07:00
d193b18023 Increase size of buffer for DMI information 2020-01-24 18:10:04 -07:00
061df3962f Update serial port to use 2020-01-24 18:09:54 -07:00
f6e7c15556 Add Intel GOP driver 2020-01-24 18:09:45 -07:00
95fb70f34d Update logo 2020-01-24 18:09:37 -07:00
900debdeec Add System76 Setup menu 2020-01-24 18:09:31 -07:00
33006e4f4e Order NVMe devices first 2020-01-24 18:09:23 -07:00
b8fbf69c16 Frontpage: add entries for some more KBL Chromebooks
Add entries for ATLAS, BARD, EKKO, EVE, NAUTILUS, NOCTURNE,
RAMMUS, SONA, SYNDRA

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-12-01 10:43:24 -06:00
ba13872223 Frontpage: fix max size used for GetDeviceNameFromProduct()
Fixes some device name strings not being copied due to
exceeding max size (but not size of buffer passed in)

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
eb1e7a0284 MdeModulePkg/NvmExpressDxe: Simplify NvmExpress name
Signed-off-by: Jeremy Soller <jeremy@system76.com>
2019-11-25 00:27:53 -06:00
eba6c7c6ce BdsBoot: use better device descriptions
Query boot devices and obtain make/model info if
available. Prefix description with device type
for better identification.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
a5f556c37b GenericBdsLib: add BmBootDescription from UefiBootManagerLib
Copy BmBootDescription from MdeModulePkg/UefiBootManagerLib,
removing appending of serial # since it makes descriptions
unweildy.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
e9023ae655 IntelFrameworkModulePkg: rework Frontpage layout
- center device name; left-justify other info
- remove Language and Device Manager options
- rename 'Continue' to 'Default Boot'

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
cdd43b2533 IntelFrameworkModulePkg: rename/rework Boot Maintenance Manager
With Boot Manager now renamed, rename BMM as well.
Also clean up and simplify menu to eliminate unused/non-
functional items.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
d1a6917813 IntelFrameworkModulePkg: rename Boot Manager to Boot Menu
'Boot Menu' is much more intuitive for users

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-11-25 00:27:53 -06:00
81e096bda1 Boot Maintenance Mrg: add missing 'save changes' option 2019-11-25 00:27:53 -06:00
42f99de779 MdeModulePkg: fix UninstallMultipleProtocolInterfaces() calls
Unlike the InstallMultipleProtocolInterfaces() boot service, which takes
an (EFI_HANDLE*) as first parameter, the
UninstallMultipleProtocolInterfaces() boot service takes an EFI_HANDLE as
first parameter.

These are actual bugs. They must have remained hidden until now because
they are on error paths. Fix the UninstallMultipleProtocolInterfaces()
calls.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2019-11-25 00:27:53 -06:00
a03327088a MdeModulePkg/UsbBusDxe: Return error when the device is not present
Until now, during the USB device enumeration when its PortState
USB_PORT_STAT_CONNECTION bit was not set, the stack was not informed
that the device is not present. Fix that by returning appropriate
error code.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2019-11-25 00:27:53 -06:00
4ba839c5c8 MdeModulePkg/XhciPei: Fix Aligned Page Allocation
Add support for allocating aligned pages at an alignment higher
than 4K. The new function allocated memory taking into account
the padding required and then frees up unused pages before mapping
it.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2019-11-25 00:27:53 -06:00
6bd9d60b41 MdeModulePkg/XhciDxe: Fix Aligned Page Allocation
While allocating pages aligned at an alignment higher than
4K, allocate memory taking into consideration the padding
required for that alignment. The calls to free pages takes
care of this already.

Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2019-11-25 00:27:53 -06:00
964f80253a Revert "UsbMassBoot: treat all USB drives as removable"
This reverts commit de4592d59e16f91b1cf480478572533be6cc5f1b.
2019-11-25 00:27:53 -06:00
47794944e6 IntelFrameworkModulePkg/Universal/BdsDxe: Fix assertion
Fix an assertion that prevented the boot menu to show up when the coreboot
string is very long.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2019-11-22 14:08:20 -06:00
8f008298cc Frontpage: add entry for AMD Chromebooks (grunt)
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-06-23 18:18:19 -05:00
783f22ecc3 Frontpage: add entries for NAMI variants and SORAKA
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-06-23 18:18:19 -05:00
81a93fb3a9 UefiCpuPkg/CpuCommonFeaturesLib: Aesni.c uses BIT0 and BIT1 reversedly
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1621

According to Intel SDM as below, the BIT0 should be treated as
lock bit, and BIT1 should be treated as disable(1)/enable(0) bit.

"11b: AES instructions are not available until next
RESET.
Otherwise, AES instructions are available.
If the configuration is not 01b, AES
instructions can be mis-configured if a privileged agent
unintentionally writes 11b"

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Chandana Kumar <chandana.c.kumar@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2019-06-23 18:18:19 -05:00
30dc65997f AddBGRT: match BGRT with boot logo postition
Don't hard-code the logo size, and use the Microsoft-recommended logo position.

Signed-off-by: James Ye <jye836@gmail.com>
2019-05-13 11:54:26 +10:00
93f8c4a6d5 BdsConsole: use recommended boot logo position
Microsoft user experience specifications recommend the boot logo is drawn 38.2%
from the top of the screen. This is also where operating systems like Fedora
expect the logo to be drawn.

Signed-off-by: James Ye <jye836@gmail.com>
2019-05-13 11:40:56 +10:00
51be9d0425 BdsConsole: fix up boot logo positioning
No reason to hardcode the image size into the
positon calculations. Keep shift to upper 2/3
of screen.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-21 20:21:18 -06:00
31a4e13c19 BmpSupportLib: fix BMP validation
BMP files by tools other than MS paint can have a
variable number of padding bytes, which results in
the DataSize being less than (ImageSize - HeaderSize).
Fix the check to be less stringent.

Test: use BMP created by/saved by Photoshop

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-21 20:19:21 -06:00
9d32ca34d2 MemoryTest: remove unused variable StrTotalMemory
fixes compiler warning->error

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-21 20:19:21 -06:00
0f9b597012 Logo: use slightly larger logo
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
19e12d66fe BdsPlatform: increase timeout to 2s
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
9332332724 MemoryTest: replace test result with boot menu prompt
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
239e19e391 BdsBoot: add boot menu text for eMMC/SD, NVMe devices
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
c8a3cdb675 CorebootModulePkg: remove unused/deprecated SATA driver
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
40147bbf14 CorebootPayloadPkg: switch to MdeModulePkg SATA driver
CorebootModulePkg version is buggy and unmaintained, switching
to MdeModulePkg version fixes channel count / drive detection
issue on some KBL Chromeboxes

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
cf2bde63a1 Revert "MdeModulePkg/SdMmcPciHcDxe: Execute card detect only for RemovableSlot"
This reverts commit 4cd9d7fc6f.

card detect causes hangs on many devices with a directly-attached SD card reader
2019-02-20 17:29:26 -06:00
f6f2ff4904 WIP: hook into emuvariable to sync data with coreboot smm store
changed: buffer size from 64k to 256k

Change-Id: I7f443b9f36612f79787e1b4b1075176a91107686
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
a26aad44d1 Frontpage: add device name for Lars, Cave, Fizz, others
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:26 -06:00
3596140a69 CorebootPayloadPkg: Add SafeIntLib and BmpSupportLib to DSC files
Commit 2460ec2a8f added the new libraries
to DuetPkg to fix building. Do the same for CorebootPayloadPkg.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Alex James <theracermaster@gmail.com>
2019-02-20 17:29:26 -06:00
9b7ce3b9a1 Frontpage: use SMBIOS data directly for non-Google devices
Since board names match the device, just print manufacturer
and device name without translation.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:25 -06:00
147c02d66e Disable Page Table Protection.
Effectively disables the PT protection created by: 2ac1730bf2, 147fd35c3e, and 41b4600c30.

This fixes macOS boot issues.
2019-02-20 17:29:25 -06:00
768fe7365f EmmcDevice: fix detection on some models
From stepan:
"This enables eMMC booting when starting edk2
from depthcharge. Previously the driver would
bail out with an error while setting the eMMC
frequency, because depthcharge has already set
up the controller."

Also fixed detection on google/lars w/Core-i5
with upstream coreboot + Tianocore payload
2019-02-20 17:29:25 -06:00
0f6978e314 CbSupportPei: prevent lower coreboot table from being overwritten
Exclude the bottom 4kb from being included in System Memory HoB

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-20 17:29:25 -06:00
0a8abc3c4d FSDrivers: update drivers from rEFInd 0.11.2 2019-02-20 17:29:25 -06:00
54b26ae48f CorebootPayloadPkg: add NVMe support 2019-02-14 15:44:32 -06:00
9d72e4b922 MdeModulePkg/GraphicsConsole: don't draw cursor at 0,0
Prevents cursor from flashing on screen when
changing modes or clearing the screen.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-14 15:44:32 -06:00
7f094cdf45 Frontpage: gut unnecessary mode changes
minimize flicker between splash screen and BGRT
2019-02-14 15:44:32 -06:00
b0f8ea3c9c BdsPlatform: cleanup and use coreboot logo
- remove 'start boot option' text
- use boot logo splash for 1s, align to BGRT
- rework frontpage usage
2019-02-14 15:44:20 -06:00
731869826b MemoryTest: Remove upper left display, status bar
Since the memory test is essentially instantanous,
remove unnecessry duplication of memory count and
static status bar for cleaner display with coreboot logo
2019-02-14 15:41:27 -06:00
a49a99ef5e Use coreboot logo for CorebootPayloadPkg 2019-02-14 15:41:27 -06:00
d06545cd3d IntelFrameworkModulePkg: add BGRT table
Add support for adding a BGRT table for Windows 8/8.1/10 bootlogo.
2019-02-14 15:41:27 -06:00
575764deeb UsbMassBoot: treat all USB drives as removable 2019-02-14 15:41:27 -06:00
ed1cf61e3e Frontpage: Use a larger SimpleText console mode 2019-02-14 15:41:27 -06:00
091f5d689f CorebootPayloadPkg: Add DataHubDxe for OS X 2019-02-14 15:41:27 -06:00
d944c24078 Frontpage: remove leading spaces from CPU string 2019-02-14 15:41:27 -06:00
bdd22050f6 Frontpage: get SMBIOS Data from table directly
rather than getting it from the EFI SMBIOS protocol
2019-02-14 15:41:27 -06:00
0286bfae44 Frontpage: add device names, FW info to setup screen
Signed-off-by: Matt Devo <matt.devillier@gmail.com>
2019-02-14 15:41:27 -06:00
735fae0452 CorebootPayloadPkg: Use additional FS Drivers 2019-02-14 15:41:27 -06:00
8de2a8523d Add NTFS/ext4 filesystem drivers 2019-02-14 15:41:27 -06:00
e4fc0fbacb CorebootPayloadPkg: Remove OHCI and UHCI drivers 2019-02-14 15:41:26 -06:00
fceee0d621 CorebootPayloadPkg: Add PS/2 keyboard drivers. 2019-02-14 15:41:26 -06:00
d67d692ee2 CorebootModulePkg: Don't mask off legacy 8259 sources.
With the legacy sources masked, closing laptop lid results
in hard shutdown vs graceful transition to S3/suspend
(per coolstar)
2019-02-14 15:41:26 -06:00
927fc0e4b5 CorebootBdsLib: Call End of DXE event to allow booting 3rd party efi binaries. 2019-02-14 15:41:26 -06:00
04515ff368 CorebootPayloadPkg: Use BDS stage from DUET 2019-02-14 15:41:26 -06:00
439e7d2556 Frontpage: Set/Use native display resolution
set the mSetupH/V resolution based on GraphicsOutput mode,
not SimpleTextOut mode
2019-02-14 15:41:26 -06:00
0554ac9dd0 MdeModulePkg/GraphicsConsole: Don't re-set video output mode
Fixes display resolution issues with booting OS X
2019-02-14 15:41:26 -06:00
0a679652e8 PCI: copy/use Duet's PciNoEnumeration
Tianocore's PCI enumeration goes into an infinite loop, and
isn't necessary since coreboot has already handled it.
Copy and use DuetPkg's PciNoEnumeration package (which has
since been removed).

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
2019-02-14 15:34:48 -06:00
559a07d84e ArmPkg/ArmScmiDxe: Add clock enable function
Add function to allow enabling and disabling of the clock using the SCMI
interface. Add gArmScmiClock2ProtocolGuid to distinguish platforms that
support new API from those that just have the older protocol.

SCMI_CLOCK2_PROTOCOL also adds a version parameter to allow for future
changes. It is placed after the functions that are present in the
existing protocol to allow SCMI_CLOCK2_PROTOCOL to be cast to
SCMI_CLOCK_PROTOCOL so that only a single implementation of those
function are needed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-21 18:30:46 +01:00
9bba10eb43 Maintainers.txt: Change DynamicTablesPkg maintainer
Removing Evan and adding Alexei as the co-maintainer.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <alexei.fedorov@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2018-12-21 17:26:36 +00:00
a18f784cfd Upgrade OpenSSL to 1.1.0j
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1393

BZ#1089 (https://bugzilla.tianocore.org/show_bug.cgi?id=1089) requests
to upgrade the OpenSSL to the latest 1.1.1 release. Since OpenSSL-1.1.1
has many changes, more porting efforts and feature evaluation are needed.
This might lead to a situation that it cannot catch the Q1'19 stable tag.

One of the solution is upgrade current version (1.1.0h) to 1.1.0j.
According to following web page in openssl.org, all security issues
solved in 1.1.1 have been also back-ported to 1.1.0.j. This can make
sure that no security vulnerabilities left in edk2 master before 1.1.1.

https://www.openssl.org/news/vulnerabilities-1.1.1.html

Cc: Ting Ye <ting.ye@intel.com>
Cc: Gang Wei <gang.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Gang Wei <gang.wei@intel.com>
Reviewed-by: Ting Ye <ting.ye@intel.com>
2018-12-21 10:07:42 +08:00
7c4207e955 UefiCpuPkg/CpuExceptionHandlerLib: Fix spelling issue
*Excpetion* should be *Exception*

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
CC: Eric Dong <eric.dong@intel.com>
CC: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2018-12-21 09:51:18 +08:00
5a9b3eb8e5 ArmPlatformPkg/PL011SerialPortLib: use untyped PCD for register base
Use an untyped PCD reference for PcdSerialRegisterBase, so that the
library gets built without hardcoded values, permitting modules to
override the default serial port. This allows SerialDxe to use a
different serial port from the one used for DEBUG output (which
often gets occluded due to the console driver clearing the screen).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 18:34:08 +01:00
6f42f9a54b Readme.md: Add edk2 release tag and edk2 release plan
https://bugzilla.tianocore.org/show_bug.cgi?id=1364

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-12-20 23:31:47 +08:00
ba808d11f6 ArmPkg/GenericWatchdogDxe: implement RegisterHandler() method
Even though UEFI does not appear to use it, let's implement the
complete PI watchdog protocol, including handler registration,
which will be invoked before the ResetSystem() runtime service
when the watchdog timer expires.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 12:41:21 +01:00
d3b05936d9 ArmPkg/GenericWatchdogDxe: clean up the code
Clean up the code, by adding missing STATIC modifiers, drop
redundant casts, and get rid of the 'success handling' anti
pattern in the entry point code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 12:41:21 +01:00
5afabd5ec3 ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt mode
The SP805 watchdog driver doesn't implement the PI watchdog protocol
fully, but always simply resets the system if the watchdog time runs
out.

However, the hardware does support the intended usage model, as long
as the SP805 is wired up correctly. So let's implement interrupt based
mode involving a handler that is registered by the DXE core and invoked
when the watchdog runs out. In the interrupt handler, we invoke the
notify function if one was registered, before calling the ResetSystem()
runtime service (as per the UEFI spec)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 12:41:21 +01:00
e3fa3d83e7 ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanup
Before fixing the SP805 driver, let's clean it up a bit. No
functional changes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 12:41:21 +01:00
87b920fe22 MdePkg/Arm/ProcessorBind.h: fix copy/paste error
Instead of #defining MAX_ALLOC_ADDRESS to MAX_ADDRESS as intended,
it is #defined to itself, causing all ARM builds to break.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 12:29:57 +01:00
4a1500db2b ArmVirtPkg/MemoryInitPeiLib: split memory HOB based on MAX_ALLOC_ADDRESS
The current ArmVirtMemoryInitPeiLib code splits the memory region passed
via PcdSystemMemoryBase/PcdSystemMemorySize in two if the region extends
beyond the MAX_ADDRESS limit. This was introduced for 32-bit ARM, which
may support more than 4 GB of physical address space, but cannot address
all of it via a 1:1 mapping, and a single region that is not mappable
in its entirety is unusable by the PEI core.

AArch64 is in a similar situation now: platforms may support more than
256 TB of physical address space, but only 256 TB is addressable by the
CPU, and so a memory region that extends from below this limit to above
it should be split.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-20 11:02:40 +01:00
6bd42402f7 ArmPlatformPkg/MemoryInitPeim: take MAX_ALLOC_ADDRESS into account
Limit the PEI memory region so it will not extend beyond what we can
address architecturally when running with 4 KB pages.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 11:02:30 +01:00
1c36f028fa ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS into account
When creating the page tables for the 1:1 mapping, ensure that we don't
attempt to map more than what is architecturally permitted when running
with 4 KB pages, which is 48 bits of VA. This will be reflected in the
value of MAX_ALLOC_ADDRESS once we override it for AArch64, so use that
macro instead of MAX_ADDRESS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-20 11:02:07 +01:00
76be882cdc MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into account
Take MAX_ALLOC_ADDRESS into account in the implementation of the
page allocation routines, so that they will only return memory
that is addressable by the CPU at boot time, even if more memory
is available in the GCD memory map.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2018-12-20 11:01:58 +01:00
36b0754712 MdeModulePkg/Dxe/Gcd: disregard memory above MAX_ALLOC_ADDRESS
Update the GCD memory map initialization code so it disregards
memory that is not addressable by the CPU at boot time. This
only affects the first memory descriptor that is added, other
memory descriptors are permitted that describe memory ranges
that may be accessible to the CPU itself only when executing
under the OS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2018-12-20 11:01:49 +01:00
67b8f806d2 MdePkg/Base: introduce MAX_ALLOC_ADDRESS
On some architectures, the maximum representable address deviates from
the virtual address range that is accessible by the firmware at boot
time. For instance, on AArch64, UEFI mandates a 4 KB page size, which
limits the address space to 48 bits, while more than that may be
populated on a particular platform, for use by the OS.

So introduce a new macro MAX_ALLOC_ADDRESS, which represent the maximum
address the firmware should take into account when allocating memory
ranges that need to be accessible by the CPU at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-20 11:01:38 +01:00
5c8bc8be9e ArmPkg/DefaultExceptionHandlerLib ARM: avoid endless loop in RELEASE builds
Ensure that we prevent the CPU from proceeding after having taken an
unhandled exception on a RELEASE build, which does not contain the
ASSERT() which ensures this on DEBUG and NOOPT builds.

Retain the code following the deadloop so that we can keep going when
running in a debugger.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-19 21:03:08 +01:00
d05d5f6c85 BaseTools/tools_def ARM: emit PIC veneers
The ARM linker may emit veneers, i.e., trampolines, when ordinary
direct relative branches cannot be used, e.g., for Thumb interworking
or branch targets that are out of range.

Usually, such veneers carry an absolute reference to the branch
target, which is problematic for us, since these absolute references
are not covered by annotations that are visible to GenFw in the
PE/COFF conversion, and so these absolute references are not fixed
up by the PE/COFF loader at runtime.

So switch to all ARM GNU ld toolchains to position independent veneers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-19 18:33:05 +01:00
3bdc111178 EmbeddedPkg: remove GdbDebugAgent library
The GdbDebugAgent library is unused and unmaintained, and now it
turns out it doesn't build with Clang, so let's just get rid of it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-19 16:29:29 +01:00
5f0b035f10 ArmPkg: drop ArmBds remnant Pcds from .dec
The following Pcds
- gArmTokenSpaceGuid.PcdArmLinuxSpinTable
- gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset
- gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset
- gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment
remained defined, without actual users.
So get rid of them.

One reference to be deleted separately from edk2-platforms.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-19 11:50:11 +00:00
370544d116 BaseTools: Fix GenFds error doesn't break build.
Fix a bug because of b3497bad12.
Before the patch, when GenFds fail, the build continue and return success.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Derek Lin <derek.lin2@hpe.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-19 13:24:18 +08:00
458539fb75 Vlv2TbltDevicePkg: Remove PcdPeiCoreMaxXXX PCDs' statement
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

The codes have been updated to not use PcdPeiCoreMaxFvSupported,
PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported, so their
statement in platform DSC could be removed.

Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zailiang Sun <zailiang.sun@intel.com>
Reviewed-by: Yi Qian <yi.qian@intel.com>
2018-12-19 12:34:19 +08:00
b7652b7667 OvmfPkg: Remove PcdPeiCoreMaxXXX PCDs' statement
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

The codes have been updated to not use PcdPeiCoreMaxFvSupported,
PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported, so their
statement in platform DSC could be removed.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien.grall@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-19 12:33:32 +08:00
f2bc359ced MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPpiSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

Background as below.

Problem:
As static configuration from the PCDs, the binary PeiCore (for example
in FSP binary with dispatch mode) could not predict how many FVs,
Files or PPIs for different platforms.

Burden:
Platform developers need configure the PCDs accordingly for different
platforms.

To solve the problem and remove the burden, we can update code to
remove the using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv
and PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV,
File and PPI management.

This patch removes the using of PcdPeiCoreMaxPpiSupported in PeiCore.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2018-12-19 12:33:30 +08:00
111e6c920d MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxFvSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

Background as below.

Problem:
As static configuration from the PCDs, the binary PeiCore (for example
in FSP binary with dispatch mode) could not predict how many FVs,
Files or PPIs for different platforms.

Burden:
Platform developers need configure the PCDs accordingly for different
platforms.

To solve the problem and remove the burden, we can update PeiCore to
remove the using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv
and PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV,
File and PPI management.

This patch removes the using of PcdPeiCoreMaxFvSupported in PeiCore.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2018-12-19 12:33:29 +08:00
aa8c6e2ad3 SecurityPkg Tcg(2)Pei: Remove the using of PcdPeiCoreMaxFvSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

Background as below.

Problem:
As static configuration from the PCDs, the binary PeiCore (for example
in FSP binary with dispatch mode) could not predict how many FVs,
Files or PPIs for different platforms.

Burden:
Platform developers need configure the PCDs accordingly for different
platforms.

To solve the problem and remove the burden, we can update PeiCore to
remove the using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv
and PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV,
File and PPI management.

This patch removes the using of PcdPeiCoreMaxFvSupported in Tcg(2)Pei.

Cc: Chao Zhang <chao.b.zhang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
2018-12-19 12:33:28 +08:00
b62fe5708b MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPeimPerFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405

Background as below.

Problem:
As static configuration from the PCDs, the binary PeiCore (for example
in FSP binary with dispatch mode) could not predict how many FVs,
Files or PPIs for different platforms.

Burden:
Platform developers need configure the PCDs accordingly for different
platforms.

To solve the problem and remove the burden, we can update code to
remove the using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv
and PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV,
File and PPI management.

This patch removes the using of PcdPeiCoreMaxPeimPerFv in PeiCore.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2018-12-19 12:33:27 +08:00
073a76e662 BaseTools: Add $(INC)-like support when compiling .nasm files
current edk2\BaseTools\Conf\build_rule.template, the compile of nasm
source files does not have the $(INC) support.

The '-I' option only includes the directory of the nasm source file
(${s_path}(+)). Hence, it will be impossible for nasm files to include
files outside of the nasm source file directory.

As a comparison, the compile of both .s and .asm have $(INC) support
in their compile commands.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=1085
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-19 08:42:14 +08:00
7c3a1efd15 BaseTools: Update nasm file build rule to support $(INC)
https://bugzilla.tianocore.org/show_bug.cgi?id=1085
Update the build rule to:
"$(NASM)" -I${s_path}(+) $(NASM_INC) $(NASM_FLAGS)
-o $dst ${d_path}(+)${s_base}.iii

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-18 14:07:40 +08:00
b4c012d873 ShellPkg/UefiShellDebug1CommandsLib: Remove the unused function CharToUpper
CharToUpper is an unused function, so it will be removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1399

v2:Update the title.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-18 11:38:51 +08:00
643556fc48 BaseTools: Fixed metafile parser issues
https://bugzilla.tianocore.org/show_bug.cgi?id=1406
This patch is going to fix the regressions that
is introduced by commit 2f818ed0fb

The internal array for storing the metadata info should be cached
so that the meta file is parsed only once in one build.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-18 10:45:31 +08:00
4c6e6f9f75 BaseTools: Fix PcdArray issue
https://bugzilla.tianocore.org/show_bug.cgi?id=1390

1. support hex number for array index
2. support Non-Dynamic Pcd for array data type
3. support {} and {CODE()} for array data type
4. Change GetStructurePcdMaxSize to be a static function since it need to
be called in another static function. And this function does not depend on
it's class instance.
5. Add unittest for RemoveCComments function and
ArrayIndex regular expression.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Philippe Mathieu-Daud? <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-18 10:15:50 +08:00
778c764050 ArmVirtPkg: Remove redundant library instances in ArmVirtQemuKernel.dsc
Commit 9a67ba261f ("ArmVirtPkg: Replace obsoleted network drivers
from platform DSC/FDF") incorrectly added the BaseCryptLib, OpensslLib
and IntrinsicLib to "ArmVirtPkg/ArmVirtQemuKernel.dsc", it's redundant
and the library instances from "ArmVirt.dsc.inc" is already sufficient.

This patch also adjust the order of network drivers in "ArmVirtPkg/
ArmVirtQemuFvMain.fdf.inc" to make it same as the DSC file.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Julien Grall <julien.grall@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-18 08:30:09 +08:00
736c436e53 MdeModulePkg/PciBus: Fix system hang when no PCI Option ROM exists
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1394

When there is no PCI option ROM exists, today's logic still creates
virtual BAR for option ROM using Length = 0, Alignment = (-1).
It causes the final MEM32 alignment requirement is as big as
0xFFFFFFFF_FFFFFFFF.

The patch fixes this issue by only creating virtual BAR for option
ROM when there is PCI option ROM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-12-17 09:38:02 +08:00
c8c3c53669 MdeModulePkg/NonDiscoverablePciDeviceDxe: add missing validation
UEFI SCT crashed and failed in NonDiscoverablePciDeviceDxe becase
required checks were not performed. Perform parameters validation in
NonDiscoverablePciDeviceDxe.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel at linaro.org>
2018-12-17 08:56:20 +08:00
0a538ddab4 ArmPkg: remove redundant _ARM_PLATFORM_FLAGS overrides
Our default is already armv7-a, so no need to rewrite the PLATFORM_FLAGS
for that. Also, setting -mfpu=neon is not entirely inappropriate, since
NEON is not mandatory under v7.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-15 19:15:16 +01:00
48e890457b BaseTools: Fixed the build fail issue for cases
https://bugzilla.tianocore.org/show_bug.cgi?id=1386
This patch is going to fix the regression issue that is
introduced by commit 72a1d77694

The issue will happen in the following cases:
1. There is no Pcd value assignment in Dsc file
2. There are duplicate Pcd filed assignment

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-15 20:16:46 +08:00
9bf86b12ce BaseTools: Fixed bugs in CopyDict function
https://bugzilla.tianocore.org/show_bug.cgi?id=1387

This patch is going to fix the regression issue which is
introduced by commit bf9e636605.

This patch Remove the CopyDict incorrect usage for non-dict
input data. Add a check for CopyDict input.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-15 20:13:32 +08:00
5695877ec8 BaseTools: Fix PcdNvStoreDefaultValueBuffer Value.
https://bugzilla.tianocore.org/show_bug.cgi?id=1385
This patch is going to fix the regression issue that is
introduced by commit e6eae3b4c7
and commit 0b6c5954e1.

PcdNvStoreDefaultValueBuffer value is update to Vpd Info File,
but it is not update into a internal cache. This patch will
fix this incorrect value in that internal cache.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-15 15:45:07 +08:00
a9ff32909b ArmVirtPkg/ArmVirt.dsc.inc: define TcpIoLib resolution unconditionally
Commit 9a67ba261f ("ArmVirtPkg: Replace obsoleted network drivers
from platform DSC/FDF") failed to take into account that the now
unconditionally included IScsiDxe.inf from NetworkPkg requires a
resolution for TcpIoLib. Since specifying such a resolution is harmless
for platforms that have no networking enabled, let's just fix things
by dropping the conditionals around it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-14 15:01:18 +01:00
9a67ba261f ArmVirtPkg: Replace obsoleted network drivers from platform DSC/FDF.
This patch replaces the MdeModulePkg TCP, PXE and iSCSI driver with those
ones in NetworkPkg. These 3 drivers in MdeModulePkg are not being actively
maintained and will be removed from edk2 master soon.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Julien Grall <julien.grall@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-14 15:30:25 +08:00
36deafb838 ArmVirtPkg/PrePi ARM CLANG35: drop incompatible command line option
Drop the -mno-movt command line option override, which is no longer
needed, and actually incompatible with versions of Clang before 3.6.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-13 12:48:14 +01:00
b048a2204d BaseTools/tools_def ARM CLANG35: work around -mno-movt option name change
PE/COFF only has a very limited id space for runtime relocations, and
so it defines only a single relocation for movw/movt instruction pairs,
which can be combined to load a 32-bit symbol reference into a register.
For this to work as expected, these instructions must always appear in
the same order and adjacently, and this is something few compilers take
into account, unless they target PE/COFF explicitly (and this is not the
case for our ELF based toolchains)

For Clang 3.6 and later, we can pass the -mno-movt option to suppress
movw/movt pairs entirely, which works around the issue. Unfortunately,
for Clang 3.5, the option is called differently (-mllvm -arm-use-movt=0)
and mutually incompatible between 3.5 and 3.6.

Since it is desirable for the CLANG35 toolchain to be usable on newer
versions of Clang as well (given that it is the only non-LTO alternative
to CLANG38), let's work around this issue in a way that permits versions
3.5 and newer of Clang to be used with the CLANG35 profile.

So pass the -mkernel flag instead (and add -Qunused-argument so Clang
does not complain about the -mno-unaligned-access in ARM_CC_XIPFLAGS).
This also inhibits movw/movt generation, along with some other changes
(e.g., long calls) which do affect code generation but not in an
undesirable manner.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-13 12:46:31 +01:00
decaac5d0d MdePkg/BaseMemoryLibOptDxe ARM: add missing function annotations
ARM uses the low order bit of a branch target address to decide in
which execution mode (ARM or Thumb) a function needs to be called.
In order for this to work across object files, ELF function symbols
will have the low bit set if they were emitted in Thumb mode and
cleared otherwise. This annotation is only emitted if the ELF symbols
are annotated as function, since taking the address of some data
symbol (e.g., a literal) should not produce a value with the low bit
set, even if it appears in an object file containing Thumb code.

This means that all functions coded in assembler must have this
function annotation, or they may end up getting called in the
wrong mode, crashing the program.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-13 12:45:49 +01:00
580f4539df Maintainers.txt: Change package maintainer and reviewer of CryptoPkg.
Cc: Gang Wei <gang.wei@intel.com>
Cc: Jian Wang <jian.j.wang@intel.com>

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ting Ye <ting.ye@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Gang Wei <gang.wei@intel.com>
2018-12-13 16:21:41 +08:00
0d68ce514b BaseTools/GenFw ARM: don't permit R_ARM_GOT_PREL relocations
We currently permit R_ARM_GOT_PREL relocations in the ELF32 conversion
routines, under the assumption that relative relocations are fine as
long as the section layout is the same between ELF and PE/COFF.

However, as is the case with any proxy generating relocation, it is
up to the linker to emit an entry in the GOT table and populate it
with the correct absolute address, which should also be fixed up at
PE/COFF load time. Unfortunately, the relocations covering the GOT
section are not emitted into the static relocation sections processed
by GenFw, but only in the dynamic relocation section as a R_ARM_RELATIVE
relocation, and so GenFw fails to emit the correct PE/COFF relocation
data for GOT entries.

Since GOT indirection is pointless anyway for PE/COFF modules running
in UEFI context, let's just drop the references to R_ARM_GOT_PREL from
GenFw, resulting in a build time failure rather than a runtime failure
if such relocations do occur.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-12 08:36:59 +01:00
e07092edca ArmVirtPkg/PrePiUniCoreRelocatable CLANG38: work around build issues
The self-relocating PrePi module that is used by the ArmVirtQemuKernel
and ArmVirtXen targets runs the linker in PIE mode so that it emits
dynamic relocations into the final image in a way that permits the
module to relocate itself into place before calling into the C code.

When building these targets using the CLANG38 toolchain, we switch
from the BFD to the GOLD linker, which behaves a bit differently when
building PIE executables, and insists on emitting GOT indirected symbol
references throughout, which means a) that we end up with absolute
addresses (which need to be fixed up at load time) for no good reason,
and b) we have to add support for handling GOT entries to GenFw if we
want to convert them into PE/COFF.

So instead, let's emit a shared library. Since the ELF image only serves
as the input to GenFw, this does not lead to any loss of functionality,
although it does require the -Bsymbolic linker option to be added to
ensure that no symbol based dynamic relocations are emitted (which
would, e.g., permit lazy binding for shared libraries). So for all
other toolchains, the linker option changes are a no-op.

Then, we have to convince CLANG38/GOLD that there is no need to refer
to symbols via a GOT entry. This is done by forcing hidden visibility
for all symbols in all components that make up the PrePi SEC module:
this informs the linker that a symbol is never exported or preempted,
making it safe to refer to it directly from anywhere in the code,
rather than indirectly via a GOT entry.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2018-12-11 17:49:23 +01:00
ded3c57623 ArmVirtPkg/ArmVirtQemuKernel ARM: make some PCD settings apply to ARM
Move some PCD settings outs of the [PcdsFixedAtBuild.AARCH64] block,
so that they apply to 32-bit ARM as well. Without this change, the
ARM build doesn't work.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-11 17:48:09 +01:00
de3c440e8a BaseTools/tools_def AARCH64 RELEASE: move GCC49/GGC5 to 4 KB alignment
Since 4 KB section alignment is required when mapping PE/COFF images
with strict permissions, update the default section alignment when
using GCC49 and GCC5 in RELEASE mode. Note that XIP modules such as
SEC, PEIMs or PEI core are not affected by this change, since the
override to 32 byte aligment remains in effect.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-11 14:51:18 +01:00
765fb87c2b MdeModulePkg/FileExplorerLib: avoid packed struct for program data
Struct packing is only necessary for data structures whose in-memory
representation is covered by the PI or UEFI specs, and may deviate
from the ordinary C rules for alignment.

So in case of FileExplorerLib, this applies to the device path struct
only, and other structures used to carry program data should not be
packed, or we may end up with alignment faults on architectures such
as ARM, which don't permit load/store double or multiple instructions
to access memory locations that are not 32-bit aligned.

E.g., the following call in FileExplorerLibConstructor()

  InitializeListHead (&gFileExplorerPrivate.FsOptionMenu->Head);

which is emitted as follows for 32-bit ARM/Thumb2 by Clang-5.0

    3de0:       b510            push    {r4, lr}
    3de2:       4604            mov     r4, r0
    ...
    3de8:       e9c4 4400       strd    r4, r4, [r4]
    3dec:       bd10            pop     {r4, pc}

will perform a double-word store on the first argument, passed in
register r0, assuming that the pointer type of the argument is
enough to guarantee that the value is suitably aligned.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-12-11 13:14:28 +01:00
f0574a194c ArmPkg/OpteeLib: Add OPTEE_SUCCESS return code
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-11 09:04:10 +01:00
f4c8c1bbf1 SecurityPkg: Remove dead code and inf redundant definitions.
Fix BZ1065, https://bugzilla.tianocore.org/show_bug.cgi?id=1065.
Remove dead code and inf redundant definitions from SecurityPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Cc: Zhang Chao B <chao.b.zhang@intel.com>
Reviewed-by: Zhang Chao B <chao.b.zhang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
2018-12-10 15:56:32 +08:00
56fbaecb15 UefiCpuPkg/Cpuid: Add code to support new definition.
Add code to support new definitions added in SDM 2018'11 version.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2018-12-10 15:33:50 +08:00
ee27f6eef3 UefiCpuPkg/Cpuid.h: Sync CPUID definition to latest SDM.
Update CPUID definition to follow SDM 2018'11 version, changes Include:
1. Add new fields to the existed data structure, impact CPUIDs include:
  1. CPUID_THERMAL_POWER_MANAGEMENT                                 0x06
       CPUID_THERMAL_POWER_MANAGEMENT_EAX
  2. CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS                        0x07
       CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX
       CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX
  3. CPUID_ARCHITECTURAL_PERFORMANCE_MONITORING  0x0A
       CPUID_ARCHITECTURAL_PERFORMANCE_MONITORING_EDX
  4. CPUID_EXTENDED_STATE                                           0x0D
       CPUID_EXTENDED_STATE_MAIN_LEAF_EAX
       CPUID_EXTENDED_STATE_SUB_LEAF_ECX
  5. CPUID_INTEL_RDT_ALLOCATION                                     0x10
       CPUID_INTEL_RDT_ALLOCATION_ENUMERATION_SUB_LEAF_EBX
  6. CPUID_INTEL_SGX                                                0x12
       CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX

2. Add new data structures which not existed before, impact CPUID includes:
  1. CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS                        0x07
       CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EDX

3. Remove fields which defined before, impact CPUID includes:
  1. CPUID_INTEL_RDT_ALLOCATION                                     0x10
       CPUID_INTEL_RDT_ALLOCATION_L3_CACHE_SUB_LEAF                 0x01
         CPUID_INTEL_RDT_ALLOCATION_L3_CACHE_SUB_LEAF_ECX

4. Add new sub leaf which not existed before, impact CPUID includes:
  1. CPUID_INTEL_RDT_ALLOCATION                                     0x10
       CPUID_INTEL_RDT_ALLOCATION_MEMORY_BANDWIDTH_SUB_LEAF         0x03

5. Add new CPUIDs which not exist before, new CPUIDs include:
  1. CPUID_DETERMINISTIC_ADDRESS_TRANSLATION_PARAMETERS             0x18
  2. CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION                         0x1F

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2018-12-10 15:32:14 +08:00
366a7672cf CryptoPkg/IntrinsicLib: add missing BaseLib declaration
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=596

BaseLib interfaces are used in this library but not declared in module's
inf file. This patch fix this situation to keep inf and its code in
consistency. No functionality or interface change are involved.

Cc: Qin Long <qin.long@intel.com>
Cc: Ting Ye <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
2018-12-10 11:02:47 +08:00
0176af142e MdeModulePkg/PciBus: Shadow option ROM after BARs are programmed
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1376

Today's implementation reuses the 32bit MMIO resource requested by
all PCI devices MMIO BARs when shadowing the option ROM.
Take a simple example, a system has only one PCI device. It requires
8MB 32bit MMIO and contains a 4MB option ROM. Today's implementation
only requests 8MB (max of 4M and 8M) 32bit MMIO from
PciHostBridgeResourceAllocation protocol. Let's assume the MMIO range
[3GB, 3GB+8MB) is allocated. The 3GB base address is firstly
programmed to the option ROM BAR for option ROM shadow. Then the
option ROM decoding is turned off and 3GB base address is programmed
to the 32bit MMIO BAR.

It doesn't cause issues when the device doesn't request too much
MMIO.
But when the device contains a 64bit MMIO BAR which requests 4GB MMIO
and a 4MB option ROM. Let's assume [3GB, 3GB+8MB) 32bit MMIO range is
allocated for the option ROM. When the option ROM is being shadowed,
64bit MMIO BAR is programmed to value 0, which means [0, 4GB) MMIO is
given to the 64bit BAR.
The range overlaps with the option ROM range which may cause the
device malfunction (e.g.: option ROM cannot be read out) when the
device has two separate decoders: one for MMIO BAR, the other for
option ROM.

The patch requests dedicated MEM32 resource for Option ROMs and
moves the Option ROM shadow logic after all MMIO BARs are programmed.
The MMIO BAR setting to 0 when shadowing Option ROM is also skipped
because the MMIO BAR already contains the correct value.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-12-10 10:30:13 +08:00
f7f94ffe88 StandaloneMM: Update permissions for Standalone MM drivers memory area
The StandaloneMM image executes in S-EL0 on reference Arm platforms
and is deployed by the trusted firmware as BL32 image. Memory for the
Standalone MM drivers is marked as RW+XN initially, allowing the
drivers to be loaded into the memory. Once loaded, the memory
attributes need to be changed to RO+XN for rodata sections and RO+X
for code sections.

Achieve this through the extra action 'UpdatePeCoffPermissions' to
request the privileged firmware in EL3 to update the permissions.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:53 +00:00
34b1d7eafe StandaloneMM: Include the newly added library class for MMU functions
The MMU functions needed for StandaloneMM image are now exported
through a separate library class. Make the corresponding change in the
core's entry point inf file so that it references the correct library
class for modifying the MMU attributes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:47 +00:00
0d1fb6cc8a StandaloneMmPkg: Update dependency on PeCoffExtraActionLib
Replace DebugPeCoffExtraActionLib with StandaloneMmExtraActionLib

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:42 +00:00
16583ecc12 StandaloneMmPkg: Replace dependency on ArmMmuLib
Use StandaloneMmMmuLib instead of ArmMmuLib in StandaloneMmPkg for AArch64

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:37 +00:00
d495142506 StandaloneMmPkg: Zero data structure explicitly
Introduction of the -mstrict-align flag results in GCC attempting
to use memset to zero out the InitMmFoundationSvcArgs structure.
In the absence of this C library function, this patch explicitly
zeroes this data structure prior to use.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:27 +00:00
f8943176f0 StandaloneMmPkg: Enforce alignment check for AArch64
On AArch64, Standalone MM during the SEC phase runs in S-EL0 with
SCTLR_EL1.A=1. This patch adds the -mstrict-align compiler flag to
ensure that the generated code is compliant with the runtime
alignment checks.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:01:04 +00:00
4ceb9c01f9 StandaloneMmPkg: Add missing dependency on PL011UartClockLib
This patch fixes the dependency PL011UartLib has on PL011UartClockLib by
including its implementation path in the StandaloneMm DSC file.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Achin Gupta <achin.gupta@arm.com>
2018-12-09 16:00:37 +00:00
a5274cdc87 Revert "MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits"
This reverts commit 82379bf660.

On AArch64, we can only use 48 address bits while running in UEFI,
while the GCD and UEFI memory maps may describe up to 52 bits of
physical address space. For this reason, MAX_ADDRESS was reduced
to 48 bits, to ensure that the firmware does not inadvertently
attempt to allocate memory that we cannot access.

However, MAX_ADDRESS is used in runtime drivers as well, and
runtime drivers may deal with kernel virtual addresses, which have
bits [63:48] set. In fact, the OS may be running with 64 KB pages
and pass addresses into the runtime services that use up to 52
bits of address space, either with the top bits set or cleared,
even if the physical address space does not extend beyond 48 bits.

In summary, changing MAX_ADDRESS is a mistake, and needs to be
reverted.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-07 12:24:19 +01:00
9601046bf4 BaseTools: Correct CCFLAG for PcdValueInit
https://bugzilla.tianocore.org/show_bug.cgi?id=1361
This patch is going to correct the CCFlag
for building PcdValueInit

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: BobCF <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-07 10:39:52 +08:00
bf9e636605 BaseTools: Customize deepcopy function.
https://bugzilla.tianocore.org/show_bug.cgi?id=1288

This patch is one of build tool performance improvement
series patches.

This patch is going to customize the deepcopy function for
SkuClass, PcdClassObject and python dictionary.

python deepcopy copy everything of a object, but for our current
usage we just need to copy the data we care about recursively.

By implementing __deepcopy__ for SkuClass, PcdClassObject, we can customize
deepcopy function for them.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: BobCF <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-07 10:31:04 +08:00
4e37570739 BaseTools: Optimize string concatenation
https://bugzilla.tianocore.org/show_bug.cgi?id=1288

This patch is one of build tool performance improvement
series patches.

This patch is going to use join function instead of
string += string2 statement.

Current code use string += string2 in a loop to combine
a string. while creating a string list in a loop and using
"".join(stringlist) after the loop will be much faster.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: BobCF <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
2018-12-07 10:30:21 +08:00
2f818ed0fb BaseTools: Replace the sqlite database with list
https://bugzilla.tianocore.org/show_bug.cgi?id=1288

[V2]
Optimize this patch so that it can be easy to review.
This patch is just apply the change to original files while
not create new similar files.

[V1]
This patch is one of build tool performance improvement
series patches.

This patch is going to use python list to store the parser data
instead of using sqlite database.

The replacement solution is as below:

SQL insert: list.append()
SQL select: list comprehension. for example:
Select * from table where field = “something”
->
[ item for item in table if item[3] == “something”]

SQL update: python map function. for example:
Update table set field1=newvalue where filed2 = “something”.
-> map(lambda x: x[1] = newvalue,
   [item for item in table if item[2] == “something”])

SQL delete: list comprehension.

With this change, We can save the time of interpreting SQL statement
and the time of write database to file system

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: BobCF <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
2018-12-07 10:23:07 +08:00
b3497bad12 BaseTools: AutoGen and GenFds share the parser data.
V2:
Extract the common part of new API and the original main() function
into one function.

V1:
https://bugzilla.tianocore.org/show_bug.cgi?id=1288

Currently, AutoGen and GenFds run in different python interpreters. The
parser are duplicated. This patch is going to create new API for GenFds
and have the build to call that API instead of executing GenFds.py. As
such, the GenFds and build can share the parser data.

This patch is expected to save the time of GenFds about 2~3 seconds.
More details will be logged in BZ.

This is the summary measure data generated from python cProfile for
building Ovmf.

Currently:
8379147 function calls (8135450 primitive calls) in 12.580 seconds

After applying this patch:
3428712 function calls (3418881 primitive calls) in 8.944 seconds

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: ZhiqiangX Zhao <zhiqiangx.zhao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Carsey Jaben <jaben.carsey@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-07 10:12:05 +08:00
34e733f200 BaseTool: Filter out unused structure pcds
V2:
Fixed the issue that V1 adds new check
to the Pcds in the platform unused library INF files.
It breaks the existing platform.

V1?
The current code handle all the structure pcds
even if there is no module or library use them.
This patch is going to filter out the unused structure pcds.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-07 10:03:02 +08:00
72a1d77694 BaseTools: Enable Pcd Array support.
https://bugzilla.tianocore.org/show_bug.cgi?id=1292

This patch is going to enable Array data type for PCD.

1. Support Pcd ARRAY as Structure PCD type
   including basic datatype array and structure array.
   For example:
   gStructuredPcdPkgTokenSpaceGuid.PcdTest|{0x0}|TEST[10]|0x00010080
   gStructuredPcdPkgTokenSpaceGuid.PcdTest2|{0x0}|UINT8[10]|0x00010081
2. Support C CODE style value initialization in DEC/DSC.
   For example:
gStructuredPcdPkgTokenSpaceGuid.PcdTest|{CODE({
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
  {0, {0, 0, 0, 0,  0, 0, 0}},
})}

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-07 09:59:36 +08:00
088a533480 ArmPkg/OpteeLib: Add dummy RPC handler
Add dummy RPC handler for RPCs that are not implemented as control
should be returned back to OP-TEE in case any RPC is invoked.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-06 17:55:45 +01:00
bc39c5cbea BaseTools: create and use a standard shared variable for '*'
add a variable for the string '*' and then use it instead of lots of '*'

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by : Bob Feng <bob.c.feng@intel.com>
2018-12-06 17:11:24 +08:00
ea55e37c36 BaseTools: cleanup LongFilePathSupport usage
1) remove an identical function and import it from Common.LongFilePathSupport
2) remove an import that is not needed/used.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by : Bob Feng <bob.c.feng@intel.com>
2018-12-06 17:10:27 +08:00
4495792953 BaseTools: Move Identification file to Eot
Move the Identification file.
This file is only ever imported into the Eot tool.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by : Bob Feng <bob.c.feng@intel.com>
2018-12-06 17:08:09 +08:00
67938bcc9d BaseTools/CommonLib: drop the use of MAX_ADDRESS
The macro MAX_ADDRESS represents the largest virtual address that
is valid for a certain architecture. For the BaseTools, this quantity
is irrelevant, since the same tools can be used to build for different
targets.

Since we only refer to it in a single place, which is an ASSERT() that
doesn't seem particularly useful (it ensures that memcpy() will not
be called with arguments that will make it read beyond the end of the
address space and wrap around), let's drop the ASSERT and all references
to MAX_ADDRESS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-06 08:32:00 +01:00
6e8cad49a0 Maintainers.txt: Remove DuetPkg
Since DuetPkg is due to be removed, Maintainers.txt
should also be updated.
https://bugzilla.tianocore.org/show_bug.cgi?id=1322

Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-12-06 14:34:29 +08:00
7702ceb8af BaseTools: Remove tools only used by DuetPkg
Given that DuetPkg will be removed, tools only used by
DuetPkg can also be removed after its removal operation.
https://bugzilla.tianocore.org/show_bug.cgi?id=1322

v2:Remove these tools in Makefile and GNUmakefile.

v4:Remove these tools in BinWrappers/PosixLike/ and
   UserManuals.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-06 14:32:04 +08:00
9fb5c5c4a3 DuetPkg: Remove DuetPkg
DuetPkg depends on Legacy BIOS to provide a UEFI environment.
It was invented in the era when UEFI environment is hard to find.
Since now UEFI is very popular in PC area, we could stop the
official support of this package and remove it from the master.
https://bugzilla.tianocore.org/show_bug.cgi?id=1322

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-12-06 14:31:25 +08:00
8efc6d84ca BaseTools/CommonLib: drop definition of MAX_UINTN
The maximum value that can be represented by the native word size
of the *target* should be irrelevant when compiling tools that
run on the build *host*. So drop the definition of MAX_UINTN, now
that we no longer use it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:04:54 +01:00
98a9519f1c BaseTools/CommonLib: get rid of 'native' type string parsing routines
Parsing a string into an integer variable of the native word size
is not defined for the BaseTools, since the same tools may be used
to build firmware for different targets with different native word
sizes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:04:54 +01:00
c0b7379a31 BaseTools/DevicePath: use MAX_UINT32 as default device path max size
Replace the default size limit of IsDevicePathValid() with a value
that does not depend on the native word size of the build host.

4 GiB seems sufficient as the upper bound of a device path handled
by UEFI.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:04:54 +01:00
4d393eb876 BaseTools/CommonLib: add definition of MAX_UINT32
Since we will be dropping the definition of MAX_UINTN, whose meaning
is ambiguous for the BaseTools, add a definition of MAX_UINT32 that
we can switch to.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:04:54 +01:00
6e2d15e3c4 BaseTools/DevicePath: use explicit 64-bit number parsing routines
Replace invocations of StrHexToUintn() with StrHexToUint64(), so
that we can drop the former.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:03:23 +01:00
76e5f493d2 BaseTools/CommonLib: use explicit 64-bit type in Strtoi()
Don't use the native word size string to number parsing routines,
but instead, use the 64-bit one and cast to UINTN.

Currently, the only user is in Source/C/DevicePath/DevicePathFromText.c
which takes care to use Strtoi64 () unless it assumes the value fits
in 32-bit, so this change is a no-op even on 32-bit build hosts.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:03:23 +01:00
93afbd1595 BaseTools/CommonLib: avoid using 'native' word size in IP address handling
In the context of the BaseTools, there is no such thing as a native word
size, given that the same set of tools may be used to build a firmware
image consisting of both 32-bit and 64-bit modules.

So update StrToIpv4Address() and StrToIpv6Address() to use UINT64
types instead of UINTN types when parsing strings.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 09:03:17 +01:00
64ab2c82e8 BaseTools: Remove GenVtf
GenVtf C tool is IPF specific. IPF support has been removed
from edk2 trunk. This tool can be removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1349

v2:Remove GenVtf in Makefile and GNUmakefile.

v3:Remove BinWrappers/PosixLike/GenVtf and the user manual
   of GenVtf.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-05 10:42:32 +08:00
b1e5547551 Maintainers.txt: Change package maintainer of IntelFsp*Pkg
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-12-05 09:12:31 +08:00
85520ac6a3 Maintainers.txt: Update BaseTools maintainers
As Yonghong has some other focus, change him from maintainer
to reviewer, Bob will be the new maintainer.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-04 09:49:51 +08:00
51bb05c795 ArmVirtPkg/QemuVirtMemInfoLib: trim the MMIO region mapping
QEMU/mach-virt is rather unhelpful when it comes to tracking down
NULL pointer dereferences that occur while running in UEFI: since
we have NOR flash mapped at address 0x0, inadvertent reads go
unnoticed, and even most writes are silently dropped, unless you're
unlucky and the instruction in question is one that KVM cannot
emulate, in which case you end up with a QEMU crash like this:

  error: kvm run failed Function not implemented
   PC=000000013f7ff804 X00=000000013f7ab108 X01=0000000000000064
  X02=000000013f801988 X03=00000000800003c4 X04=0000000000000000
  X05=0000000096000044 X06=fffffffffffd8270 X07=000000013f7ab4a0
  X08=0000000000000001 X09=000000013f803b88 X10=000000013f7e88d0
  X11=0000000000000009 X12=000000013f7ab554 X13=0000000000000008
  X14=0000000000000002 X15=0000000000000000 X16=0000000000000000
  X17=0000000000000000 X18=0000000000000000 X19=0000000000000000
  X20=000000013f81c000 X21=000000013f7ab170 X22=000000013f81c000
  X23=0000000009000018 X24=000000013f407020 X25=000000013f81c000
  X26=000000013f803530 X27=000000013f802000 X28=000000013f7ab270
  X29=000000013f7ab0d0 X30=000000013f7fee10  SP=000000013f7a6f30
  PSTATE=800003c5 N--- EL1h

and a warning in the host kernel log that load/store instruction
decoding is not supported by KVM.

Given that the first page of the flash device is not actually
used anyway, let's reduce the mappings of the peripheral space
and the flash device (both of which cover page #0) to only cover
what is actually required:

  ArmVirtQemu.fdf:
  > 0x00001000|0x001ff000
  > gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize

  ArmVirtQemuKernel.fdf:
  > 0x00008000|0x001f8000
  > gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize

For ArmVirtQemu, the resulting virtual mapping looks roughly like:
- [0, 4K)       : flash, unmapped
- [4K, 2M)      : flash, mapped as WB+X RAM
- [2M, 64M)     : flash, unmapped
- [64M, 128M)   : varstore flash, will be mapped by the NOR flash driver
- [128M, 256M)  : peripherals, mapped as device
- [256M, 1GB)   : 32-bit MMIO aperture, translated IO aperture, ECAM,
                  will be mapped by the PCI host bridge driver
- [1GB, ...)    : RAM, mapped.

After this change, any inadvertent read or write from/to the first
physical page will trigger a translation fault inside the guest,
regardless of the nature of the instruction, without crashing QEMU.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-03 15:56:39 +01:00
5e27deed43 ArmVirtPkg/NorFlashQemuLib: disregard our primary FV
The primary FV contains the firmware boot image, which is not
runtime updatable in our case. So exposing it to the NOR flash
driver is undesirable, since it may attempt to modify the NOR
flash contents. It is also rather pointless, since we don't
keep anything there that we care to expose. (the SEC and PEI
phase modules are not executable from DXE context, and the
contents of the embedded DXE phase FV are exposed by the DXE
core directly via the FVB2 protocol)

So let's disregard the NOR flash block that covers the primary
FV.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-12-03 15:56:10 +01:00
aa1097921d ArmPkg/ArmMmuLib ARM: handle unmapped sections when updating permissions
The ARM ArmMmuLib code currently does not take into account that
setting permissions on a region should take into account that a
region may not be mapped yet to begin with.

So when updating a section descriptor whose old value is zero,
pass in the address explicitly.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-03 15:55:35 +01:00
36a87fec68 ArmPkg/ArmMmuLib ARM: handle unmapped section in GetMemoryRegion()
GetMemoryRegion() is used to obtain the attributes of an existing
mapping, to permit permission attribute changes to be optimized
away if the attributes don't actually change.

The current ARM code assumes that a section mapping or a page mapping
exists for any region passed into GetMemoryRegion(), but the region
may be unmapped entirely, in which case the code will crash. So check
if a section mapping exists before dereferencing it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-12-03 15:54:39 +01:00
a2df8587bf MdeModulePkg: Correct PCD name in MdeModulePkg.uni
https://bugzilla.tianocore.org/show_bug.cgi?id=1363
New PCD PcdVpdBaseAddress64 is added in MdeModulePkg.dec.
Its string token in MdeModulePkg.uni should match to its name.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Bi Dandan <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Bi Dandan <dandan.bi@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-12-03 08:29:26 +08:00
bcf2a9db1f EmbeddedPkg/EmbeddedPkg.dec: drop PcdPrePiCpuMemorySize declarations
PcdPrePiCpuMemorySize is no longer used so drop the declarations from
the package DEC file.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-30 22:43:20 +01:00
55342094fb ArmVirtPkg: drop PcdPrePiCpuMemorySize assignments from all platforms
PcdPrePiCpuMemorySize is no longer used so drop the PCD overrides
from all platform descriptions in ArmVirtPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 18:57:48 +01:00
175358e15e EmbeddedPkg/PrePiLib: drop unused PCD reference
Drop the reference to gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
which is never used.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:57:48 +01:00
8b767aae65 ArmPlatformPkg/PlatformPei: drop unused PCD references
Drop some PCD references that are not actually referenced from the
PlatformPei code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:57:39 +01:00
32f79df36e BeagleBoardPkg/PrePi: base GCD memory space size on CPU's PA range
Derive the size of the GCD memory space map directly from the CPU's
information registers rather than from the PcdPrePiCpuMemorySize PCD,
which will be removed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:57:31 +01:00
ff3c97807a ArmVirtPkg/PrePi: base GCD memory space size on CPU's PA range
Derive the size of the GCD memory space map directly from the CPU's
information registers rather than from the PcdPrePiCpuMemorySize PCD,
which will be removed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 18:57:20 +01:00
e0ec9a127f ArmPlatformPkg/PrePi: base GCD memory space size on CPU's PA range
Derive the size of the GCD memory space map directly from the CPU's
information registers rather than from the PcdPrePiCpuMemorySize PCD,
which will be removed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:55:26 +01:00
a3b6537144 ArmPkg/CpuPei: base GCD memory space size on CPU's PA range
Derive the size of the GCD memory space map directly from the CPU's
information registers rather than from the PcdPrePiCpuMemorySize PCD,
which will be removed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:55:08 +01:00
e36b243c71 ArmPkg/ArmMmuLib: take the CPU supported maximum PA space into account
In preparation of dropping PcdPrePiCpuMemorySize entirely, base the
maximum size of the identity map on the capabilities of the CPU.
Since that may exceed what is architecturally permitted when using
4 KB pages, take MAX_ADDRESS into account as well.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:54:59 +01:00
2f9b248af8 ArmVirtPkg/XenVirtMemInfoLib: refactor reading of the PA space size
Use the new ArmLib helper to read the CPU's physical address limit
so we can drop our own homecooked one.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 18:54:36 +01:00
95d04ebca8 ArmPkg/ArmLib: add support for reading the max physical address space size
Add a helper function that returns the maximum physical address space
size as supported by the current CPU.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:54:09 +01:00
82379bf660 MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits
AArch64 supports the use of more than 48 bits for physical and/or
virtual addressing, but only if the page size is set to 64 KB,
which is not supported by UEFI. So redefine MAX_ADDRESS to cover
only 48 address bits.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-29 18:53:22 +01:00
364eed8479 ArmVirtPkg/QemuVirtMemInfoLib: remove 1:1 mapping of top of PA range
Currently, we map DRAM as EFI_MEMORY_WB, and the remainder of the
entire virtual address space is mapped with EFI_MEMORY_UC attributes,
regardless of whether any devices actually reside there.

Now that we are relaxing the address space limit to more than 40 bits,
mapping all that address space actually takes up more space in page
tables than we have so far made available as temporary RAM. So let's
get rid of the mapping rather than increasing the available RAM, given
that the mapping is not particularly useful anyway.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 18:52:54 +01:00
66e06a72bf ArmVirtPkg/FdtPciHostBridgeLib: map ECAM and I/O spaces in GCD memory map
Up until now, we have been getting away with not declaring the ECAM
and translated I/O spaces at all in the GCD memory map, simply because
we map the entire address space with device attributes in the early PEI
code, and so the ECAM space will be mapped wherever it ends up.

Now that we are about to make changes to how ArmVirtQemu reasons
about the size of the address space, it would be better to get rid
of this mapping of the entire address space, since it can get
arbitrarily large without real benefit.

So start by mapping the ECAM and translated I/O spaces explicitly,
instead of relying on the early PEI mapping.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 18:52:22 +01:00
9710639195 EmbeddedPkg/PrePiHobLib: drop CreateHobList() from library
Drop the declaration and the implementation of CreateHoblist(),
which is not used anywhere.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:52:14 +01:00
a21eb02d0a EmbeddedPkg/TemplateSec: remove unused module
Remove this module: it is unused, and should not be used as an
example going forward.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-29 18:49:35 +01:00
e979ea74aa Maintainers.txt: Update MdeModulePkg maintainers
As Star has some other focus, change Star from maintainer
to reviewer, Jian will be the first maintainer, and add
Hao as the second maintainer.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Acked-by: Hao Wu <hao.a.wu@intel.com>
Acked-by: Jian J Wang <jian.j.wang@intel.com>
2018-11-29 09:32:54 +08:00
03d3e7b2ed Maintainers.txt: Update FmpDevicePkg maintainer
As Star has some other focus, remove Star and add Liming as
the FmpDevicePkg maintainer.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Acked-by: Liming Gao <liming.gao@intel.com>
2018-11-29 09:32:53 +08:00
ae960002fe MdeModulePkg/BaseSortLib: Enable for all module types
Expose BaseSortLib for use in SEC and PEI phases.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-29 08:35:54 +08:00
864cba9598 EmbeddedPkg/PrePiMemoryAllocationLib: Added AllocateZeroPool()
This function is exposed by the MemoryAllocationLib header.
An AllocateZeroPool() function has been added to fix modules depending on
this library and this function.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-29 08:35:10 +08:00
591a44c02d BaseTools Script: Update ConvertFceToStructurePcd to report warning messages
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1297
When the header files are not found for the used C structure, this script will
report the warning, let user know there is no header file to define C structure.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wang BinX A <binx.a.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-29 08:30:52 +08:00
9ebef6c0a7 Maintainers.txt: Add the rule to hand over the package maintain role
In V2, change his to the, and add new maintainers follow up.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-29 08:30:40 +08:00
18a700945f ArmPkg: fix StandaloneMmMmuLib subdirectory case
While this isn't the only Aarch64 directory in the tree, let's
keep from adding more of them.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:00:45 +00:00
5ee1bcae59 ArmPkg/ArmPkg.dsc: move ArmMmuStandaloneMmLib.inf to AARCH64 section
ArmMmuStandaloneMmLib.inf cannot be built for ARM so move it to the
[Components.AARCH64] section in ArmPkg.dsc.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-27 13:32:13 +01:00
eed947be0b ArmPkg/ArmMmuLib: Add MMU Library suitable for use in S-EL0.
The Standalone MM environment runs in S-EL0 in AArch64 on ARM Standard
Platforms. Privileged firmware e.g. ARM Trusted Firmware sets up its
architectural context including the initial translation tables for the
S-EL1/EL0 translation regime. The MM environment will still request ARM
TF to change the memory attributes of memory regions during
initialization.

The Standalone MM image is a FV that encapsulates the MM foundation
and drivers. These are PE-COFF images with data and text segments.
To initialise the MM environment, Arm Trusted Firmware has to create
translation tables with sane default attributes for the memory
occupied by the FV. This library sends SVCs to ARM Trusted Firmware
to request memory permissions change for data and text segments.

This patch adds a simple MMU library suitable for execution in S-EL0 and
requesting memory permissions change operations from Arm Trusted Firmware.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:06:06 +01:00
37b2516bff ArmPkg/Include: Add MM interface SVC return codes.
This patch adds the Management Mode(MM) - Secure Partition
Manager(SPM) SVC return codes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:06:03 +01:00
9d58430833 ArmPkg/Include: Fix the SPM version SVC ID
The MM_VERSION SMC call uses SMC32 calling convention. Fix the macro
to reflect the correct value.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:06:01 +01:00
4c2f32ed1a ArmPkg/Drivers: Add EFI_MM_COMMUNICATION_PROTOCOL DXE driver.
PI v1.5 Specification Volume 4 defines Management Mode Core Interface
and defines EFI_MM_COMMUNICATION_PROTOCOL. This protocol provides a
means of communicating between drivers outside of MM and MMI
handlers inside of MM.

This patch implements the EFI_MM_COMMUNICATION_PROTOCOL DXE runtime
driver for AARCH64 platforms. It uses SMCs allocated from the standard
SMC range defined in DEN0060A_ARM_MM_Interface_Specification.pdf
to communicate with the standalone MM environment in the secure world.

This patch also adds the MM Communication driver (.inf) file to
define entry point for this driver and other compile
related information the driver needs.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:05:57 +01:00
767febf86f ArmPkg: Add PCDs needed for MM communication driver.
This patch defines PCDs to describe the base address and size of
communication buffer between normal world (uefi) and standalone MM
environment in the secure world.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-27 13:05:45 +01:00
13d5d0a56e ArmPlatformPkg/NorFlashPlatformLib: remove unused Guid member from struct
We no longer use per-instance GUIDs to identify NOR flash banks so
there is no longer a need to define them. Drop the Guid member from
the NOR_FLASH_DESCRIPTION type.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Thomas Abraham <thomas.abraham@arm.com>
2018-11-27 12:54:13 +01:00
534efca06f MdeModulePkg PCD: Add DynamicEx PcdVpdBaseAddress64 for non SPI platform
https://bugzilla.tianocore.org/show_bug.cgi?id=1356
Current PcdVpdBaseAddress is 32bit static Pcd. NON SPI platform needs to
configure it as Dynamic PCD. Emulator platform (such as NT32) may set its
value to 64bit address.
To meet with this usage, 64bit DynamicEx PcdVpdBaseAddress64 is introduced.
If its value is not zero, it will be used.
If its value is zero, static PcdVpdBaseAddress will be used.
When NON SPI platform enables VPD PCD, they need to set PcdVpdBaseAddress64.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
2018-11-27 11:29:21 +08:00
277a3958d9 OvmfPkg: Don't include TftpDynamicCommand in XCODE5 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=1355
XCODE doesn't support HII resource section. TftpDynamicCommand driver depends
on HII resource section. To let OvmfPkg boot to shell on XCODE5 tool chain,
don't include TftpDynamicCommand driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-27 11:21:15 +08:00
385c0bf55a MdePkg ACPI: fix the typos in Acpi61.h and Acpi62.h
The GUID for VIRTUAL_CD_REGION_PERSISTENT was using the closing
square bracket mistakenly.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-27 11:18:28 +08:00
72e514c907 ArmVirtPkg/NorFlashQemuLib: discover NOR flash banks dynamically
NorFlashQemuLib is one of the last remaining drivers in ArmVirtPkg
that are not based on the device tree received from QEMU.

For ArmVirtQemu, this does not really matter, given that the NOR
flash banks are always the same: the PEI code is linked to execute
in place from flash bank #0, and the fixed varstore PCDs refer to
flash bank #1 directly.

However, ArmVirtQemuKernel can execute at any offset, permitting it
to be used as an intermediary loader when running QEMU with secure
world emulation enabled, in which case NOR flash bank #0 is secure
only and contains the secure world firmware. In this case,
NorFlashQemuLib should not expose the first flash bank at all.

To prevent introducing too much internal knowledge about which flash
bank is accessible under which circumstances, let's switch to using
the DTB to decide which flash banks to expose to the NOR flash driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-26 17:57:41 +01:00
32f5975770 ArmVirtPkg/FdtClientDxe: take DT node 'status' properties into account
DT has a [pseudo-]standardized 'status' property that can be set on
any node, and which signifies that a node should be treated as
absent unless it is set to 'ok' or 'okay'. So take this into account
when iterating over nodes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-11-26 17:57:37 +01:00
8b9025345e ArmPlatformPkg/NorFlashDxe: use one GUID plus index to identify flash banks
Currently, each flash bank controlled by ArmPlatformPkg/NorFlashDxe
has its own VendorHw GUID, and instances of NorFlashPlatformLib
describe each bank to the driver, along with the GUID for each.

This works ok for bare metal platforms, but it would be useful for
virtual platforms if we could obtain this information from a
device tree, which would require us to invent GUIDs on the fly,
given that the 'cfi-flash' binding does not include a GUID.

So instead, let's switch to a single GUID for all flash banks,
and update the driver's device path handling to include an index
to identify each bank uniquely.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Thomas Abraham <thomas.abraham@arm.com>
2018-11-26 17:53:46 +01:00
4ef1135839 ArmPlatformPkg/NorFlashDxe: prepare for devicepath format change
A subsequent patch will change the layout of devicepath nodes
produced by this driver. In preparation, make some tweaks to
the code to use a packed struct for the devicepath and to pass
the device index to NorFlashCreateInstance(). These are cosmetic
changes only, the resulting binaries should be identical.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Thomas Abraham <thomas.abraham@arm.com>
2018-11-26 17:53:42 +01:00
1ec194b21c ArmPkg: remove now unused BsdLib.h
The last remaining users of the BdsLib.h header reside in the
edk2-platforms tree, and so it has been copied there. This
allows us to remove the original from ArmPkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-11-26 17:53:42 +01:00
e8f40b770f IntelFsp2WrapperPkg: Fix constant if statements issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1351

Internal code quality scanning found 2 constant if
statements related to FixedPcdGet8 () usage.
Since the PCD can be PatchableInModule too, it should be
changed to PcdGet8 () to fix this issue.

Test: Verified on internal platform and booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-26 11:40:38 +08:00
2098de6279 IntelFsp2WrapperPkg: Fix line ending format issue
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1352

Fixed line ending format wrong issues on some files.

Test: Verified building successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Wu Hao A <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-26 11:40:27 +08:00
ed3951ebbd MdeModulePkg/LockboxNullLib: clean up INF file.
Remove unused module type restriction for NULL instance.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-26 09:32:45 +08:00
a2481def5d NetworkPkg/IScsiDxe: add debug logs for failed SetVariable attempts
Add debug messages for failed attempts to write to a variable.

Cc: Siyuan Fu <siyuan.fu@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
2018-11-23 14:27:11 +08:00
59e323822f Vlv2TbltDevicePkg:Fix build and boot failure of Minnowboard Max platform.
Remove the duplicated IScsiDxe driver from FDF; Add required shell libraries; Update SYSTEM_CONFIGURATION data structure.

Test: Install and boot Windows 10.

Cc: Zailiang Sun <zailiang.sun@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: David Wei <david.wei@intel.com>
2018-11-23 13:58:28 +08:00
a90c7df7ed MdeModulePkg/Variable: add debug logs in VariableServiceSetVariable
Print debug messages if size of the VariableName plus DataSize exceeds
Max(Auth|Voltaile)VariableSize bytes. The messages will be useful if any
platform specific value of Max(Auth|Voltaile)VariableSize PCDs have to
be changed.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-23 09:54:55 +08:00
a2c0496991 ShellPkg: Remove ShellPkg wrapper header files
These wrapper header files are not referenced by all
open source, so they are removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=158

Cc: Jaben Carsey <jaben.carsey@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
2018-11-22 14:24:23 +08:00
6556224e1f ArmPkg/ArmSmcPsciResetSystemLib: add missing call to ExitBootServices()
Our poor man's implementation of EnterS3WithImmediateWake () currently
sets a high TPL level to disable interrupts, and simply calls the
PEI entrypoint again after disabling the MMU.

Unfortunately, this is not sufficient: DMA capable devices such as
network controllers or USB controllers may still be enabled and
writing to memory, e.g., in response to incoming network packets.

So instead, do the full ExitBootServices() dance: allocate space and
get the memory map, call ExitBootServices(), and in case it fails, get
the memory map again and call ExitBootServices() again. This ensures
that all cleanup related to DMA capable devices is performed before
doing the warm reset.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-21 12:02:34 +01:00
8611bf99e0 Maintainers.txt: update Vlv2*Pkg maintainers.
Cc: David Wei <david.wei@intel.com>
Cc: Yi Qian <yi.qian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zailiang Sun <zailiang.sun@intel.com>
2018-11-21 17:40:28 +08:00
59222fe90b MdePkg: Check input Ptrs in GetSectionFromAnyFvByFileType
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1337

In function GetSectionFromAnyFvByFileType, the input parameter "Buffer"
and "size" should not be NULL, so add ASSERT here to avoid any checker
report that the NULL pointer may be used.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-21 13:01:03 +08:00
d8e702693a MdePkg: check Length para before use in DevPathToTextUsbWWID
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1336

In function DevPathToTextUsbWWID, the Length parameter is used
without check. This patch is to add check before using it.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-21 13:01:02 +08:00
63f151aadb MdeModulePkg/DisplayEngine: Remove useless NULL ptr check for NewPos
In function UiDisplayMenu, the NewPos ptr which used to point to the
highlight menu entry. It will always point to the menu entry which
need to be highlighted or the gMenuOption menu if the highlight menu
is not found.
So we can remove the NULL ptr check for NewPos in this function.
And add the ASSERT code to avoid if any false positive reports
of NULL pointer dereference issue raised from static analysis.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-21 13:01:02 +08:00
3cc9af5ce3 SecurityPkg: Update TCG PFP spec revision.
UEFI TCG has aligned with TCG PFP 1.03 v51 along with Errata Version 1.0.
Update spec version accordingly.
Spec Link:
https://trustedcomputinggroup.org/wp-content/uploads/PC-ClientSpecific_Platform_Profile_for_TPM_2p0_Systems_v51.pdf
https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-Firmware-Profile-for-TPM-2-0-v1p03_r51-errata-v1p0_170426.pdf

Cc: Yao Jiewen <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhang, Chao B <chao.b.zhang@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
2018-11-21 10:06:36 +08:00
d021868ccf OvmfPkg: simply use the Bochs interface for vmsvga
BAR  |    std vga     |  vmsvga
---------------------------------
0    |   Framebuffer  | I/O space
1    |   Reserved     | Framebuffer
2    |   MMIO         | FIFO

- We cannot recognize VMW SVGA as BOCHS because that would confuse the
  IsQxl setting in QemuVideoControllerDriverStart(),

- We cannot recognize VMW SVGA as BOCHS_MMIO because BAR2 on VMW SVGA is
  not the BOCHS MMIO BAR (we can only use port IO).

Therefore the list of reasons for which we should introduce
QEMU_VIDEO_VMWARE_SVGA should name three reasons:

 (1) Get framebuffer from correct PCI BAR
 (2) Prevent using BAR2 for MMIO
 (3) Prevent mis-recognizing VMW SVGA as QXL

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2018-11-20 20:49:15 +01:00
330e18555c Revert "OvmfPkg: VMWare SVGA display device register definitions"
This reverts commit 9bcca53fe4.

We reverted VMWare SVGA driver. We don't need these definitions too.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit 328409ce8d)
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-11-20 20:24:11 +01:00
9442266c70 Revert "OvmfPkg/QemuVideoDxe: Helper functions for unaligned port I/O."
This reverts commit 05a5379458.

The VMWare SVGA display device implemented by Qemu (-vga vmware) uses
an I/O-type BAR which is laid out such that some register offsets are
not aligned to the read/write width with which they are expected to be
accessed. However, we reverted the initialization of VMWare SVGA device,
we don't need such unaligned I/O.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit 438ada5aa5)
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-11-20 20:24:09 +01:00
1358ecb77f Revert "OvmfPkg/QemuVideoDxe: VMWare SVGA device support"
This reverts commit c137d95081.

The VMWare SVGA model now -- since commit 104bd1dc70 in QEMU --
falls back to stdvga (that is, Bochs) if we don't setup VMWare SVGA
FIFO.

To simplify QemuVideoDxe, we don't intend to implement the VMWare SVGA
FIFO setup feature. It means our current VMW SVGA driver code is
basically dead. To simplify the problem, we will replace the old
VMWare SVGA driver to Bochs interface. It should work on all QEMU
version.

The first step for using Bochs interface is to revert old driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit 98856a724c)
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-11-20 20:24:04 +01:00
29d8a4d4ab Revert "OvmfPkg/QemuVideoDxe: list "UnalignedIoInternal.h" in the INF file"
This reverts commit b2959e9f1a.

The VMWare SVGA display device implemented by Qemu (-vga vmware) uses
an I/O-type BAR which is laid out such that some register offsets are
not aligned to the read/write width with which they are expected to be
accessed. However, we will revert the initialization of VMWare SVGA
device later, we don't need such unaligned I/O.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: yuchenlin <yuchenlin@synology.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
(cherry picked from commit e038bde267)
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2018-11-20 20:23:59 +01:00
7f3b0bad4b MdeModulePkg/SdMmcPciHcDxe: Allow overriding base clock frequency
Some SdMmc host controllers are run by clocks with different
frequency than it is reflected in Capabilities Register 1.
It is allowed by SDHCI specification ver. 4.2 - if BaseClkFreq
field value of the Capability Register 1 is zero, the clock
frequency must be obtained via another method.

Because the bitfield is only 8 bits wide, a maximum value
that could be obtained from hardware is 255MHz.
In case the actual frequency exceeds 255MHz, the 8-bit BaseClkFreq
member of SD_MMC_HC_SLOT_CAP structure occurs to be not sufficient
to be used for setting the clock speed in SdMmcHcClockSupply
function.

This patch adds new UINT32 array ('BaseClkFreq[]') to
SD_MMC_HC_PRIVATE_DATA structure for specifying
the input clock speed for each slot of the host controller.
All routines that are used for clock configuration are
updated accordingly.

This patch also adds new IN OUT BaseClockFreq field
in the Capability callback of the SdMmcOverride,
protocol which allows to update BaseClkFreq value.

The patch reuses original commit from edk2-platforms:
20f6f144d3a8 ("Marvell/Drivers: XenonDxe: Allow overriding base clock
frequency")

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-20 13:46:57 +08:00
b7b803a6d5 MdeModulePkg/SdMmcPciHcDxe: Add SwitchClockFreqPost to SdMmcOverride
Some SD Host Controlers need to do additional operations after clock
frequency switch.

This patch add new callback type to NotifyPhase of the SdMmcOverride
protocol. It is called after SdMmcHcClockSupply.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-20 13:46:57 +08:00
a4708009cc MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol
Some SD Host Controllers use different values in Host Control 2 Register
to select UHS Mode. This patch adds a new UhsSignaling type routine to
the NotifyPhase of the SdMmcOverride protocol.

UHS signaling configuration is moved to a common, default routine
(SdMmcHcUhsSignaling). After it is executed, the protocol producer
can override the values if needed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-20 13:46:57 +08:00
49c9953425 MdeModulePkg/SdMmcPciHcDxe: Add an optional parameter in NotifyPhase
In order to ensure bigger flexibility in the NotifyPhase
routine of the SdMmcOverride protocol, enable using an
optional phase-specific data. This will allow to exchange
more information between the protocol producer driver
and SdMmcPciHcDxe in the newly added callbacks.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-20 13:46:57 +08:00
115336ccaf IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2018-11-20 12:03:52 +08:00
de1e1195b3 IntelFsp2WrapperPkg: Revert 90c5bc08
Commit message issue and reverted commit
90c5bc081d.

Will re-submit with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-20 11:55:24 +08:00
90c5bc081d IntelFsp2WrapperPkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
2018-11-20 11:33:14 +08:00
4187f79cf0 SecurityPkg: TCG Add more Event type
Add more event log type defined in TCG PTP spec 00.51
https://trustedcomputinggroup.org/wp-content/uploads/PC-ClientSpecific_Platform_Profile_for_TPM_2p0_Systems_v51.pdf

Cc: Yao Jiewen <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhang, Chao B <chao.b.zhang@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
2018-11-20 09:26:14 +08:00
3d3416e892 BaseTools: Fix the problem using FILE_GUID override in .dsc
https://bugzilla.tianocore.org/show_bug.cgi?id=1330

This patch is going to fix the problem using FILE_GUID override in .dsc.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: BobCF <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-20 08:10:28 +08:00
81c6f1dfba ArmVirtPkg/PrePi: clear frame pointer in startup code
When setting up the stack in the startup code and jumping into C code
for the first time, ensure that the frame pointer register is cleared
so that backtraces terminate correctly. Otherwise, output like the
below is shown when encountering an exception on a DEBUG build:

  Synchronous Exception at 0x0000000078A14780
  PC 0x000078A14780 (0x000078A00000+0x00014780) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A10634 (0x000078A00000+0x00010634) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A11CF0 (0x000078A00000+0x00011CF0) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A11DD0 (0x000078A00000+0x00011DD0) [ 0] ArmVeNorFlashDxe.dll
  PC 0x00007BC9D87C (0x00007BC98000+0x0000587C) [ 1] PartitionDxe.dll
  PC 0x00007BC99B3C (0x00007BC98000+0x00001B3C) [ 1] PartitionDxe.dll
  PC 0x00007F362F50 (0x00007F359000+0x00009F50) [ 2] DxeCore.dll
  PC 0x00007BD63BB0 (0x00007BD5B000+0x00008BB0) [ 3] BdsDxe.dll
  PC 0x00007BD6EE00 (0x00007BD5B000+0x00013E00) [ 3] BdsDxe.dll
  PC 0x00007BD67C70 (0x00007BD5B000+0x0000CC70) [ 3] BdsDxe.dll
  PC 0x00007F3724F0 (0x00007F359000+0x000194F0) [ 4] DxeCore.dll
  PC 0x00004008FC30
  PC 0x000040090130
  PC 0x5800F6025800F5E1

  Recursive exception occurred while dumping the CPU state

which is rather unhelpful, given that this prevent the remaining debug
output from being printed (register dump, stack dump, fault related
system registers etc)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-19 11:10:10 -08:00
0bcf71c13c ArmPlatformPkg: clear frame pointer in startup code
When setting up the stack in the startup code and jumping into C code
for the first time, ensure that the frame pointer register is cleared
so that backtraces terminate correctly. Otherwise, output like the
below is shown when encountering an exception on a DEBUG build:

  Synchronous Exception at 0x0000000078A14780
  PC 0x000078A14780 (0x000078A00000+0x00014780) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A10634 (0x000078A00000+0x00010634) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A11CF0 (0x000078A00000+0x00011CF0) [ 0] ArmVeNorFlashDxe.dll
  PC 0x000078A11DD0 (0x000078A00000+0x00011DD0) [ 0] ArmVeNorFlashDxe.dll
  PC 0x00007BC9D87C (0x00007BC98000+0x0000587C) [ 1] PartitionDxe.dll
  PC 0x00007BC99B3C (0x00007BC98000+0x00001B3C) [ 1] PartitionDxe.dll
  PC 0x00007F362F50 (0x00007F359000+0x00009F50) [ 2] DxeCore.dll
  PC 0x00007BD63BB0 (0x00007BD5B000+0x00008BB0) [ 3] BdsDxe.dll
  PC 0x00007BD6EE00 (0x00007BD5B000+0x00013E00) [ 3] BdsDxe.dll
  PC 0x00007BD67C70 (0x00007BD5B000+0x0000CC70) [ 3] BdsDxe.dll
  PC 0x00007F3724F0 (0x00007F359000+0x000194F0) [ 4] DxeCore.dll
  PC 0x00004008FC30
  PC 0x000040090130
  PC 0x5800F6025800F5E1

  Recursive exception occurred while dumping the CPU state

which is rather unhelpful, given that this prevent the remaining debug
output from being printed (register dump, stack dump, fault related
system registers etc)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-19 11:10:09 -08:00
316b3a719f MdeModulePkg: Remove PcdIdentifyMappingPageTablePtr
PcdIdentifyMappingPageTablePtr was used to share page
table buffer between modules.
Buf after some changes on 2015/07/17, it was useless
and could be removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1304

v2:
1.Remove PcdIdentifyMappingPageTablePtr in MdeModulePkg.uni.
2.Update the commit message.

Cc: Star Zeng <star.zeng@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: shenglei <shenglei.zhang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2018-11-19 18:00:05 +08:00
8b1a4320b8 UnixPkg: Remove UnixPkg and update Maintainers.txt
UnixPkg is deprecated.
The same functionality is supported using the EmulatorPkg.
Please see EmulatorPkg/README for more information about
EmulatorPkg.
https://bugzilla.tianocore.org/show_bug.cgi?id=1291

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-19 10:51:17 +08:00
238fe4ded4 Maintainers.txt: Remove EdkShellPkg and EkdShellBinPkg
Given that EdkShellPkg and EkdShellBinPkg will be removed,
information about them in Maintainers.txt should also be
deleted.
https://bugzilla.tianocore.org/show_bug.cgi?id=1107
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-11-19 10:51:09 +08:00
6caf954c1b EdkShellPkg: Remove EdkShellPkg
EdkShellPkg is removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1107

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-11-19 10:51:00 +08:00
6c15371695 EdkShellBinPkg: Remove EdkShellBinPkg
EdkShellBinPkg is removed.
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-11-19 10:51:00 +08:00
2840bb5104 Vlv2TbltDevicePkg: Remove EdkShellBinPkg with ShellPkg
Replace EdkShellBinPkg with ShellPkg in PlatformPkg.fdf,
PlatformPkgGcc.fdf, PlatformPkgGccX64.dsc,
PlatformPkgIA32.dsc and PlatformPkgX64.dsc.
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

Cc: David Wei <david.wei@intel.com>
Cc: zailiang sun <zailiang.sun@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
2018-11-19 10:50:25 +08:00
4b888334d2 OvmfPkg: Remove EdkShellBinPkg in FDF
Remove EdkShellBinPkg in OvmfPkgIa32.fdf,
OvmfPkg/OvmfPkgIa32X64.fdf amd OvmfPkg/OvmfPkgX64.fdf.
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

v2: Remove USE_OLD_SHELL in DSC and FDF because it will be
    unnecessary to use it.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2018-11-19 10:50:15 +08:00
f07afa3e26 Nt32Pkg: Remove EdkShellBinPkg in FDF and DEC
Remove EdkShellBinPkg in Nt32Pkg.dec and Nt32Pkg.fdf.
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

v2: Remove USE_OLD_SHELL because it will not be used.

v4:Remove PcdShellFile in Nt32Pkg.dsc.
https://bugzilla.tianocore.org/show_bug.cgi?id=1298

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-11-19 10:50:15 +08:00
cc5c08f9d6 EmulatorPkg: Remove EdkShellBinPkg in FDF and DEC
Remove EdkShellBinPkg in EmulatorPkg.dec and
EmulatorPkg.fdf.
https://bugzilla.tianocore.org/show_bug.cgi?id=1108

v2: Remove USE_OLD_SHELL because it will not be used.

v4: Remove PcdShellFile in EmulatorPkg.dsc.
https://bugzilla.tianocore.org/show_bug.cgi?id=1298

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Andrew Fish <afish@apple.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2018-11-19 10:50:15 +08:00
5a16ba3ae1 MdeModulePkg/SdDxe: Fix potential NULL pointer access
SdReadWrite can be called with a NULL Token for synchronous operations.
Add guard for DEBUG print to only print event pointer with Token is not
NULL.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
2018-11-19 09:09:05 +08:00
90fa59f685 EmulatorPkg/build.sh: Fix 'run' path to simulator host executable
Fixes: f89c018f3d "EmulatorPkg/Win: Enable 64bit (SEC, PEI, DXE all run at 64bit)"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pedroa Liu <pedroa.liu@outlook.com>
2018-11-18 16:31:24 -08:00
66127011a5 ArmPkg/ArmGicDxe ARM: fix encoding for GICv3 interrupt acknowledge
Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
the wrong system register encoding to access ICC_IAR1, and attempted
to access ICC_IAR0 instead. This results in boot time hangs both
under QEMU emulation and on real hardware.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-15 04:33:07 -08:00
9cabe9d457 MdePkg/BaseIoLibIntrinsicArmVirt ARM: avoid double word loads and stores
BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging
accesses to MMIO regions, resulting in instructions with multiple
output registers that KVM on ARM cannot emulate (since the exception
syndrome information that KVM relies on can only describe a single
output register)

However, using double word loads on ARM amounts to the same thing,
and so code that relies on doing 64-bit MMIO to regions that are
emulated under KVM (such as the GICv3 TYPER register) will still
suffer from the original issue.

So replace ldrd and strd with equivalent two instruction sequences.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-11-15 04:31:42 -08:00
688 changed files with 10703 additions and 86342 deletions

View File

@ -42,6 +42,7 @@
ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
ArmSvcLib|Include/Library/ArmSvcLib.h
OpteeLib|Include/Library/OpteeLib.h
StandaloneMmMmuLib|Include/Library/StandaloneMmMmuLib.h
[Guids.common]
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
@ -58,6 +59,7 @@
## Arm System Control and Management Interface(SCMI) Clock management protocol
## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }
gArmScmiClock2ProtocolGuid = { 0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } }
## Arm System Control and Management Interface(SCMI) Clock management protocol
## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
@ -79,10 +81,6 @@
# it has been configured by the CPU DXE
gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
# Define if the spin-table mechanism is used by the secondary cores when booting
# Linux (instead of PSCI)
gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
@ -172,16 +170,6 @@
# By default we do not do a transition to non-secure mode
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E
# The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory
gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020
# If the fixed FDT address is not available, then it should be loaded below the kernel.
# The recommendation from the Linux kernel is to have the FDT below 16KB.
# (see the kernel doc: Documentation/arm/Booting)
gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023
# The FDT blob must be loaded at a 64bit aligned address.
gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026
# Non Secure Access Control Register
# - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality
# - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31
@ -220,12 +208,6 @@
# Other modes include using SP0 or switching to Aarch32, but these are
# not currently supported.
gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E
# If the fixed FDT address is not available, then it should be loaded above the kernel.
# The recommendation from the AArch64 Linux kernel is to have the FDT below 512MB.
# (see the kernel doc: Documentation/arm64/booting.txt)
gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023
# The FDT blob must be loaded at a 2MB aligned address.
gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026
#
@ -240,6 +222,9 @@
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A
gArmTokenSpaceGuid.PcdMmBufferBase|0|UINT64|0x00000045
gArmTokenSpaceGuid.PcdMmBufferSize|0|UINT64|0x00000046
[PcdsFixedAtBuild.common, PcdsDynamic.common]
#
# ARM Architectural Timer

View File

@ -31,9 +31,6 @@
SKUID_IDENTIFIER = DEFAULT
[BuildOptions]
XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon
RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
*_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES
@ -152,3 +149,4 @@
[Components.AARCH64]
ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf
ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf

View File

@ -66,7 +66,7 @@ ASM_FUNC(ArmGicV3EndOfInterrupt)
// VOID
// );
ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
bx lr
//VOID

View File

@ -66,7 +66,7 @@
// VOID
// );
RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
bx lr
//VOID

View File

@ -59,6 +59,13 @@ typedef struct {
CLOCK_RATE_DWORD Rate;
} CLOCK_RATE_SET_ATTRIBUTES;
// Message parameters for CLOCK_CONFIG_SET command.
typedef struct {
UINT32 ClockId;
UINT32 Attributes;
} CLOCK_CONFIG_SET_ATTRIBUTES;
// if ClockAttr Bit[0] is set then clock device is enabled.
#define CLOCK_ENABLE_MASK 0x1
#define CLOCK_ENABLED(ClockAttr) ((ClockAttr & CLOCK_ENABLE_MASK) == 1)

View File

@ -46,6 +46,7 @@
[Protocols]
gArmScmiBaseProtocolGuid
gArmScmiClockProtocolGuid
gArmScmiClock2ProtocolGuid
gArmScmiPerformanceProtocolGuid
[Depex]

View File

@ -19,6 +19,7 @@
#include <Library/DebugLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Protocol/ArmScmiClockProtocol.h>
#include <Protocol/ArmScmiClock2Protocol.h>
#include "ArmScmiClockProtocolPrivate.h"
#include "ScmiPrivate.h"
@ -388,6 +389,53 @@ ClockRateSet (
return Status;
}
/** Enable/Disable specified clock.
@param[in] This A Pointer to SCMI_CLOCK_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[in] Enable TRUE to enable, FALSE to disable.
@retval EFI_SUCCESS Clock enable/disable successful.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
STATIC
EFI_STATUS
ClockEnable (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN BOOLEAN Enable
)
{
EFI_STATUS Status;
CLOCK_CONFIG_SET_ATTRIBUTES *ClockConfigSetAttributes;
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
if (EFI_ERROR (Status)) {
return Status;
}
// Fill arguments for clock protocol command.
ClockConfigSetAttributes->ClockId = ClockId;
ClockConfigSetAttributes->Attributes = Enable ? BIT0 : 0;
Cmd.ProtocolId = SCMI_PROTOCOL_ID_CLOCK;
Cmd.MessageId = SCMI_MESSAGE_ID_CLOCK_CONFIG_SET;
PayloadLength = sizeof (CLOCK_CONFIG_SET_ATTRIBUTES);
// Execute and wait for response on a SCMI channel.
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
NULL
);
return Status;
}
// Instance of the SCMI clock management protocol.
STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
ClockGetVersion,
@ -398,6 +446,18 @@ STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
ClockRateSet
};
// Instance of the SCMI clock management protocol.
STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
(SCMI_CLOCK2_GET_VERSION)ClockGetVersion,
(SCMI_CLOCK2_GET_TOTAL_CLOCKS)ClockGetTotalClocks,
(SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)ClockGetClockAttributes,
(SCMI_CLOCK2_DESCRIBE_RATES)ClockDescribeRates,
(SCMI_CLOCK2_RATE_GET)ClockRateGet,
(SCMI_CLOCK2_RATE_SET)ClockRateSet,
SCMI_CLOCK2_PROTOCOL_VERSION,
ClockEnable
};
/** Initialize clock management protocol and install protocol on a given handle.
@param[in] Handle Handle to install clock management protocol.
@ -413,6 +473,8 @@ ScmiClockProtocolInit (
Handle,
&gArmScmiClockProtocolGuid,
&ScmiClockProtocol,
&gArmScmiClock2ProtocolGuid,
&ScmiClock2Protocol,
NULL
);
}

View File

@ -457,6 +457,9 @@ GetMemoryRegion (
// Get the section at the given index
SectionDescriptor = FirstLevelTable[TableIndex];
if (!SectionDescriptor) {
return EFI_NOT_FOUND;
}
// If 'BaseAddress' belongs to the section then round it to the section boundary
if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||

View File

@ -73,7 +73,7 @@ InitializeCpuPeim (
ArmEnableBranchPrediction ();
// Publish the CPU memory and io spaces sizes
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);

View File

@ -50,7 +50,6 @@
gArmMpCoreInfoGuid
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
[Depex]

View File

@ -34,15 +34,17 @@
#define TIME_UNITS_PER_SECOND 10000000
// Tick frequency of the generic timer basis of the generic watchdog.
UINTN mTimerFrequencyHz = 0;
STATIC UINTN mTimerFrequencyHz = 0;
/* In cases where the compare register was set manually, information about
how long the watchdog was asked to wait cannot be retrieved from hardware.
It is therefore stored here. 0 means the timer is not running. */
UINT64 mNumTimerTicks = 0;
STATIC UINT64 mNumTimerTicks = 0;
EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol;
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
STATIC
VOID
WatchdogWriteOffsetRegister (
UINT32 Value
@ -51,6 +53,7 @@ WatchdogWriteOffsetRegister (
MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value);
}
STATIC
VOID
WatchdogWriteCompareRegister (
UINT64 Value
@ -60,6 +63,7 @@ WatchdogWriteCompareRegister (
MmioWrite32 (GENERIC_WDOG_COMPARE_VALUE_REG_HIGH, (Value >> 32) & MAX_UINT32);
}
STATIC
VOID
WatchdogEnable (
VOID
@ -68,6 +72,7 @@ WatchdogEnable (
MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED);
}
STATIC
VOID
WatchdogDisable (
VOID
@ -79,6 +84,7 @@ WatchdogDisable (
/** On exiting boot services we must make sure the Watchdog Timer
is stopped.
**/
STATIC
VOID
EFIAPI
WatchdogExitBootServicesEvent (
@ -93,6 +99,7 @@ WatchdogExitBootServicesEvent (
/* This function is called when the watchdog's first signal (WS0) goes high.
It uses the ResetSystem Runtime Service to reset the board.
*/
STATIC
VOID
EFIAPI
WatchdogInterruptHandler (
@ -101,17 +108,25 @@ WatchdogInterruptHandler (
)
{
STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
UINT64 TimerPeriod;
WatchdogDisable ();
mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source);
gRT->ResetSystem (
EfiResetCold,
EFI_TIMEOUT,
StrSize (ResetString),
(VOID *) &ResetString
);
//
// The notify function should be called with the elapsed number of ticks
// since the watchdog was armed, which should exceed the timer period.
// We don't actually know the elapsed number of ticks, so let's return
// the timer period plus 1.
//
if (mWatchdogNotify != NULL) {
TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks);
mWatchdogNotify (TimerPeriod + 1);
}
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
(CHAR16 *)ResetString);
// If we got here then the reset didn't work
ASSERT (FALSE);
@ -141,16 +156,24 @@ WatchdogInterruptHandler (
@retval EFI_UNSUPPORTED The code does not support NotifyFunction.
**/
STATIC
EFI_STATUS
EFIAPI
WatchdogRegisterHandler (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
// ERROR: This function is not supported.
// The watchdog will reset the board
return EFI_UNSUPPORTED;
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
return EFI_INVALID_PARAMETER;
}
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
return EFI_ALREADY_STARTED;
}
mWatchdogNotify = NotifyFunction;
return EFI_SUCCESS;
}
/**
@ -167,10 +190,11 @@ WatchdogRegisterHandler (
in TimerPeriod 100ns units.
**/
STATIC
EFI_STATUS
EFIAPI
WatchdogSetTimerPeriod (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
@ -222,10 +246,11 @@ WatchdogSetTimerPeriod (
@retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
**/
STATIC
EFI_STATUS
EFIAPI
WatchdogGetTimerPeriod (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
@ -270,13 +295,13 @@ WatchdogGetTimerPeriod (
Retrieves the period of the timer interrupt in 100ns units.
**/
EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {
(EFI_WATCHDOG_TIMER_REGISTER_HANDLER)WatchdogRegisterHandler,
(EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD)WatchdogSetTimerPeriod,
(EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD)WatchdogGetTimerPeriod
STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
WatchdogRegisterHandler,
WatchdogSetTimerPeriod,
WatchdogGetTimerPeriod
};
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
STATIC EFI_EVENT mEfiExitBootServicesEvent;
EFI_STATUS
EFIAPI
@ -288,6 +313,10 @@ GenericWatchdogEntry (
EFI_STATUS Status;
EFI_HANDLE Handle;
Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
(VOID **)&mInterruptProtocol);
ASSERT_EFI_ERROR (Status);
/* Make sure the Watchdog Timer Architectural Protocol has not been installed
in the system yet.
This will avoid conflicts with the universal watchdog */
@ -296,51 +325,45 @@ GenericWatchdogEntry (
mTimerFrequencyHz = ArmGenericTimerGetTimerFreq ();
ASSERT (mTimerFrequencyHz != 0);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_NOTIFY,
WatchdogExitBootServicesEvent,
NULL,
&EfiExitBootServicesEvent
);
if (!EFI_ERROR (Status)) {
// Install interrupt handler
Status = gBS->LocateProtocol (
&gHardwareInterrupt2ProtocolGuid,
NULL,
(VOID **)&mInterruptProtocol
);
if (!EFI_ERROR (Status)) {
Status = mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
WatchdogInterruptHandler
);
if (!EFI_ERROR (Status)) {
Status = mInterruptProtocol->SetTriggerType (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING
);
if (!EFI_ERROR (Status)) {
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid,
&gWatchdogTimer,
NULL
);
}
}
}
WatchdogInterruptHandler);
if (EFI_ERROR (Status)) {
return Status;
}
Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
NULL);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
WatchdogExitBootServicesEvent, NULL,
&mEfiExitBootServicesEvent);
ASSERT_EFI_ERROR (Status);
mNumTimerTicks = 0;
WatchdogDisable ();
return EFI_SUCCESS;
UnregisterHandler:
// Unregister the handler
mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
NULL);
return Status;
}

View File

@ -16,17 +16,16 @@
FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = GenericWatchdogEntry
[Sources.common]
GenericWatchdogDxe.c
[Packages]
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
ArmGenericTimerCounterLib
@ -46,8 +45,8 @@
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
[Protocols]
gEfiWatchdogTimerArchProtocolGuid
gHardwareInterrupt2ProtocolGuid
gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
gHardwareInterrupt2ProtocolGuid ## ALWAYS_CONSUMES
[Depex]
gHardwareInterrupt2ProtocolGuid

View File

@ -0,0 +1,28 @@
/** @file
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#if !defined _MM_COMMUNICATE_H_
#define _MM_COMMUNICATE_H_
#define MM_MAJOR_VER_MASK 0xEFFF0000
#define MM_MINOR_VER_MASK 0x0000FFFF
#define MM_MAJOR_VER_SHIFT 16
#define MM_MAJOR_VER(x) (((x) & MM_MAJOR_VER_MASK) >> MM_MAJOR_VER_SHIFT)
#define MM_MINOR_VER(x) ((x) & MM_MINOR_VER_MASK)
#define MM_CALLER_MAJOR_VER 0x1UL
#define MM_CALLER_MINOR_VER 0x0
#endif /* _MM_COMMUNICATE_H_ */

View File

@ -0,0 +1,372 @@
/** @file
Copyright (c) 2016-2018, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/ArmLib.h>
#include <Library/ArmSmcLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/DxeServicesTableLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Protocol/MmCommunication.h>
#include <IndustryStandard/ArmStdSmc.h>
#include "MmCommunicate.h"
//
// Address, Length of the pre-allocated buffer for communication with the secure
// world.
//
STATIC ARM_MEMORY_REGION_DESCRIPTOR mNsCommBuffMemRegion;
// Notification event when virtual address map is set.
STATIC EFI_EVENT mSetVirtualAddressMapEvent;
//
// Handle to install the MM Communication Protocol
//
STATIC EFI_HANDLE mMmCommunicateHandle;
/**
Communicates with a registered handler.
This function provides an interface to send and receive messages to the
Standalone MM environment on behalf of UEFI services. This function is part
of the MM Communication Protocol that may be called in physical mode prior to
SetVirtualAddressMap() and in virtual mode after SetVirtualAddressMap().
@param[in] This The EFI_MM_COMMUNICATION_PROTOCOL
instance.
@param[in, out] CommBuffer A pointer to the buffer to convey
into MMRAM.
@param[in, out] CommSize The size of the data buffer being
passed in. This is optional.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER The CommBuffer was NULL.
@retval EFI_BAD_BUFFER_SIZE The buffer size is incorrect for the MM
implementation. If this error is
returned, the MessageLength field in
the CommBuffer header or the integer
pointed by CommSize are updated to reflect
the maximum payload size the
implementation can accommodate.
@retval EFI_ACCESS_DENIED The CommunicateBuffer parameter
or CommSize parameter, if not omitted,
are in address range that cannot be
accessed by the MM environment
**/
STATIC
EFI_STATUS
EFIAPI
MmCommunicationCommunicate (
IN CONST EFI_MM_COMMUNICATION_PROTOCOL *This,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommSize OPTIONAL
)
{
EFI_MM_COMMUNICATE_HEADER *CommunicateHeader;
ARM_SMC_ARGS CommunicateSmcArgs;
EFI_STATUS Status;
UINTN BufferSize;
Status = EFI_ACCESS_DENIED;
BufferSize = 0;
ZeroMem (&CommunicateSmcArgs, sizeof (ARM_SMC_ARGS));
//
// Check parameters
//
if (CommBuffer == NULL) {
return EFI_INVALID_PARAMETER;
}
CommunicateHeader = CommBuffer;
// CommBuffer is a mandatory parameter. Hence, Rely on
// MessageLength + Header to ascertain the
// total size of the communication payload rather than
// rely on optional CommSize parameter
BufferSize = CommunicateHeader->MessageLength +
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
// If the length of the CommBuffer is 0 then return the expected length.
if (CommSize) {
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) ||
(*CommSize > mNsCommBuffMemRegion.Length)) {
*CommSize = mNsCommBuffMemRegion.Length;
return EFI_BAD_BUFFER_SIZE;
}
//
// CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
//
if (*CommSize != BufferSize) {
return EFI_INVALID_PARAMETER;
}
}
//
// If the buffer size is 0 or greater than what can be tolerated by the MM
// environment then return the expected size.
//
if ((BufferSize == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length)) {
CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
sizeof (CommunicateHeader->HeaderGuid) -
sizeof (CommunicateHeader->MessageLength);
return EFI_BAD_BUFFER_SIZE;
}
// SMC Function ID
CommunicateSmcArgs.Arg0 = ARM_SMC_ID_MM_COMMUNICATE_AARCH64;
// Cookie
CommunicateSmcArgs.Arg1 = 0;
// Copy Communication Payload
CopyMem ((VOID *)mNsCommBuffMemRegion.VirtualBase, CommBuffer, BufferSize);
// comm_buffer_address (64-bit physical address)
CommunicateSmcArgs.Arg2 = (UINTN)mNsCommBuffMemRegion.PhysicalBase;
// comm_size_address (not used, indicated by setting to zero)
CommunicateSmcArgs.Arg3 = 0;
// Call the Standalone MM environment.
ArmCallSmc (&CommunicateSmcArgs);
switch (CommunicateSmcArgs.Arg0) {
case ARM_SMC_MM_RET_SUCCESS:
ZeroMem (CommBuffer, BufferSize);
// On successful return, the size of data being returned is inferred from
// MessageLength + Header.
CommunicateHeader = (EFI_MM_COMMUNICATE_HEADER *)mNsCommBuffMemRegion.VirtualBase;
BufferSize = CommunicateHeader->MessageLength +
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
CopyMem (
CommBuffer,
(VOID *)mNsCommBuffMemRegion.VirtualBase,
BufferSize
);
Status = EFI_SUCCESS;
break;
case ARM_SMC_MM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SMC_MM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SMC_MM_RET_NO_MEMORY:
// Unexpected error since the CommSize was checked for zero length
// prior to issuing the SMC
Status = EFI_OUT_OF_RESOURCES;
ASSERT (0);
break;
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
}
return Status;
}
//
// MM Communication Protocol instance
//
EFI_MM_COMMUNICATION_PROTOCOL mMmCommunication = {
MmCommunicationCommunicate
};
/**
Notification callback on SetVirtualAddressMap event.
This function notifies the MM communication protocol interface on
SetVirtualAddressMap event and converts pointers used in this driver
from physical to virtual address.
@param Event SetVirtualAddressMap event.
@param Context A context when the SetVirtualAddressMap triggered.
@retval EFI_SUCCESS The function executed successfully.
@retval Other Some error occurred when executing this function.
**/
STATIC
VOID
EFIAPI
NotifySetVirtualAddressMap (
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
Status = gRT->ConvertPointer (
EFI_OPTIONAL_PTR,
(VOID **)&mNsCommBuffMemRegion.VirtualBase
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n", Status));
}
}
STATIC
EFI_STATUS
GetMmCompatibility ()
{
EFI_STATUS Status;
UINT32 MmVersion;
ARM_SMC_ARGS MmVersionArgs;
// MM_VERSION uses SMC32 calling conventions
MmVersionArgs.Arg0 = ARM_SMC_ID_MM_VERSION_AARCH32;
ArmCallSmc (&MmVersionArgs);
MmVersion = MmVersionArgs.Arg0;
if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
Status = EFI_SUCCESS;
} else {
DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
Status = EFI_UNSUPPORTED;
}
return Status;
}
/**
The Entry Point for MM Communication
This function installs the MM communication protocol interface and finds out
what type of buffer management will be required prior to invoking the
communication SMC.
@param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The entry point is executed successfully.
@retval Other Some error occurred when executing this entry point.
**/
EFI_STATUS
EFIAPI
MmCommunicationInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
// Check if we can make the MM call
Status = GetMmCompatibility ();
if (EFI_ERROR(Status)) {
goto ReturnErrorStatus;
}
mNsCommBuffMemRegion.PhysicalBase = PcdGet64 (PcdMmBufferBase);
// During boot , Virtual and Physical are same
mNsCommBuffMemRegion.VirtualBase = mNsCommBuffMemRegion.PhysicalBase;
mNsCommBuffMemRegion.Length = PcdGet64 (PcdMmBufferSize);
ASSERT (mNsCommBuffMemRegion.PhysicalBase != 0);
ASSERT (mNsCommBuffMemRegion.Length != 0);
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeReserved,
mNsCommBuffMemRegion.PhysicalBase,
mNsCommBuffMemRegion.Length,
EFI_MEMORY_WB |
EFI_MEMORY_XP |
EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"));
goto ReturnErrorStatus;
}
Status = gDS->SetMemorySpaceAttributes (
mNsCommBuffMemRegion.PhysicalBase,
mNsCommBuffMemRegion.Length,
EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"));
goto CleanAddedMemorySpace;
}
// Install the communication protocol
Status = gBS->InstallProtocolInterface (
&mMmCommunicateHandle,
&gEfiMmCommunicationProtocolGuid,
EFI_NATIVE_INTERFACE,
&mMmCommunication
);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"));
goto CleanAddedMemorySpace;
}
// Register notification callback when virtual address is associated
// with the physical address.
// Create a Set Virtual Address Map event.
Status = gBS->CreateEvent (
EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE,
TPL_NOTIFY,
NotifySetVirtualAddressMap,
NULL,
&mSetVirtualAddressMapEvent
);
if (Status == EFI_SUCCESS) {
return Status;
}
gBS->UninstallProtocolInterface (
mMmCommunicateHandle,
&gEfiMmCommunicationProtocolGuid,
&mMmCommunication
);
CleanAddedMemorySpace:
gDS->RemoveMemorySpace (
mNsCommBuffMemRegion.PhysicalBase,
mNsCommBuffMemRegion.Length
);
ReturnErrorStatus:
return EFI_INVALID_PARAMETER;
}

View File

@ -0,0 +1,56 @@
#/** @file
#
# DXE MM Communicate driver
#
# Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#**/
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = ArmMmCommunication
FILE_GUID = 09EE81D3-F15E-43F4-85B4-CB9873DA5D6B
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = MmCommunicationInitialize
#
# The following is for reference only and not required by
# build tools
#
# VALID_ARCHITECTURES = AARCH64
#
[Sources.AARCH64]
MmCommunication.c
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
ArmLib
ArmSmcLib
BaseMemoryLib
DebugLib
DxeServicesTableLib
HobLib
UefiDriverEntryPoint
[Protocols]
gEfiMmCommunicationProtocolGuid ## PRODUCES
[Pcd.common]
gArmTokenSpaceGuid.PcdMmBufferBase
gArmTokenSpaceGuid.PcdMmBufferSize
[Depex]
gEfiCpuArchProtocolGuid

View File

@ -20,7 +20,7 @@
* delegated events and request the Secure partition manager to perform
* privileged operations on its behalf.
*/
#define ARM_SVC_ID_SPM_VERSION_AARCH64 0xC4000060
#define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060
#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061
#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064
#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065
@ -40,4 +40,11 @@
((((c_perm) & SET_MEM_ATTR_CODE_PERM_MASK) << SET_MEM_ATTR_CODE_PERM_SHIFT) | \
(( (d_perm) & SET_MEM_ATTR_DATA_PERM_MASK) << SET_MEM_ATTR_DATA_PERM_SHIFT))
/* MM SVC Return error codes */
#define ARM_SVC_SPM_RET_SUCCESS 0
#define ARM_SVC_SPM_RET_NOT_SUPPORTED -1
#define ARM_SVC_SPM_RET_INVALID_PARAMS -2
#define ARM_SVC_SPM_RET_DENIED -3
#define ARM_SVC_SPM_RET_NO_MEMORY -5
#endif

View File

@ -733,4 +733,10 @@ ArmWriteCntvOff (
UINT64 Val
);
UINTN
EFIAPI
ArmGetPhysicalAddressBits (
VOID
);
#endif // __ARM_LIB__

View File

@ -1,212 +0,0 @@
/** @file
*
* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#ifndef __BDS_ENTRY_H__
#define __BDS_ENTRY_H__
#define IS_DEVICE_PATH_NODE(node,type,subtype) \
(((node)->Type == (type)) && ((node)->SubType == (subtype)))
/**
This is defined by the UEFI specs, don't change it
**/
typedef struct {
UINT16 LoadOptionIndex;
EFI_LOAD_OPTION *LoadOption;
UINTN LoadOptionSize;
UINT32 Attributes;
UINT16 FilePathListLength;
CHAR16 *Description;
EFI_DEVICE_PATH_PROTOCOL *FilePathList;
VOID* OptionalData;
UINTN OptionalDataSize;
} BDS_LOAD_OPTION;
/**
Connect a Device Path and return the handle of the driver that support this DevicePath
@param DevicePath Device Path of the File to connect
@param Handle Handle of the driver that support this DevicePath
@param RemainingDevicePath Remaining DevicePath nodes that do not match the driver DevicePath
@retval EFI_SUCCESS A driver that matches the Device Path has been found
@retval EFI_NOT_FOUND No handles match the search.
@retval EFI_INVALID_PARAMETER DevicePath or Handle is NULL
**/
EFI_STATUS
BdsConnectDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL* DevicePath,
OUT EFI_HANDLE *Handle,
OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath
);
/**
Connect all DXE drivers
@retval EFI_SUCCESS All drivers have been connected
@retval EFI_NOT_FOUND No handles match the search.
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
**/
EFI_STATUS
BdsConnectAllDrivers (
VOID
);
/**
Return the value of a global variable defined by its VariableName.
The variable must be defined with the VendorGuid gEfiGlobalVariableGuid.
@param VariableName A Null-terminated string that is the name of the vendor's
variable.
@param DefaultValue Value returned by the function if the variable does not exist
@param DataSize On input, the size in bytes of the return Data buffer.
On output the size of data returned in Data.
@param Value Value read from the UEFI Variable or copy of the default value
if the UEFI Variable does not exist
@retval EFI_SUCCESS All drivers have been connected
@retval EFI_NOT_FOUND No handles match the search.
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
**/
EFI_STATUS
GetGlobalEnvironmentVariable (
IN CONST CHAR16* VariableName,
IN VOID* DefaultValue,
IN OUT UINTN* Size,
OUT VOID** Value
);
/**
Return the value of the variable defined by its VariableName and VendorGuid
@param VariableName A Null-terminated string that is the name of the vendor's
variable.
@param VendorGuid A unique identifier for the vendor.
@param DefaultValue Value returned by the function if the variable does not exist
@param DataSize On input, the size in bytes of the return Data buffer.
On output the size of data returned in Data.
@param Value Value read from the UEFI Variable or copy of the default value
if the UEFI Variable does not exist
@retval EFI_SUCCESS All drivers have been connected
@retval EFI_NOT_FOUND No handles match the search.
@retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results.
**/
EFI_STATUS
GetEnvironmentVariable (
IN CONST CHAR16* VariableName,
IN EFI_GUID* VendorGuid,
IN VOID* DefaultValue,
IN OUT UINTN* Size,
OUT VOID** Value
);
EFI_STATUS
BootOptionFromLoadOptionIndex (
IN UINT16 LoadOptionIndex,
OUT BDS_LOAD_OPTION** BdsLoadOption
);
EFI_STATUS
BootOptionFromLoadOptionVariable (
IN CHAR16* BootVariableName,
OUT BDS_LOAD_OPTION** BdsLoadOption
);
EFI_STATUS
BootOptionToLoadOptionVariable (
IN BDS_LOAD_OPTION* BdsLoadOption
);
UINT16
BootOptionAllocateBootIndex (
VOID
);
/**
Start an EFI Application from a Device Path
@param ParentImageHandle Handle of the calling image
@param DevicePath Location of the EFI Application
@retval EFI_SUCCESS All drivers have been connected
@retval EFI_NOT_FOUND The Linux kernel Device Path has not been found
@retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results.
**/
EFI_STATUS
BdsStartEfiApplication (
IN EFI_HANDLE ParentImageHandle,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
IN UINTN LoadOptionsSize,
IN VOID* LoadOptions
);
EFI_STATUS
BdsLoadImage (
IN EFI_DEVICE_PATH *DevicePath,
IN EFI_ALLOCATE_TYPE Type,
IN OUT EFI_PHYSICAL_ADDRESS* Image,
OUT UINTN *FileSize
);
/**
* Call BS.ExitBootServices with the appropriate Memory Map information
*/
EFI_STATUS
ShutdownUefiBootServices (
VOID
);
/**
Locate an EFI application in a the Firmware Volumes by its name
@param EfiAppGuid Guid of the EFI Application into the Firmware Volume
@param DevicePath EFI Device Path of the EFI application
@return EFI_SUCCESS The function completed successfully.
@return EFI_NOT_FOUND The protocol could not be located.
@return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
**/
EFI_STATUS
LocateEfiApplicationInFvByName (
IN CONST CHAR16* EfiAppName,
OUT EFI_DEVICE_PATH **DevicePath
);
/**
Locate an EFI application in a the Firmware Volumes by its GUID
@param EfiAppGuid Guid of the EFI Application into the Firmware Volume
@param DevicePath EFI Device Path of the EFI application
@return EFI_SUCCESS The function completed successfully.
@return EFI_NOT_FOUND The protocol could not be located.
@return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol.
**/
EFI_STATUS
LocateEfiApplicationInFvByGuid (
IN CONST EFI_GUID *EfiAppGuid,
OUT EFI_DEVICE_PATH **DevicePath
);
#endif

View File

@ -35,6 +35,7 @@
#define OPTEE_MESSAGE_ATTRIBUTE_TYPE_MASK 0xff
#define OPTEE_SUCCESS 0x00000000
#define OPTEE_ORIGIN_COMMUNICATION 0x00000002
#define OPTEE_ERROR_COMMUNICATION 0xFFFF000E

View File

@ -0,0 +1,42 @@
/** @file
Copyright (c) 2018, ARM Ltd. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __STANDALONEMM_MMU_LIB__
#define __STANDALONEMM_MMU_LIB__
EFI_STATUS
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
EFI_STATUS
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
#endif /* __STANDALONEMM_MMU_LIB__ */

View File

@ -0,0 +1,197 @@
/** @file
Copyright (c) 2017-2018, Arm Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
System Control and Management Interface V1.0
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef ARM_SCMI_CLOCK2_PROTOCOL_H_
#define ARM_SCMI_CLOCK2_PROTOCOL_H_
#include <Protocol/ArmScmi.h>
#include <Protocol/ArmScmiClockProtocol.h>
#define ARM_SCMI_CLOCK2_PROTOCOL_GUID { \
0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } \
}
extern EFI_GUID gArmScmiClock2ProtocolGuid;
#define SCMI_CLOCK2_PROTOCOL_VERSION 1
typedef struct _SCMI_CLOCK2_PROTOCOL SCMI_CLOCK2_PROTOCOL;
// Protocol Interface functions.
/** Return version of the clock management protocol supported by SCP firmware.
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[out] Version Version of the supported SCMI Clock management protocol.
@retval EFI_SUCCESS The version is returned.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_VERSION) (
IN SCMI_CLOCK2_PROTOCOL *This,
OUT UINT32 *Version
);
/** Return total number of clock devices supported by the clock management
protocol.
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[out] TotalClocks Total number of clocks supported.
@retval EFI_SUCCESS Total number of clocks supported is returned.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS) (
IN SCMI_CLOCK2_PROTOCOL *This,
OUT UINT32 *TotalClocks
);
/** Return attributes of a clock device.
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[out] Enabled If TRUE, the clock device is enabled.
@param[out] ClockAsciiName A NULL terminated ASCII string with the clock
name, of up to 16 bytes.
@retval EFI_SUCCESS Clock device attributes are returned.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES) (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT BOOLEAN *Enabled,
OUT CHAR8 *ClockAsciiName
);
/** Return list of rates supported by a given clock device.
@param[in] This A pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[out] Format SCMI_CLOCK_RATE_FORMAT_DISCRETE: Clock device
supports range of clock rates which are non-linear.
SCMI_CLOCK_RATE_FORMAT_LINEAR: Clock device supports
range of linear clock rates from Min to Max in steps.
@param[out] TotalRates Total number of rates.
@param[in,out] RateArraySize Size of the RateArray.
@param[out] RateArray List of clock rates.
@retval EFI_SUCCESS List of clock rates are returned.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval EFI_BUFFER_TOO_SMALL RateArraySize is too small for the result.
It has been updated to the size needed.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES) (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT SCMI_CLOCK_RATE_FORMAT *Format,
OUT UINT32 *TotalRates,
IN OUT UINT32 *RateArraySize,
OUT SCMI_CLOCK_RATE *RateArray
);
/** Get clock rate.
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[out] Rate Clock rate.
@retval EFI_SUCCESS Clock rate is returned.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_RATE_GET) (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT UINT64 *Rate
);
/** Set clock rate.
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[in] Rate Clock rate.
@retval EFI_SUCCESS Clock rate set success.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_RATE_SET) (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN UINT64 Rate
);
/** Enable/Disable specified clock.
Function is only available under gArmScmiClock2ProtocolGuid
@param[in] This A Pointer to SCMI_CLOCK2_PROTOCOL Instance.
@param[in] ClockId Identifier for the clock device.
@param[in] Enable TRUE to enable, FALSE to disable.
@retval EFI_SUCCESS Clock enable/disable successful.
@retval EFI_DEVICE_ERROR SCP returns an SCMI error.
@retval !(EFI_SUCCESS) Other errors.
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_ENABLE) (
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN BOOLEAN Enable
);
typedef struct _SCMI_CLOCK2_PROTOCOL {
SCMI_CLOCK2_GET_VERSION GetVersion;
SCMI_CLOCK2_GET_TOTAL_CLOCKS GetTotalClocks;
SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES GetClockAttributes;
SCMI_CLOCK2_DESCRIBE_RATES DescribeRates;
SCMI_CLOCK2_RATE_GET RateGet;
SCMI_CLOCK2_RATE_SET RateSet;
// Extension to original ClockProtocol, added here so SCMI_CLOCK2_PROTOCOL
// can be cast to SCMI_CLOCK_PROTOCOL
UINTN Version; // For future expandability
SCMI_CLOCK2_ENABLE Enable;
} SCMI_CLOCK2_PROTOCOL;
#endif /* ARM_SCMI_CLOCK2_PROTOCOL_H_ */

View File

@ -196,4 +196,21 @@ ASM_FUNC(ArmWriteSctlr)
3:msr sctlr_el3, x0
4:ret
ASM_FUNC(ArmGetPhysicalAddressBits)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #0xf
ldrb w0, [x1, x0]
ret
//
// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 7 and up are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, 52, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr)
isb
bx lr
ASM_FUNC (ArmGetPhysicalAddressBits)
mrc p15, 0, r0, c0, c1, 4 // MMFR0
and r0, r0, #0xf // VMSA [3:0]
cmp r0, #5 // >= 5 implies LPAE support
movlt r0, #32 // 32 bits if no LPAE
movge r0, #40 // 40 bits if LPAE
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -169,4 +169,12 @@
isb
bx lr
RVCT_ASM_EXPORT ArmGetPhysicalAddressBits
mrc p15, 0, r0, c0, c1, 4 ; MMFR0
and r0, r0, #0xf ; VMSA [3:0]
cmp r0, #5 ; >= 5 implies LPAE support
movlt r0, #32 ; 32 bits if no LPAE
movge r0, #40 ; 40 bits if LPAE
bx lr
END

View File

@ -604,8 +604,15 @@ ArmConfigureMmu (
return EFI_INVALID_PARAMETER;
}
// Cover the entire GCD memory space
MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1;
//
// Limit the virtual address space to what we can actually use: UEFI
// mandates a 1:1 mapping, so no point in making the virtual address
// space larger than the physical address space. We also have to take
// into account the architectural limitations that result from UEFI's
// use of 4 KB pages.
//
MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1,
MAX_ALLOC_ADDRESS);
// Lookup the Table Level to get the information
LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount);

View File

@ -695,8 +695,12 @@ UpdateSectionEntries (
} else {
// still a section entry
if (CurrentDescriptor != 0) {
// mask off appropriate fields
Descriptor = CurrentDescriptor & ~EntryMask;
} else {
Descriptor = ((UINTN)FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT;
}
// mask in new attributes and/or permissions
Descriptor |= EntryValue;

View File

@ -40,8 +40,5 @@
CacheMaintenanceLib
MemoryAllocationLib
[Pcd.AARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
[Pcd.ARM]
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride

View File

@ -35,6 +35,3 @@
ArmLib
CacheMaintenanceLib
MemoryAllocationLib
[Pcd.AARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize

View File

@ -0,0 +1,30 @@
/** @file
ResetSystemLib implementation using PSCI calls
Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <AsmMacroIoLibV8.h>
ASM_FUNC(DisableMmuAndReenterPei)
stp x29, x30, [sp, #-16]!
mov x29, sp
bl ArmDisableMmu
// no memory accesses after MMU and caches have been disabled
MOV64 (x0, FixedPcdGet64 (PcdFvBaseAddress))
blr x0
// never returns
nop

View File

@ -0,0 +1,35 @@
;/** @file
; ResetSystemLib implementation using PSCI calls
;
; Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;**/
AREA Reset, CODE, READONLY
EXPORT DisableMmuAndReenterPei
IMPORT ArmDisableMmu
DisableMmuAndReenterPei
stp x29, x30, [sp, #-16]!
mov x29, sp
bl ArmDisableMmu
; no memory accesses after MMU and caches have been disabled
movl x0, FixedPcdGet64 (PcdFvBaseAddress)
blr x0
; never returns
nop
END

View File

@ -0,0 +1,29 @@
/** @file
ResetSystemLib implementation using PSCI calls
Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <AsmMacroIoLib.h>
ASM_FUNC(DisableMmuAndReenterPei)
push {lr}
bl ArmDisableMmu
// no memory accesses after MMU and caches have been disabled
MOV32 (r0, FixedPcdGet64 (PcdFvBaseAddress))
blx r0
// never returns
nop

View File

@ -0,0 +1,34 @@
;/** @file
; ResetSystemLib implementation using PSCI calls
;
; Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;**/
INCLUDE AsmMacroExport.inc
PRESERVE8
IMPORT ArmDisableMmu
RVCT_ASM_EXPORT DisableMmuAndReenterPei
push {lr}
bl ArmDisableMmu
; no memory accesses after MMU and caches have been disabled
mov32 r0, FixedPcdGet64 (PcdFvBaseAddress)
blx r0
; never returns
nop
END

View File

@ -1,7 +1,7 @@
/** @file
ResetSystemLib implementation using PSCI calls
Copyright (c) 2017, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -81,6 +81,8 @@ ResetShutdown (
ArmCallSmc (&ArmSmcArgs);
}
VOID DisableMmuAndReenterPei (VOID);
/**
This function causes the system to enter S3 and then wake up immediately.
@ -92,7 +94,12 @@ EnterS3WithImmediateWake (
VOID
)
{
VOID (*Reset)(VOID);
EFI_PHYSICAL_ADDRESS Alloc;
EFI_MEMORY_DESCRIPTOR *MemMap;
UINTN MemMapSize;
UINTN MapKey, DescriptorSize;
UINT32 DescriptorVersion;
EFI_STATUS Status;
if (FeaturePcdGet (PcdArmReenterPeiForCapsuleWarmReboot) &&
!EfiAtRuntime ()) {
@ -101,11 +108,49 @@ EnterS3WithImmediateWake (
// immediate wake (which is used by capsule update) by disabling the MMU
// and interrupts, and jumping to the PEI entry point.
//
Reset = (VOID (*)(VOID))(UINTN)FixedPcdGet64 (PcdFvBaseAddress);
gBS->RaiseTPL (TPL_HIGH_LEVEL);
ArmDisableMmu ();
Reset ();
//
// Obtain the size of the memory map
//
MemMapSize = 0;
MemMap = NULL;
Status = gBS->GetMemoryMap (&MemMapSize, MemMap, &MapKey, &DescriptorSize,
&DescriptorVersion);
ASSERT (Status == EFI_BUFFER_TOO_SMALL);
//
// Add some slack to the allocation to cater for changes in the memory
// map if ExitBootServices () fails the first time around.
//
MemMapSize += SIZE_4KB;
Status = gBS->AllocatePages (AllocateAnyPages, EfiBootServicesData,
EFI_SIZE_TO_PAGES (MemMapSize), &Alloc);
ASSERT_EFI_ERROR (Status);
MemMap = (EFI_MEMORY_DESCRIPTOR *)(UINTN)Alloc;
Status = gBS->GetMemoryMap (&MemMapSize, MemMap, &MapKey, &DescriptorSize,
&DescriptorVersion);
ASSERT_EFI_ERROR (Status);
Status = gBS->ExitBootServices (gImageHandle, MapKey);
if (EFI_ERROR (Status)) {
//
// ExitBootServices () may fail the first time around if an event fired
// right after the call to GetMemoryMap() which allocated or freed memory.
// Since that first call to ExitBootServices () will disarm the timer,
// this is guaranteed not to happen again, so one additional attempt
// should suffice.
//
Status = gBS->GetMemoryMap (&MemMapSize, MemMap, &MapKey, &DescriptorSize,
&DescriptorVersion);
ASSERT_EFI_ERROR (Status);
Status = gBS->ExitBootServices (gImageHandle, MapKey);
ASSERT_EFI_ERROR (Status);
}
DisableMmuAndReenterPei ();
}
}

View File

@ -21,6 +21,14 @@
VERSION_STRING = 1.0
LIBRARY_CLASS = ResetSystemLib
[Sources.AARCH64]
AArch64/Reset.S | GCC
AArch64/Reset.asm | MSFT
[Sources.ARM]
Arm/Reset.S | GCC
Arm/Reset.asm | RVCT
[Sources]
ArmSmcPsciResetSystemLib.c

View File

@ -267,6 +267,8 @@ DefaultExceptionHandler (
DEBUG ((EFI_D_ERROR, "\n"));
ASSERT (FALSE);
CpuDeadLoop (); // may return if executing under a debugger
// Clear the error registers that we have already displayed incase some one wants to keep going
SystemContext.SystemContextArm->DFSR = 0;
SystemContext.SystemContextArm->IFSR = 0;

View File

@ -123,6 +123,17 @@ OpteeInit (
return EFI_SUCCESS;
}
STATIC
BOOLEAN
IsOpteeSmcReturnRpc (
UINT32 Return
)
{
return (Return != OPTEE_SMC_RETURN_UNKNOWN_FUNCTION) &&
((Return & OPTEE_SMC_RETURN_RPC_PREFIX_MASK) ==
OPTEE_SMC_RETURN_RPC_PREFIX);
}
/**
Does Standard SMC to OP-TEE in secure world.
@ -147,13 +158,22 @@ OpteeCallWithArg (
while (TRUE) {
ArmCallSmc (&ArmSmcArgs);
if (ArmSmcArgs.Arg0 == OPTEE_SMC_RETURN_RPC_FOREIGN_INTERRUPT) {
if (IsOpteeSmcReturnRpc (ArmSmcArgs.Arg0)) {
switch (ArmSmcArgs.Arg0) {
case OPTEE_SMC_RETURN_RPC_FOREIGN_INTERRUPT:
//
// A foreign interrupt was raised while secure world was
// executing, since they are handled in UEFI a dummy RPC is
// performed to let UEFI take the interrupt through the normal
// vector.
//
break;
default:
// Do nothing in case RPC is not implemented.
break;
}
ArmSmcArgs.Arg0 = OPTEE_SMC_RETURN_FROM_RPC;
} else {
break;

View File

@ -25,6 +25,9 @@
#define OPTEE_SMC_SHARED_MEMORY_CACHED 1
#define OPTEE_SMC_RETURN_UNKNOWN_FUNCTION 0xffffffff
#define OPTEE_SMC_RETURN_RPC_PREFIX_MASK 0xffff0000
#define OPTEE_SMC_RETURN_RPC_PREFIX 0xffff0000
#define OPTEE_SMC_RETURN_RPC_FOREIGN_INTERRUPT 0xffff0004
#define OPTEE_MESSAGE_COMMAND_OPEN_SESSION 0

View File

@ -0,0 +1,185 @@
/** @file
* File managing the MMU for ARMv8 architecture in S-EL0
*
* Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Uefi.h>
#include <IndustryStandard/ArmMmSvc.h>
#include <Library/ArmLib.h>
#include <Library/ArmMmuLib.h>
#include <Library/ArmSvcLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
STATIC
EFI_STATUS
GetMemoryPermissions (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
OUT UINT32 *MemoryAttributes
)
{
ARM_SVC_ARGS GetMemoryPermissionsSvcArgs = {0};
GetMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64;
GetMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
GetMemoryPermissionsSvcArgs.Arg2 = 0;
GetMemoryPermissionsSvcArgs.Arg3 = 0;
ArmCallSvc (&GetMemoryPermissionsSvcArgs);
if (GetMemoryPermissionsSvcArgs.Arg0 == ARM_SVC_SPM_RET_INVALID_PARAMS) {
*MemoryAttributes = 0;
return EFI_INVALID_PARAMETER;
}
*MemoryAttributes = GetMemoryPermissionsSvcArgs.Arg0;
return EFI_SUCCESS;
}
STATIC
EFI_STATUS
RequestMemoryPermissionChange (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINTN Permissions
)
{
EFI_STATUS Status;
ARM_SVC_ARGS ChangeMemoryPermissionsSvcArgs = {0};
ChangeMemoryPermissionsSvcArgs.Arg0 = ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64;
ChangeMemoryPermissionsSvcArgs.Arg1 = BaseAddress;
ChangeMemoryPermissionsSvcArgs.Arg2 = EFI_SIZE_TO_PAGES(Length);
ChangeMemoryPermissionsSvcArgs.Arg3 = Permissions;
ArmCallSvc (&ChangeMemoryPermissionsSvcArgs);
Status = ChangeMemoryPermissionsSvcArgs.Arg0;
switch (Status) {
case ARM_SVC_SPM_RET_SUCCESS:
Status = EFI_SUCCESS;
break;
case ARM_SVC_SPM_RET_NOT_SUPPORTED:
Status = EFI_UNSUPPORTED;
break;
case ARM_SVC_SPM_RET_INVALID_PARAMS:
Status = EFI_INVALID_PARAMETER;
break;
case ARM_SVC_SPM_RET_DENIED:
Status = EFI_ACCESS_DENIED;
break;
case ARM_SVC_SPM_RET_NO_MEMORY:
Status = EFI_BAD_BUFFER_SIZE;
break;
default:
Status = EFI_ACCESS_DENIED;
ASSERT (0);
}
return Status;
}
EFI_STATUS
ArmSetMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_STATUS Status;
UINT32 MemoryAttributes;
UINT32 CodePermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
Length,
MemoryAttributes | CodePermission
);
}
return EFI_INVALID_PARAMETER;
}
EFI_STATUS
ArmClearMemoryRegionNoExec (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_STATUS Status;
UINT32 MemoryAttributes;
UINT32 CodePermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
CodePermission = SET_MEM_ATTR_CODE_PERM_XN << SET_MEM_ATTR_CODE_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
Length,
MemoryAttributes & ~CodePermission
);
}
return EFI_INVALID_PARAMETER;
}
EFI_STATUS
ArmSetMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_STATUS Status;
UINT32 MemoryAttributes;
UINT32 DataPermission;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
DataPermission = SET_MEM_ATTR_DATA_PERM_RO << SET_MEM_ATTR_DATA_PERM_SHIFT;
return RequestMemoryPermissionChange (
BaseAddress,
Length,
MemoryAttributes | DataPermission
);
}
return EFI_INVALID_PARAMETER;
}
EFI_STATUS
ArmClearMemoryRegionReadOnly (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_STATUS Status;
UINT32 MemoryAttributes;
UINT32 PermissionRequest;
Status = GetMemoryPermissions (BaseAddress, &MemoryAttributes);
if (Status != EFI_INVALID_PARAMETER) {
PermissionRequest = SET_MEM_ATTR_MAKE_PERM_REQUEST (SET_MEM_ATTR_DATA_PERM_RW,
MemoryAttributes);
return RequestMemoryPermissionChange (
BaseAddress,
Length,
PermissionRequest
);
}
return EFI_INVALID_PARAMETER;
}

View File

@ -0,0 +1,36 @@
#/** @file
#
# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines]
INF_VERSION = 0x0001001A
BASE_NAME = ArmMmuStandaloneMmCoreLib
FILE_GUID = da8f0232-fb14-42f0-922c-63104d2c70bd
MODULE_TYPE = MM_CORE_STANDALONE
VERSION_STRING = 1.0
LIBRARY_CLASS = StandaloneMmMmuLib
PI_SPECIFICATION_VERSION = 0x00010032
[Sources.AARCH64]
AArch64/ArmMmuStandaloneMmLib.c
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
ArmLib
CacheMaintenanceLib
MemoryAllocationLib

View File

@ -70,6 +70,7 @@
## SP805 Watchdog
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x0000002E
## PL011 UART
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F

View File

@ -82,10 +82,14 @@ NOR_FLASH_INSTANCE mNorFlashInstanceTemplate = {
{
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
{ (UINT8)sizeof(VENDOR_DEVICE_PATH), (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8) }
{
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End)),
(UINT8)(OFFSET_OF (NOR_FLASH_DEVICE_PATH, End) >> 8)
}
},
{ 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } }, // GUID ... NEED TO BE FILLED
},
0, // Index
{
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
@ -99,10 +103,9 @@ NorFlashCreateInstance (
IN UINTN NorFlashDeviceBase,
IN UINTN NorFlashRegionBase,
IN UINTN NorFlashSize,
IN UINT32 MediaId,
IN UINT32 Index,
IN UINT32 BlockSize,
IN BOOLEAN SupportFvb,
IN CONST GUID *NorFlashGuid,
OUT NOR_FLASH_INSTANCE** NorFlashInstance
)
{
@ -121,11 +124,12 @@ NorFlashCreateInstance (
Instance->Size = NorFlashSize;
Instance->BlockIoProtocol.Media = &Instance->Media;
Instance->Media.MediaId = MediaId;
Instance->Media.MediaId = Index;
Instance->Media.BlockSize = BlockSize;
Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;
CopyGuid (&Instance->DevicePath.Vendor.Guid, NorFlashGuid);
CopyGuid (&Instance->DevicePath.Vendor.Guid, &gEfiCallerIdGuid);
Instance->DevicePath.Index = (UINT8)Index;
Instance->ShadowBuffer = AllocateRuntimePool (BlockSize);;
if (Instance->ShadowBuffer == NULL) {
@ -1311,7 +1315,6 @@ NorFlashInitialise (
Index,
NorFlashDevices[Index].BlockSize,
ContainVariableStorage,
&NorFlashDevices[Index].Guid,
&mNorFlashInstances[Index]
);
if (EFI_ERROR(Status)) {

View File

@ -122,10 +122,13 @@
typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;
#pragma pack (1)
typedef struct {
VENDOR_DEVICE_PATH Vendor;
UINT8 Index;
EFI_DEVICE_PATH_PROTOCOL End;
} NOR_FLASH_DEVICE_PATH;
#pragma pack ()
struct _NOR_FLASH_INSTANCE {
UINT32 Signature;

View File

@ -1,6 +1,7 @@
/** @file
*
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
* Copyright (c) 2018, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -19,16 +20,18 @@
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiRuntimeServicesTableLib.h>
#include <Library/UefiLib.h>
#include <Protocol/HardwareInterrupt.h>
#include <Protocol/WatchdogTimer.h>
#include "SP805Watchdog.h"
EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
STATIC EFI_EVENT mEfiExitBootServicesEvent;
STATIC EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterrupt;
STATIC EFI_WATCHDOG_TIMER_NOTIFY mWatchdogNotify;
STATIC UINT32 mTimerPeriod;
/**
Make sure the SP805 registers are unlocked for writing.
@ -43,8 +46,8 @@ SP805Unlock (
VOID
)
{
if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED) {
MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
}
}
@ -61,12 +64,39 @@ SP805Lock (
VOID
)
{
if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
if (MmioRead32 (SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED) {
// To lock it, just write in any number (except the special unlock code).
MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
MmioWrite32 (SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
}
}
STATIC
VOID
EFIAPI
SP805InterruptHandler (
IN HARDWARE_INTERRUPT_SOURCE Source,
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
SP805Unlock ();
MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq
SP805Lock ();
mInterrupt->EndOfInterrupt (mInterrupt, Source);
//
// The notify function should be called with the elapsed number of ticks
// since the watchdog was armed, which should exceed the timer period.
// We don't actually know the elapsed number of ticks, so let's return
// the timer period plus 1.
//
if (mWatchdogNotify != NULL) {
mWatchdogNotify (mTimerPeriod + 1);
}
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, 0, NULL);
}
/**
Stop the SP805 watchdog timer from counting down by disabling interrupts.
**/
@ -77,8 +107,8 @@ SP805Stop (
)
{
// Disable interrupts
if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0) {
MmioAnd32 (SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
}
}
@ -94,8 +124,8 @@ SP805Start (
)
{
// Enable interrupts
if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0) {
MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
}
}
@ -103,6 +133,7 @@ SP805Start (
On exiting boot services we must make sure the SP805 Watchdog Timer
is stopped.
**/
STATIC
VOID
EFIAPI
ExitBootServicesEvent (
@ -110,9 +141,9 @@ ExitBootServicesEvent (
IN VOID *Context
)
{
SP805Unlock();
SP805Stop();
SP805Lock();
SP805Unlock ();
SP805Stop ();
SP805Lock ();
}
/**
@ -142,16 +173,24 @@ ExitBootServicesEvent (
previously registered.
**/
STATIC
EFI_STATUS
EFIAPI
SP805RegisterHandler (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
// ERROR: This function is not supported.
// The hardware watchdog will reset the board
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
return EFI_INVALID_PARAMETER;
}
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
return EFI_ALREADY_STARTED;
}
mWatchdogNotify = NotifyFunction;
return EFI_SUCCESS;
}
/**
@ -182,39 +221,39 @@ SP805RegisterHandler (
@retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
**/
STATIC
EFI_STATUS
EFIAPI
SP805SetTimerPeriod (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN UINT64 TimerPeriod // In 100ns units
)
{
EFI_STATUS Status = EFI_SUCCESS;
EFI_STATUS Status;
UINT64 Ticks64bit;
SP805Unlock();
SP805Unlock ();
if( TimerPeriod == 0 ) {
Status = EFI_SUCCESS;
if (TimerPeriod == 0) {
// This is a watchdog stop request
SP805Stop();
goto EXIT;
SP805Stop ();
} else {
// Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
// The SP805 will count down to ZERO once, generate an interrupt and
// then it will again reload the initial value and start again.
// On the second time when it reaches ZERO, it will actually reset the board.
// Therefore, we need to load half the required delay.
// The SP805 will count down to zero and generate an interrupt.
//
// WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
// WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz);
//
// i.e.:
//
// WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
// WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 10 MHz ;
Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000);
Ticks64bit = MultU64x32 (TimerPeriod, PcdGet32 (PcdSP805WatchdogClockFrequencyInHz));
Ticks64bit = DivU64x32 (Ticks64bit, 10 * 1000 * 1000);
// The registers in the SP805 are only 32 bits
if(Ticks64bit > (UINT64)0xFFFFFFFF) {
if (Ticks64bit > MAX_UINT32) {
// We could load the watchdog with the maximum supported value but
// if a smaller value was requested, this could have the watchdog
// triggering before it was intended.
@ -224,15 +263,18 @@ SP805SetTimerPeriod (
}
// Update the watchdog with a 32-bit value.
MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
MmioWrite32 (SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
// Start the watchdog
SP805Start();
SP805Start ();
}
EXIT:
mTimerPeriod = TimerPeriod;
EXIT:
// Ensure the watchdog is locked before exiting.
SP805Lock();
SP805Lock ();
ASSERT_EFI_ERROR (Status);
return Status;
}
@ -251,34 +293,20 @@ SP805SetTimerPeriod (
@retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
**/
STATIC
EFI_STATUS
EFIAPI
SP805GetTimerPeriod (
IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
OUT UINT64 *TimerPeriod
)
{
EFI_STATUS Status = EFI_SUCCESS;
UINT64 ReturnValue;
if (TimerPeriod == NULL) {
return EFI_INVALID_PARAMETER;
}
// Check if the watchdog is stopped
if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
// It is stopped, so return zero.
ReturnValue = 0;
} else {
// Convert the Watchdog ticks into TimerPeriod
// Ensure 64bit arithmetic throughout because the Watchdog ticks may already
// be at the maximum 32 bit value and we still need to multiply that by 600.
ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );
}
*TimerPeriod = ReturnValue;
return Status;
*TimerPeriod = mTimerPeriod;
return EFI_SUCCESS;
}
/**
@ -313,10 +341,10 @@ SP805GetTimerPeriod (
Retrieves the period of the timer interrupt in 100 nS units.
**/
EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = {
(EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler,
(EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod,
(EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod
STATIC EFI_WATCHDOG_TIMER_ARCH_PROTOCOL mWatchdogTimer = {
SP805RegisterHandler,
SP805SetTimerPeriod,
SP805GetTimerPeriod
};
/**
@ -340,6 +368,11 @@ SP805Initialize (
EFI_STATUS Status;
EFI_HANDLE Handle;
// Find the interrupt controller protocol. ASSERT if not found.
Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL,
(VOID **)&mInterrupt);
ASSERT_EFI_ERROR (Status);
// Unlock access to the SP805 registers
SP805Unlock ();
@ -347,12 +380,30 @@ SP805Initialize (
SP805Stop ();
// Set the watchdog to reset the board when triggered
if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {
// This is a last resort in case the interrupt handler fails
if ((MmioRead32 (SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {
MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);
}
// Clear any pending interrupts
MmioWrite32 (SP805_WDOG_INT_CLR_REG, 0); // write of any value clears the irq
// Prohibit any rogue access to SP805 registers
SP805Lock();
SP805Lock ();
if (PcdGet32 (PcdSP805WatchdogInterrupt) > 0) {
Status = mInterrupt->RegisterInterruptSource (mInterrupt,
PcdGet32 (PcdSP805WatchdogInterrupt),
SP805InterruptHandler);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: failed to register watchdog interrupt - %r\n",
__FUNCTION__, Status));
return Status;
}
} else {
DEBUG ((DEBUG_WARN, "%a: no interrupt specified, running in RESET mode only\n",
__FUNCTION__));
}
//
// Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
@ -361,28 +412,26 @@ SP805Initialize (
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
if (EFI_ERROR(Status)) {
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
ExitBootServicesEvent, NULL, &mEfiExitBootServicesEvent);
if (EFI_ERROR (Status)) {
Status = EFI_OUT_OF_RESOURCES;
goto EXIT;
}
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces(
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
NULL
);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
Status = EFI_OUT_OF_RESOURCES;
goto EXIT;
}
EXIT:
if(EFI_ERROR(Status)) {
// The watchdog failed to initialize
ASSERT(FALSE);
}
ASSERT_EFI_ERROR (Status);
return Status;
}

View File

@ -1,6 +1,7 @@
/** @file
*
* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* Copyright (c) 2018, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -18,25 +19,21 @@
FILE_GUID = ebd705fb-fa92-46a7-b32b-7f566d944614
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SP805Initialize
[Sources.common]
SP805Watchdog.c
[Packages]
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
DebugLib
IoLib
PcdLib
UefiLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiRuntimeServicesTableLib
@ -44,9 +41,11 @@
[Pcd]
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt
[Protocols]
gEfiWatchdogTimerArchProtocolGuid
gHardwareInterruptProtocolGuid ## ALWAYS_CONSUMES
gEfiWatchdogTimerArchProtocolGuid ## ALWAYS_PRODUCES
[Depex]
TRUE
gHardwareInterruptProtocolGuid

View File

@ -20,7 +20,6 @@ typedef struct {
UINTN RegionBaseAddress; // Start address of one single region
UINTN Size;
UINTN BlockSize;
EFI_GUID Guid;
} NOR_FLASH_DESCRIPTION;
EFI_STATUS

View File

@ -48,7 +48,7 @@ SerialPortInitialize (
StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);
return PL011UartInitializePort (
(UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
(UINTN)PcdGet64 (PcdSerialRegisterBase),
PL011UartClockGetFreq(),
&BaudRate,
&ReceiveFifoDepth,
@ -75,7 +75,7 @@ SerialPortWrite (
IN UINTN NumberOfBytes
)
{
return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
}
/**
@ -95,7 +95,7 @@ SerialPortRead (
IN UINTN NumberOfBytes
)
{
return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
}
/**
@ -111,7 +111,7 @@ SerialPortPoll (
VOID
)
{
return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
}
/**
Set new attributes to PL011.
@ -156,7 +156,7 @@ SerialPortSetAttributes (
)
{
return PL011UartInitializePort (
(UINTN)FixedPcdGet64 (PcdSerialRegisterBase),
(UINTN)PcdGet64 (PcdSerialRegisterBase),
PL011UartClockGetFreq(),
BaudRate,
ReceiveFifoDepth,
@ -198,7 +198,7 @@ SerialPortSetControl (
IN UINT32 Control
)
{
return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
}
/**
@ -239,5 +239,5 @@ SerialPortGetControl (
OUT UINT32 *Control
)
{
return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);
return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
}

View File

@ -36,8 +36,10 @@
MdeModulePkg/MdeModulePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[FixedPcd]
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
[FixedPcd]
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity

View File

@ -105,12 +105,12 @@ InitializeMemory (
// Ensure PcdSystemMemorySize has been set
ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ADDRESS);
ASSERT (PcdGet64 (PcdSystemMemoryBase) < (UINT64)MAX_ALLOC_ADDRESS);
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
SystemMemoryTop = SystemMemoryBase + PcdGet64 (PcdSystemMemorySize);
if (SystemMemoryTop - 1 > MAX_ADDRESS) {
SystemMemoryTop = (UINT64)MAX_ADDRESS + 1;
if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
SystemMemoryTop = (UINT64)MAX_ALLOC_ADDRESS + 1;
}
FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);

View File

@ -46,8 +46,5 @@
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
[depex]
TRUE

View File

@ -57,9 +57,6 @@
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
[Depex]
TRUE

View File

@ -76,6 +76,9 @@ _PrepareArguments:
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr x3, =ASM_PFX(CEntryPoint)
// Set the frame pointer to NULL so any backtraces terminate here
mov x29, xzr
// Jump to PrePeiCore C code
// x0 = mp_id
// x1 = pei_core_address

View File

@ -109,6 +109,9 @@ _PrepareArguments:
// Ensure we're jumping to FV version of the code (not boot remapped alias)
ldr x4, =ASM_PFX(CEntryPoint)
// Set the frame pointer to NULL so any backtraces terminate here
mov x29, xzr
// Jump to PrePiCore C code
// x0 = MpId
// x1 = UefiMemoryBase

View File

@ -97,7 +97,6 @@
gArmPlatformTokenSpaceGuid.PcdCoreCount
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory

View File

@ -90,7 +90,6 @@
gArmPlatformTokenSpaceGuid.PcdCoreCount
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory

View File

@ -115,7 +115,7 @@ PrePiMain (
BuildStackHob (StacksBase, StacksSize);
//TODO: Call CpuPei as a library
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
if (ArmIsMpCore ()) {
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid

View File

@ -80,9 +80,7 @@
DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
!endif
!if $(HTTP_BOOT_ENABLE) == TRUE
HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
!endif
@ -149,11 +147,9 @@
#
# CryptoPkg libraries needed by multiple firmware features
#
!if ($(SECURE_BOOT_ENABLE) == TRUE) || ($(NETWORK_IP6_ENABLE) == TRUE)
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
!endif
#
# Secure Boot dependencies
@ -388,9 +384,6 @@
#
gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE
[PcdsFixedAtBuild.ARM]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
[Components.common]
#
# Ramdisk support

View File

@ -143,10 +143,6 @@
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
[PcdsFixedAtBuild.AARCH64]
# KVM limits it IPA space to 40 bits (1 TB), so there is no need to
# support anything bigger, even if the host hardware does
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
# Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point,
# if the entry point version is >= 3.0. AARCH64 OSes cannot assume the
# presence of the 32-bit entry point anyway (because many AARCH64 systems
@ -346,18 +342,14 @@
MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
NetworkPkg/TcpDxe/TcpDxe.inf
NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
NetworkPkg/IScsiDxe/IScsiDxe.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
NetworkPkg/Ip6Dxe/Ip6Dxe.inf
NetworkPkg/TcpDxe/TcpDxe.inf
NetworkPkg/Udp6Dxe/Udp6Dxe.inf
NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
NetworkPkg/IScsiDxe/IScsiDxe.inf
!else
MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
!endif
!if $(HTTP_BOOT_ENABLE) == TRUE
NetworkPkg/DnsDxe/DnsDxe.inf

View File

@ -126,18 +126,14 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
INF NetworkPkg/TcpDxe/TcpDxe.inf
INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
INF NetworkPkg/IScsiDxe/IScsiDxe.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
INF NetworkPkg/TcpDxe/TcpDxe.inf
INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
INF NetworkPkg/IScsiDxe/IScsiDxe.inf
!else
INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
!endif
!if $(HTTP_BOOT_ENABLE) == TRUE
INF NetworkPkg/DnsDxe/DnsDxe.inf

View File

@ -68,11 +68,14 @@
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
[BuildOptions.ARM.EDKII.SEC, BuildOptions.ARM.EDKII.BASE]
# Avoid MOVT/MOVW instruction pairs in code that may end up in the PIE
# executable we build for the relocatable PrePi. They are not runtime
# relocatable in ELF.
*_CLANG35_*_CC_FLAGS = -mno-movt
[BuildOptions.common.EDKII.SEC, BuildOptions.common.EDKII.BASE]
#
# CLANG38 with LTO support enabled uses the GNU GOLD linker, which insists
# on emitting GOT based symbol references when running in shared mode, unless
# we override visibility to 'hidden' in all modules that make up the PrePi
# build.
#
GCC:*_CLANG38_*_CC_FLAGS = -include $(WORKSPACE)/ArmVirtPkg/Include/Platform/Hidden.h
################################################################################
#
@ -130,6 +133,15 @@
gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
!endif
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
#
# The maximum physical I/O addressability of the processor, set with
# BuildCpuHob().
#
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
[PcdsPatchableInModule.common]
#
# This will be overridden in the code
@ -146,21 +158,6 @@
gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
gArmTokenSpaceGuid.PcdFvBaseAddress|0x0
[PcdsFixedAtBuild.AARCH64]
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
#
# The maximum physical I/O addressability of the processor, set with
# BuildCpuHob().
#
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
# KVM limits it IPA space to 40 bits (1 TB), so there is no need to
# support anything bigger, even if the host hardware does
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
[PcdsDynamicDefault.common]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
@ -335,18 +332,14 @@
MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
NetworkPkg/TcpDxe/TcpDxe.inf
NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
NetworkPkg/IScsiDxe/IScsiDxe.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
NetworkPkg/Ip6Dxe/Ip6Dxe.inf
NetworkPkg/TcpDxe/TcpDxe.inf
NetworkPkg/Udp6Dxe/Udp6Dxe.inf
NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
NetworkPkg/IScsiDxe/IScsiDxe.inf
!else
MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
!endif
!if $(HTTP_BOOT_ENABLE) == TRUE
NetworkPkg/DnsDxe/DnsDxe.inf

View File

@ -57,11 +57,14 @@
[LibraryClasses.common.UEFI_DRIVER]
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
[BuildOptions.ARM.EDKII.SEC, BuildOptions.ARM.EDKII.BASE]
# Avoid MOVT/MOVW instruction pairs in code that may end up in the PIE
# executable we build for the relocatable PrePi. They are not runtime
# relocatable in ELF.
*_CLANG35_*_CC_FLAGS = -mno-movt
[BuildOptions.common.EDKII.SEC, BuildOptions.common.EDKII.BASE]
#
# CLANG38 with LTO support enabled uses the GNU GOLD linker, which insists
# on emitting GOT based symbol references when running in shared mode, unless
# we override visibility to 'hidden' in all modules that make up the PrePi
# build.
#
GCC:*_CLANG38_*_CC_FLAGS = -include $(WORKSPACE)/ArmVirtPkg/Include/Platform/Hidden.h
################################################################################
#

View File

@ -78,6 +78,33 @@ SetNodeProperty (
return EFI_SUCCESS;
}
STATIC
BOOLEAN
IsNodeEnabled (
INT32 Node
)
{
CONST CHAR8 *NodeStatus;
INT32 Len;
//
// A missing status property implies 'ok' so ignore any errors that
// may occur here. If the status property is present, check whether
// it is set to 'ok' or 'okay', anything else is treated as 'disabled'.
//
NodeStatus = fdt_getprop (mDeviceTreeBase, Node, "status", &Len);
if (NodeStatus == NULL) {
return TRUE;
}
if (Len >= 5 && AsciiStrCmp (NodeStatus, "okay") == 0) {
return TRUE;
}
if (Len >= 3 && AsciiStrCmp (NodeStatus, "ok") == 0) {
return TRUE;
}
return FALSE;
}
STATIC
EFI_STATUS
EFIAPI
@ -101,6 +128,10 @@ FindNextCompatibleNode (
break;
}
if (!IsNodeEnabled (Next)) {
continue;
}
Type = fdt_getprop (mDeviceTreeBase, Next, "compatible", &Len);
if (Type == NULL) {
continue;
@ -210,7 +241,6 @@ FindNextMemoryNodeReg (
{
INT32 Prev, Next;
CONST CHAR8 *DeviceType;
CONST CHAR8 *NodeStatus;
INT32 Len;
EFI_STATUS Status;
@ -223,10 +253,8 @@ FindNextMemoryNodeReg (
break;
}
NodeStatus = fdt_getprop (mDeviceTreeBase, Next, "status", &Len);
if (NodeStatus != NULL && AsciiStrCmp (NodeStatus, "okay") != 0) {
DEBUG ((DEBUG_WARN, "%a: ignoring memory node with status \"%a\"\n",
__FUNCTION__, NodeStatus));
if (!IsNodeEnabled (Next)) {
DEBUG ((DEBUG_WARN, "%a: ignoring disabled memory node\n", __FUNCTION__));
continue;
}

View File

@ -0,0 +1,28 @@
/** @file
Copyright (c) 2018, Linaro Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __PLATFORM_HIDDEN_H
#define __PLATFORM_HIDDEN_H
//
// Setting the GCC -fvisibility=hidden command line option is not quite the same
// as setting the pragma below: the former only affects definitions, whereas the
// pragma affects extern declarations as well. So if we want to ensure that no
// GOT indirected symbol references are emitted, we need to use the pragma, or
// GOT based cross object references could be emitted, e.g., in libraries, and
// these cannot be relaxed to ordinary symbol references at link time.
//
#pragma GCC visibility push (hidden)
#endif

View File

@ -75,18 +75,18 @@ MemoryPeim (
SystemMemoryTop = PcdGet64 (PcdSystemMemoryBase) +
PcdGet64 (PcdSystemMemorySize);
if (SystemMemoryTop - 1 > MAX_ADDRESS) {
if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
PcdGet64 (PcdSystemMemoryBase),
(UINT64)MAX_ADDRESS - PcdGet64 (PcdSystemMemoryBase) + 1
(UINT64)MAX_ALLOC_ADDRESS - PcdGet64 (PcdSystemMemoryBase) + 1
);
BuildResourceDescriptorHob (
EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes,
(UINT64)MAX_ADDRESS + 1,
SystemMemoryTop - MAX_ADDRESS - 1
(UINT64)MAX_ALLOC_ADDRESS + 1,
SystemMemoryTop - MAX_ALLOC_ADDRESS - 1
);
} else {
BuildResourceDescriptorHob (

View File

@ -17,6 +17,7 @@
#include <Library/PciHostBridgeLib.h>
#include <Library/DebugLib.h>
#include <Library/DevicePathLib.h>
#include <Library/DxeServicesTableLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
@ -82,6 +83,33 @@ typedef struct {
#define DTB_PCI_HOST_RANGE_IO BIT24
#define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
STATIC
EFI_STATUS
MapGcdMmioSpace (
IN UINT64 Base,
IN UINT64 Size
)
{
EFI_STATUS Status;
Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, Base, Size,
EFI_MEMORY_UC);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
"%a: failed to add GCD memory space for region [0x%Lx+0x%Lx)\n",
__FUNCTION__, Base, Size));
return Status;
}
Status = gDS->SetMemorySpaceAttributes (Base, Size, EFI_MEMORY_UC);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR,
"%a: failed to set memory space attributes for region [0x%Lx+0x%Lx)\n",
__FUNCTION__, Base, Size));
}
return Status;
}
STATIC
EFI_STATUS
ProcessPciHost (
@ -266,7 +294,23 @@ ProcessPciHost (
"Io[0x%Lx+0x%Lx)@0x%Lx Mem32[0x%Lx+0x%Lx)@0x0 Mem64[0x%Lx+0x%Lx)@0x0\n",
__FUNCTION__, ConfigBase, ConfigSize, *BusMin, *BusMax, *IoBase, *IoSize,
IoTranslation, *Mmio32Base, *Mmio32Size, *Mmio64Base, *Mmio64Size));
return EFI_SUCCESS;
// Map the ECAM space in the GCD memory map
Status = MapGcdMmioSpace (ConfigBase, ConfigSize);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Map the MMIO window that provides I/O access - the PCI host bridge code
// is not aware of this translation and so it will only map the I/O view
// in the GCD I/O map.
//
Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
ASSERT_EFI_ERROR (Status);
return Status;
}
STATIC PCI_ROOT_BRIDGE mRootBridge;

View File

@ -42,6 +42,7 @@
[LibraryClasses]
DebugLib
DevicePathLib
DxeServicesTableLib
MemoryAllocationLib
PciPcdProducerLib

View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014, Linaro Ltd. All rights reserved.<BR>
Copyright (c) 2014-2018, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -12,13 +12,16 @@
**/
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/NorFlashPlatformLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Protocol/FdtClient.h>
#define QEMU_NOR_BLOCK_SIZE SIZE_256KB
#define QEMU_NOR0_BASE 0x0
#define QEMU_NOR0_SIZE SIZE_64MB
#define QEMU_NOR1_BASE 0x04000000
#define QEMU_NOR1_SIZE SIZE_64MB
#define MAX_FLASH_BANKS 4
EFI_STATUS
NorFlashPlatformInitialization (
@ -28,21 +31,7 @@ NorFlashPlatformInitialization (
return EFI_SUCCESS;
}
NOR_FLASH_DESCRIPTION mNorFlashDevices[] = {
{
QEMU_NOR0_BASE,
QEMU_NOR0_BASE,
QEMU_NOR0_SIZE,
QEMU_NOR_BLOCK_SIZE,
{0xF9B94AE2, 0x8BA6, 0x409B, {0x9D, 0x56, 0xB9, 0xB4, 0x17, 0xF5, 0x3C, 0xB3}}
}, {
QEMU_NOR1_BASE,
QEMU_NOR1_BASE,
QEMU_NOR1_SIZE,
QEMU_NOR_BLOCK_SIZE,
{0x8047DB4B, 0x7E9C, 0x4C0C, {0x8E, 0xBC, 0xDF, 0xBB, 0xAA, 0xCA, 0xCE, 0x8F}}
}
};
NOR_FLASH_DESCRIPTION mNorFlashDevices[MAX_FLASH_BANKS];
EFI_STATUS
NorFlashPlatformGetDevices (
@ -50,7 +39,63 @@ NorFlashPlatformGetDevices (
OUT UINT32 *Count
)
{
FDT_CLIENT_PROTOCOL *FdtClient;
INT32 Node;
EFI_STATUS Status;
EFI_STATUS FindNodeStatus;
CONST UINT32 *Reg;
UINT32 PropSize;
UINT32 Num;
UINT64 Base;
UINT64 Size;
Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
(VOID **)&FdtClient);
ASSERT_EFI_ERROR (Status);
Num = 0;
for (FindNodeStatus = FdtClient->FindCompatibleNode (FdtClient,
"cfi-flash", &Node);
!EFI_ERROR (FindNodeStatus) && Num < MAX_FLASH_BANKS;
FindNodeStatus = FdtClient->FindNextCompatibleNode (FdtClient,
"cfi-flash", Node, &Node)) {
Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg",
(CONST VOID **)&Reg, &PropSize);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: GetNodeProperty () failed (Status == %r)\n",
__FUNCTION__, Status));
continue;
}
ASSERT ((PropSize % (4 * sizeof (UINT32))) == 0);
while (PropSize >= (4 * sizeof (UINT32)) && Num < MAX_FLASH_BANKS) {
Base = SwapBytes64 (ReadUnaligned64 ((VOID *)&Reg[0]));
Size = SwapBytes64 (ReadUnaligned64 ((VOID *)&Reg[2]));
Reg += 4;
PropSize -= 4 * sizeof (UINT32);
//
// Disregard any flash devices that overlap with the primary FV.
// The firmware is not updatable from inside the guest anyway.
//
if ((PcdGet64 (PcdFvBaseAddress) + PcdGet32 (PcdFvSize) > Base) &&
(Base + Size) > PcdGet64 (PcdFvBaseAddress)) {
continue;
}
mNorFlashDevices[Num].DeviceBaseAddress = (UINTN)Base;
mNorFlashDevices[Num].RegionBaseAddress = (UINTN)Base;
mNorFlashDevices[Num].Size = (UINTN)Size;
mNorFlashDevices[Num].BlockSize = QEMU_NOR_BLOCK_SIZE;
Num++;
}
}
*NorFlashDescriptions = mNorFlashDevices;
*Count = ARRAY_SIZE (mNorFlashDevices);
*Count = Num;
return EFI_SUCCESS;
}

View File

@ -28,3 +28,20 @@
[Packages]
MdePkg/MdePkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
ArmPkg/ArmPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
[LibraryClasses]
BaseLib
DebugLib
UefiBootServicesTableLib
[Protocols]
gFdtClientProtocolGuid ## CONSUMES
[Depex]
gFdtClientProtocolGuid
[Pcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize

View File

@ -1,39 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLibV8.h>
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_FUNC(ArmGetPhysAddrTop)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
ldrb w1, [x1, x0]
mov x0, #1
lsl x0, x0, x1
ret
//
// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 6 and 7 are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, -1, -1
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -1,24 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_FUNC(ArmGetPhysAddrTop)
mov r0, #0x00000000
mov r1, #0x10000
bx lr

View File

@ -21,10 +21,14 @@
// Number of Virtual Memory Map Descriptors
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
EFI_PHYSICAL_ADDRESS
ArmGetPhysAddrTop (
VOID
);
//
// mach-virt's core peripherals such as the UART, the GIC and the RTC are
// all mapped in the 'miscellaneous device I/O' region, which we just map
// in its entirety rather than device by device. Note that it does not
// cover any of the NOR flash banks or PCI resource windows.
//
#define MACH_VIRT_PERIPH_BASE 0x08000000
#define MACH_VIRT_PERIPH_SIZE SIZE_128MB
/**
Return the Virtual Memory Map of your platform
@ -45,7 +49,6 @@ ArmVirtGetMemoryMap (
)
{
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
UINT64 TopOfMemory;
ASSERT (VirtualMemoryMap != NULL);
@ -72,29 +75,20 @@ ArmVirtGetMemoryMap (
VirtualMemoryTable[0].VirtualBase,
VirtualMemoryTable[0].Length));
// Peripheral space before DRAM
VirtualMemoryTable[1].PhysicalBase = 0x0;
VirtualMemoryTable[1].VirtualBase = 0x0;
VirtualMemoryTable[1].Length = VirtualMemoryTable[0].PhysicalBase;
// Memory mapped peripherals (UART, RTC, GIC, virtio-mmio, etc)
VirtualMemoryTable[1].PhysicalBase = MACH_VIRT_PERIPH_BASE;
VirtualMemoryTable[1].VirtualBase = MACH_VIRT_PERIPH_BASE;
VirtualMemoryTable[1].Length = MACH_VIRT_PERIPH_SIZE;
VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Peripheral space after DRAM
TopOfMemory = MIN (1ULL << FixedPcdGet8 (PcdPrePiCpuMemorySize),
ArmGetPhysAddrTop ());
VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + VirtualMemoryTable[1].Length;
// Map the FV region as normal executable memory
VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress);
VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase;
VirtualMemoryTable[2].Length = TopOfMemory -
VirtualMemoryTable[2].PhysicalBase;
VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Remap the FD region as normal executable memory
VirtualMemoryTable[3].PhysicalBase = PcdGet64 (PcdFdBaseAddress);
VirtualMemoryTable[3].VirtualBase = VirtualMemoryTable[3].PhysicalBase;
VirtualMemoryTable[3].Length = FixedPcdGet32 (PcdFdSize);
VirtualMemoryTable[3].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFvSize);
VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
// End of Table
ZeroMem (&VirtualMemoryTable[4], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
*VirtualMemoryMap = VirtualMemoryTable;
}

View File

@ -24,12 +24,6 @@
[Sources]
QemuVirtMemInfoLib.c
[Sources.ARM]
Arm/PhysAddrTop.S
[Sources.AARCH64]
AArch64/PhysAddrTop.S
[Packages]
ArmPkg/ArmPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
@ -45,10 +39,9 @@
PcdLib
[Pcd]
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
[FixedPcd]
gArmTokenSpaceGuid.PcdFdSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gArmTokenSpaceGuid.PcdFvSize

View File

@ -26,12 +26,6 @@
QemuVirtMemInfoLib.c
QemuVirtMemInfoPeiLibConstructor.c
[Sources.ARM]
Arm/PhysAddrTop.S
[Sources.AARCH64]
AArch64/PhysAddrTop.S
[Packages]
ArmPkg/ArmPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
@ -49,10 +43,11 @@
[Pcd]
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
[FixedPcd]
gArmTokenSpaceGuid.PcdFdSize
gArmTokenSpaceGuid.PcdFvSize
gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize

View File

@ -1,39 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLibV8.h>
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_FUNC(ArmGetPhysAddrTop)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
ldrb w1, [x1, x0]
mov x0, #1
lsl x0, x0, x1
ret
//
// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 6 and 7 are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, -1, -1
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -1,24 +0,0 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
# Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_FUNC(ArmGetPhysAddrTop)
mov r0, #0x00000000
mov r1, #0x10000
bx lr

View File

@ -14,15 +14,11 @@
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[2];
EFI_PHYSICAL_ADDRESS
ArmGetPhysAddrTop (
VOID
);
/**
Return the Virtual Memory Map of your platform
@ -42,8 +38,12 @@ ArmVirtGetMemoryMap (
OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
)
{
EFI_PHYSICAL_ADDRESS TopOfAddressSpace;
ASSERT (VirtualMemoryMap != NULL);
TopOfAddressSpace = LShiftU64 (1ULL, ArmGetPhysicalAddressBits ());
//
// Map the entire physical memory space as cached. The only device
// we care about is the GIC, which will be stage 2 mapped as a device
@ -51,7 +51,7 @@ ArmVirtGetMemoryMap (
//
mVirtualMemoryTable[0].PhysicalBase = 0x0;
mVirtualMemoryTable[0].VirtualBase = 0x0;
mVirtualMemoryTable[0].Length = ArmGetPhysAddrTop ();
mVirtualMemoryTable[0].Length = TopOfAddressSpace;
mVirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
mVirtualMemoryTable[1].PhysicalBase = 0x0;

View File

@ -24,12 +24,6 @@
[Sources]
XenVirtMemInfoLib.c
[Sources.ARM]
Arm/PhysAddrTop.S
[Sources.AARCH64]
AArch64/PhysAddrTop.S
[Packages]
ArmPkg/ArmPkg.dec
ArmVirtPkg/ArmVirtPkg.dec
@ -38,4 +32,5 @@
[LibraryClasses]
ArmLib
BaseLib
DebugLib

View File

@ -121,6 +121,9 @@ _GetStackBase:
mov x1, x21
mov x2, x22
// Set the frame pointer to NULL so any backtraces terminate here
mov x29, xzr
// Jump to PrePiCore C code
// x0 = MpId
// x1 = UefiMemoryBase

View File

@ -85,7 +85,6 @@
gArmPlatformTokenSpaceGuid.PcdCoreCount
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
@ -106,4 +105,4 @@
gArmTokenSpaceGuid.PcdFvBaseAddress
[BuildOptions]
GCC:*_*_*_DLINK_FLAGS = -pie -Wl,-T,$(MODULE_DIR)/Scripts/PrePi-PIE.lds
GCC:*_*_*_DLINK_FLAGS = -shared -Wl,-Bsymbolic -Wl,-T,$(MODULE_DIR)/Scripts/PrePi-PIE.lds

View File

@ -80,7 +80,7 @@ PrePiMain (
BuildStackHob (StacksBase, StacksSize);
//TODO: Call CpuPei as a library
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
// Set the Boot Mode
SetBootMode (BOOT_WITH_FULL_CONFIGURATION);

View File

@ -1,29 +0,0 @@
#!/usr/bin/env bash
full_cmd=${BASH_SOURCE:-$0} # see http://mywiki.wooledge.org/BashFAQ/028 for a discussion of why $0 is not a good choice here
dir=$(dirname "$full_cmd")
cmd=${full_cmd##*/}
if [ -n "$WORKSPACE" ] && [ -e "$WORKSPACE/Conf/BaseToolsCBinaries" ]
then
exec "$WORKSPACE/Conf/BaseToolsCBinaries/$cmd"
elif [ -n "$WORKSPACE" ] && [ -e "$EDK_TOOLS_PATH/Source/C" ]
then
if [ ! -e "$EDK_TOOLS_PATH/Source/C/bin/$cmd" ]
then
echo "BaseTools C Tool binary was not found ($cmd)"
echo "You may need to run:"
echo " make -C $EDK_TOOLS_PATH/Source/C"
else
exec "$EDK_TOOLS_PATH/Source/C/bin/$cmd" "$@"
fi
elif [ -e "$dir/../../Source/C/bin/$cmd" ]
then
exec "$dir/../../Source/C/bin/$cmd" "$@"
else
echo "Unable to find the real '$cmd' to run"
echo "This message was printed by"
echo " $0"
exit 127
fi

View File

@ -1,29 +0,0 @@
#!/usr/bin/env bash
full_cmd=${BASH_SOURCE:-$0} # see http://mywiki.wooledge.org/BashFAQ/028 for a discussion of why $0 is not a good choice here
dir=$(dirname "$full_cmd")
cmd=${full_cmd##*/}
if [ -n "$WORKSPACE" ] && [ -e "$WORKSPACE/Conf/BaseToolsCBinaries" ]
then
exec "$WORKSPACE/Conf/BaseToolsCBinaries/$cmd"
elif [ -n "$WORKSPACE" ] && [ -e "$EDK_TOOLS_PATH/Source/C" ]
then
if [ ! -e "$EDK_TOOLS_PATH/Source/C/bin/$cmd" ]
then
echo "BaseTools C Tool binary was not found ($cmd)"
echo "You may need to run:"
echo " make -C $EDK_TOOLS_PATH/Source/C"
else
exec "$EDK_TOOLS_PATH/Source/C/bin/$cmd" "$@"
fi
elif [ -e "$dir/../../Source/C/bin/$cmd" ]
then
exec "$dir/../../Source/C/bin/$cmd" "$@"
else
echo "Unable to find the real '$cmd' to run"
echo "This message was printed by"
echo " $0"
exit 127
fi

View File

@ -1,29 +0,0 @@
#!/usr/bin/env bash
full_cmd=${BASH_SOURCE:-$0} # see http://mywiki.wooledge.org/BashFAQ/028 for a discussion of why $0 is not a good choice here
dir=$(dirname "$full_cmd")
cmd=${full_cmd##*/}
if [ -n "$WORKSPACE" ] && [ -e "$WORKSPACE/Conf/BaseToolsCBinaries" ]
then
exec "$WORKSPACE/Conf/BaseToolsCBinaries/$cmd"
elif [ -n "$WORKSPACE" ] && [ -e "$EDK_TOOLS_PATH/Source/C" ]
then
if [ ! -e "$EDK_TOOLS_PATH/Source/C/bin/$cmd" ]
then
echo "BaseTools C Tool binary was not found ($cmd)"
echo "You may need to run:"
echo " make -C $EDK_TOOLS_PATH/Source/C"
else
exec "$EDK_TOOLS_PATH/Source/C/bin/$cmd" "$@"
fi
elif [ -e "$dir/../../Source/C/bin/$cmd" ]
then
exec "$dir/../../Source/C/bin/$cmd" "$@"
else
echo "Unable to find the real '$cmd' to run"
echo "This message was printed by"
echo " $0"
exit 127
fi

View File

@ -1,29 +0,0 @@
#!/usr/bin/env bash
full_cmd=${BASH_SOURCE:-$0} # see http://mywiki.wooledge.org/BashFAQ/028 for a discussion of why $0 is not a good choice here
dir=$(dirname "$full_cmd")
cmd=${full_cmd##*/}
if [ -n "$WORKSPACE" ] && [ -e "$WORKSPACE/Conf/BaseToolsCBinaries" ]
then
exec "$WORKSPACE/Conf/BaseToolsCBinaries/$cmd"
elif [ -n "$WORKSPACE" ] && [ -e "$EDK_TOOLS_PATH/Source/C" ]
then
if [ ! -e "$EDK_TOOLS_PATH/Source/C/bin/$cmd" ]
then
echo "BaseTools C Tool binary was not found ($cmd)"
echo "You may need to run:"
echo " make -C $EDK_TOOLS_PATH/Source/C"
else
exec "$EDK_TOOLS_PATH/Source/C/bin/$cmd" "$@"
fi
elif [ -e "$dir/../../Source/C/bin/$cmd" ]
then
exec "$dir/../../Source/C/bin/$cmd" "$@"
else
echo "Unable to find the real '$cmd' to run"
echo "This message was printed by"
echo " $0"
exit 127
fi

View File

@ -1,29 +0,0 @@
#!/usr/bin/env bash
full_cmd=${BASH_SOURCE:-$0} # see http://mywiki.wooledge.org/BashFAQ/028 for a discussion of why $0 is not a good choice here
dir=$(dirname "$full_cmd")
cmd=${full_cmd##*/}
if [ -n "$WORKSPACE" ] && [ -e "$WORKSPACE/Conf/BaseToolsCBinaries" ]
then
exec "$WORKSPACE/Conf/BaseToolsCBinaries/$cmd"
elif [ -n "$WORKSPACE" ] && [ -e "$EDK_TOOLS_PATH/Source/C" ]
then
if [ ! -e "$EDK_TOOLS_PATH/Source/C/bin/$cmd" ]
then
echo "BaseTools C Tool binary was not found ($cmd)"
echo "You may need to run:"
echo " make -C $EDK_TOOLS_PATH/Source/C"
else
exec "$EDK_TOOLS_PATH/Source/C/bin/$cmd" "$@"
fi
elif [ -e "$dir/../../Source/C/bin/$cmd" ]
then
exec "$dir/../../Source/C/bin/$cmd" "$@"
else
echo "Unable to find the real '$cmd' to run"
echo "This message was printed by"
echo " $0"
exit 127
fi

View File

@ -62,6 +62,7 @@
# $(BIN_DIR) Common directory for executable files
# $(FV_DIR) Directory to store flash image files
# $(INC) Search path of current module
# $(NASM_INC) Search nasm file path of current module
# $(INC_LIST) A file containing search pathes of current module
# $(LIBS) Static library files of current module
# $(<tool>_FLAGS) Tools flags of current module
@ -225,7 +226,7 @@
<Command>
"$(PP)" $(PP_FLAGS) $(INC) ${src} > ${d_path}(+)${s_base}.i
Trim --trim-long --source-code -o ${d_path}(+)${s_base}.iii ${d_path}(+)${s_base}.i
"$(NASM)" -I${s_path}(+) $(NASM_FLAGS) -o $dst ${d_path}(+)${s_base}.iii
"$(NASM)" -I${s_path}(+) $(NASM_INC) $(NASM_FLAGS) -o $dst ${d_path}(+)${s_base}.iii
[Device-Tree-Source-File]
<InputFile>

View File

@ -4150,7 +4150,7 @@ DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie
DEFINE GCC_DLINK2_FLAGS_COMMON = -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
DEFINE GCC_IA32_X64_DLINK_COMMON = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20
DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20 -Wl,--pic-veneer
DEFINE GCC_AARCH64_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20
DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20
DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = DEF(GCC_IA32_X64_DLINK_COMMON) --entry _ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
@ -4263,11 +4263,11 @@ DEFINE GCC49_ARM_ASM_FLAGS = DEF(GCC48_ARM_ASM_FLAGS)
DEFINE GCC49_AARCH64_ASM_FLAGS = DEF(GCC48_AARCH64_ASM_FLAGS)
DEFINE GCC49_ARM_CC_FLAGS = DEF(GCC48_ARM_CC_FLAGS)
DEFINE GCC49_ARM_CC_XIPFLAGS = DEF(GCC48_ARM_CC_XIPFLAGS)
DEFINE GCC49_AARCH64_CC_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC44_ALL_CC_FLAGS) DEF(GCC_AARCH64_CC_FLAGS)
DEFINE GCC49_AARCH64_CC_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC44_ALL_CC_FLAGS) DEF(GCC_AARCH64_CC_FLAGS) -mcmodel=small
DEFINE GCC49_AARCH64_CC_XIPFLAGS = DEF(GCC48_AARCH64_CC_XIPFLAGS)
DEFINE GCC49_ARM_DLINK_FLAGS = DEF(GCC48_ARM_DLINK_FLAGS)
DEFINE GCC49_ARM_DLINK2_FLAGS = DEF(GCC48_ARM_DLINK2_FLAGS)
DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS)
DEFINE GCC49_AARCH64_DLINK_FLAGS = DEF(GCC48_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000
DEFINE GCC49_AARCH64_DLINK2_FLAGS = DEF(GCC48_AARCH64_DLINK2_FLAGS)
DEFINE GCC49_ARM_ASLDLINK_FLAGS = DEF(GCC48_ARM_ASLDLINK_FLAGS)
DEFINE GCC49_AARCH64_ASLDLINK_FLAGS = DEF(GCC48_AARCH64_ASLDLINK_FLAGS)
@ -5034,15 +5034,16 @@ RELEASE_GCC49_ARM_CC_FLAGS = DEF(GCC49_ARM_CC_FLAGS) -Wno-unused-but-set-v
*_GCC49_AARCH64_VFRPP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
*_GCC49_AARCH64_CC_XIPFLAGS = DEF(GCC49_AARCH64_CC_XIPFLAGS)
DEBUG_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -O0 -mcmodel=small
DEBUG_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000
DEBUG_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -O0
DEBUG_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS)
DEBUG_GCC49_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
RELEASE_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable -mcmodel=tiny
RELEASE_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -Wno-unused-but-set-variable -Wno-unused-const-variable
RELEASE_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS)
RELEASE_GCC49_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
NOOPT_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -O0 -mcmodel=small
NOOPT_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000 -O0
NOOPT_GCC49_AARCH64_CC_FLAGS = DEF(GCC49_AARCH64_CC_FLAGS) -O0
NOOPT_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS) -O0
NOOPT_GCC49_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 -O0
####################################################################################
@ -5189,15 +5190,16 @@ RELEASE_GCC5_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKS
*_GCC5_AARCH64_VFRPP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
*_GCC5_AARCH64_CC_XIPFLAGS = DEF(GCC5_AARCH64_CC_XIPFLAGS)
DEBUG_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable -mcmodel=small
DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000 -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch -mcmodel=small
DEBUG_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
DEBUG_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
DEBUG_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
RELEASE_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable -mcmodel=tiny
RELEASE_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -Wno-unused-const-variable
RELEASE_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wno-lto-type-mismatch
RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
NOOPT_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -O0 -mcmodel=small
NOOPT_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000 -O0
NOOPT_GCC5_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -O0
NOOPT_GCC5_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -O0
NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 -O0
####################################################################################
@ -5247,7 +5249,7 @@ DEFINE CLANG35_AARCH64_CC_FLAGS = DEF(GCC_AARCH64_CC_FLAGS) DEF(CLANG35_AARCH64
*_CLANG35_ARM_ASM_FLAGS = DEF(GCC_ASM_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHASM_FLAGS) $(PLATFORM_FLAGS) -Qunused-arguments
*_CLANG35_ARM_DLINK_FLAGS = DEF(CLANG35_ARM_TARGET) DEF(GCC_ARM_DLINK_FLAGS)
*_CLANG35_ARM_DLINK2_FLAGS = DEF(GCC_DLINK2_FLAGS_COMMON) -Wl,--defsym=PECOFF_HEADER_SIZE=0x220
*_CLANG35_ARM_PLATFORM_FLAGS = -march=armv7-a
*_CLANG35_ARM_PLATFORM_FLAGS = -march=armv7-a -mkernel -Qunused-arguments
*_CLANG35_ARM_PP_FLAGS = DEF(GCC_PP_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)
*_CLANG35_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
*_CLANG35_ARM_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANG35_ARM_TARGET) $(ARCHCC_FLAGS) $(PLATFORM_FLAGS)

View File

@ -416,7 +416,7 @@ class PATH(object):
def header(self,struct):
header={}
head_re = re.compile(r'} %s;[\s\S\n]+h{1}"'%struct,re.M|re.S)
head_re = re.compile('typedef.*} %s;[\n]+(.*?)(?:typedef|formset)'%struct,re.M|re.S)
head_re2 = re.compile(r'#line[\s\d]+"(\S+h)"')
for i in list(self.lstinf.keys()):
with open(i,'r') as lst:

View File

@ -26,25 +26,20 @@
[Bin.Win32]
build.exe
BPDG.exe
BootSectImage.exe
Common.PyUtility.pyd
Ecc.exe
EfiCompressor.pyd
EfiLdrImage.exe
EfiRom.exe
Eot.EfiCompressor.pyd
Eot.LzmaCompressor.pyd
GenBootSector.exe
GenCrc32.exe
GenDepex.exe
GenFds.exe
GenFfs.exe
GenFv.exe
GenFw.exe
GenPage.exe
GenPatchPcdTable.exe
GenSec.exe
GenVtf.exe
ImportTool.bat
LzmaCompress.exe
LzmaF86Compress.bat

View File

@ -1,21 +0,0 @@
## @file
# GNU/Linux makefile for 'BootSectImage' module build.
#
# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
MAKEROOT ?= ..
APPNAME = BootSectImage
LIBS = -lCommon
OBJECTS = bootsectimage.o
include $(MAKEROOT)/Makefiles/app.makefile

View File

@ -1,22 +0,0 @@
## @file
# Windows makefile for 'BootSectImage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
!INCLUDE ..\Makefiles\ms.common
APPNAME = BootSectImage
LIBS = $(LIB_PATH)\Common.lib
OBJECTS = BootSectImage.obj
!INCLUDE ..\Makefiles\ms.app

View File

@ -1,955 +0,0 @@
/** @file
Abstract:
Patch the BPB information in boot sector image file.
Patch the MBR code in MBR image file.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <stdio.h>
#include <string.h>
#include "fat.h"
#include "mbr.h"
#include "EfiUtilityMsgs.h"
#include "ParseInf.h"
#define DEBUG_WARN 0x1
#define DEBUG_ERROR 0x2
//
// Utility Name
//
#define UTILITY_NAME "BootSectImage"
//
// Utility version information
//
#define UTILITY_MAJOR_VERSION 1
#define UTILITY_MINOR_VERSION 0
void
Version (
void
)
/*++
Routine Description:
Displays the standard utility information to SDTOUT
Arguments:
None
Returns:
None
--*/
{
printf ("%s Version %d.%d Build %s\n", UTILITY_NAME, UTILITY_MAJOR_VERSION, UTILITY_MINOR_VERSION, __BUILD_VERSION);
}
void
Usage (
void
)
/*++
Routine Description:
GC_TODO: Add function description
Arguments:
Returns:
GC_TODO: add return values
--*/
{
Version();
printf ("Copyright (c) 1999-2016 Intel Corporation. All rights reserved.\n");
printf ("\n The BootSectImage tool prints information or patch destination file by source\n");
printf (" file for BIOS Parameter Block (BPB) or Master Boot Record (MBR).\n");
printf ("\nUsage: \n\
BootSectImage\n\
[-f, --force force patch even if the FAT type of SrcImage and DstImage mismatch]\n\
[-m, --mbr process MBR instead of boot sector]\n\
[-p, --parse parse SrcImageFile]\n\
[-o, --output DstImage]\n\
[-g, --patch patch DstImage using data from SrcImageFile]\n\
[-v, --verbose]\n\
[--version]\n\
[-q, --quiet disable all messages except fatal errors]\n\
[-d, --debug[#]\n\
[-h, --help]\n\
[SrcImageFile]\n");
}
int WriteToFile (
void *BootSector,
char *FileName
)
/*++
Routine Description:
Write 512 bytes boot sector to file.
Arguments:
BootSector - point to a buffer containing 512 bytes boot sector to write
FileName - file to write to
Return:
int - number of bytes wrote,
512 indicates write successful
0 indicates write failure
--*/
{
FILE *FileHandle;
int result;
FileHandle = fopen (LongFilePath (FileName), "r+b");
if (FileHandle == NULL) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "Open file: %s", FileName);
return 0;
}
fseek (FileHandle, 0, SEEK_SET);
result = fwrite (BootSector, 1, 512, FileHandle);
if (result != 512) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "Write file: %s", FileName);
result = 0;
}
fclose (FileHandle);
return result;
}
int ReadFromFile (
void *BootSector,
char *FileName
)
/*++
Routine Description:
Read first 512 bytes from file.
Arguments:
BootSector - point to a buffer receiving the first 512 bytes data from file
FileName - file to read from
Return:
int - number of bytes read,
512 indicates read successful
0 indicates read failure
--*/
{
FILE *FileHandle;
int result;
FileHandle = fopen (LongFilePath (FileName), "rb");
if (FileHandle == NULL) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E0001: Error opening file: %s", FileName);
return 0;
}
result = fread (BootSector, 1, 512, FileHandle);
if (result != 512) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E0004: Error reading file: %s", FileName);
result = 0;
}
fclose (FileHandle);
return result;
}
char *
FatTypeToString (
IN FAT_TYPE FatType
)
/*++
Routine Description:
Convert enum type of FatType to string
--*/
{
switch (FatType) {
case FatTypeFat12:
return "FAT12";
case FatTypeFat16:
return "FAT16";
case FatTypeFat32:
return "FAT32";
default:
break;
}
return "FAT Unknown";
}
FAT_TYPE
GetFatType (
IN FAT_BPB_STRUCT *FatBpb
)
/*++
Routine Description:
Determine the FAT type according to BIOS Paramater Block (BPB) data
Arguments:
FatBpb - BIOS Parameter Block (BPB) data, 512 Bytes
Return:
FatTypeUnknown - Cannot determine the FAT type
FatTypeFat12 - FAT12
FatTypeFat16 - FAT16
FatTypeFat32 - FAT32
--*/
{
FAT_TYPE FatType;
UINTN RootDirSectors;
UINTN FATSz;
UINTN TotSec;
UINTN DataSec;
UINTN CountOfClusters;
CHAR8 FilSysType[9];
FatType = FatTypeUnknown;
//
// Simple check
//
if (FatBpb->Fat12_16.Signature != FAT_BS_SIGNATURE) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - Signature Invalid - %04x, expected: %04x",
FatBpb->Fat12_16.Signature, FAT_BS_SIGNATURE);
return FatTypeUnknown;
}
//
// Check according to FAT spec
//
if ((FatBpb->Fat12_16.BS_jmpBoot[0] != FAT_BS_JMP1) &&
(FatBpb->Fat12_16.BS_jmpBoot[0] != FAT_BS_JMP2)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BS_jmpBoot - %02x, expected: %02x or %02x",
FatBpb->Fat12_16.BS_jmpBoot[0], FAT_BS_JMP1, FAT_BS_JMP2);
return FatTypeUnknown;
}
if ((FatBpb->Fat12_16.BPB_BytsPerSec != 512) &&
(FatBpb->Fat12_16.BPB_BytsPerSec != 1024) &&
(FatBpb->Fat12_16.BPB_BytsPerSec != 2048) &&
(FatBpb->Fat12_16.BPB_BytsPerSec != 4096)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_BytsPerSec - %04x, expected: %04x, %04x, %04x, or %04x",
FatBpb->Fat12_16.BPB_BytsPerSec, 512, 1024, 2048, 4096);
return FatTypeUnknown;
}
if (FatBpb->Fat12_16.BPB_BytsPerSec != 512) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT - BPB_BytsPerSec - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_BytsPerSec, 512);
}
if ((FatBpb->Fat12_16.BPB_SecPerClus != 1) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 2) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 4) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 8) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 16) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 32) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 64) &&
(FatBpb->Fat12_16.BPB_SecPerClus != 128)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_SecPerClus - %02x, expected: %02x, %02x, %02x, %02x, %02x, %02x, %02x, or %02x",
FatBpb->Fat12_16.BPB_BytsPerSec, 1, 2, 4, 8, 16, 32, 64, 128);
return FatTypeUnknown;
}
if (FatBpb->Fat12_16.BPB_BytsPerSec * FatBpb->Fat12_16.BPB_SecPerClus > 32 * 1024) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_BytsPerSec * BPB_SecPerClus - %08x, expected: <= %08x",
FatBpb->Fat12_16.BPB_BytsPerSec * FatBpb->Fat12_16.BPB_SecPerClus, 32 * 1024);
return FatTypeUnknown;
}
if (FatBpb->Fat12_16.BPB_RsvdSecCnt == 0) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_RsvdSecCnt - %04x, expected: Non-Zero Value",
FatBpb->Fat12_16.BPB_RsvdSecCnt);
return FatTypeUnknown;
}
if (FatBpb->Fat12_16.BPB_NumFATs != 2) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT - BPB_NumFATs - %02x, expected: %02x",
FatBpb->Fat12_16.BPB_NumFATs, 2);
}
if ((FatBpb->Fat12_16.BPB_Media != 0xF0) &&
(FatBpb->Fat12_16.BPB_Media != 0xF8) &&
(FatBpb->Fat12_16.BPB_Media != 0xF9) &&
(FatBpb->Fat12_16.BPB_Media != 0xFA) &&
(FatBpb->Fat12_16.BPB_Media != 0xFB) &&
(FatBpb->Fat12_16.BPB_Media != 0xFC) &&
(FatBpb->Fat12_16.BPB_Media != 0xFD) &&
(FatBpb->Fat12_16.BPB_Media != 0xFE) &&
(FatBpb->Fat12_16.BPB_Media != 0xFF)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_Media - %02x, expected: %02x, %02x, %02x, %02x, %02x, %02x, %02x, %02x, or %02x",
FatBpb->Fat12_16.BPB_Media, 0xF0, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF);
return FatTypeUnknown;
}
//
// Algo in FAT spec
//
RootDirSectors = ((FatBpb->Fat12_16.BPB_RootEntCnt * sizeof(FAT_DIRECTORY_ENTRY)) +
(FatBpb->Fat12_16.BPB_BytsPerSec - 1)) /
FatBpb->Fat12_16.BPB_BytsPerSec;
if (FatBpb->Fat12_16.BPB_FATSz16 != 0) {
FATSz = FatBpb->Fat12_16.BPB_FATSz16;
} else {
FATSz = FatBpb->Fat32.BPB_FATSz32;
}
if (FATSz == 0) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_FATSz16, BPB_FATSz32 - 0, expected: Non-Zero Value");
return FatTypeUnknown;
}
if (FatBpb->Fat12_16.BPB_TotSec16 != 0) {
TotSec = FatBpb->Fat12_16.BPB_TotSec16;
} else {
TotSec = FatBpb->Fat12_16.BPB_TotSec32;
}
if (TotSec == 0) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT - BPB_TotSec16, BPB_TotSec32 - 0, expected: Non-Zero Value");
return FatTypeUnknown;
}
DataSec = TotSec - (
FatBpb->Fat12_16.BPB_RsvdSecCnt +
FatBpb->Fat12_16.BPB_NumFATs * FATSz +
RootDirSectors
);
CountOfClusters = DataSec / FatBpb->Fat12_16.BPB_SecPerClus;
if (CountOfClusters < FAT_MAX_FAT12_CLUSTER) {
FatType = FatTypeFat12;
} else if (CountOfClusters < FAT_MAX_FAT16_CLUSTER) {
FatType = FatTypeFat16;
} else {
FatType = FatTypeFat32;
}
//
// Check according to FAT spec
//
if (((FatType == FatTypeFat12) || (FatType == FatTypeFat16)) &&
(FatBpb->Fat12_16.BPB_RsvdSecCnt != 1)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT12_16 - BPB_RsvdSecCnt - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_RsvdSecCnt, 1);
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat12_16.BPB_RsvdSecCnt != 32)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BPB_RsvdSecCnt - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_RsvdSecCnt, 32);
}
if ((FatType == FatTypeFat16) &&
(FatBpb->Fat12_16.BPB_RootEntCnt != 512)) {
printf ("WARNING: FAT16: BPB_RootEntCnt - %04x, expected - %04x\n",
FatBpb->Fat12_16.BPB_RootEntCnt, 512);
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat12_16.BPB_RootEntCnt != 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_RootEntCnt - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_RootEntCnt, 0);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat12_16.BPB_TotSec16 != 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_TotSec16 - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_TotSec16, 0);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat12_16.BPB_FATSz16 != 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_FATSz16 - %04x, expected: %04x",
FatBpb->Fat12_16.BPB_FATSz16, 0);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat12_16.BPB_TotSec32 == 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_TotSec32 - %04x, expected: Non-Zero",
(unsigned) FatBpb->Fat12_16.BPB_TotSec32);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BPB_FATSz32 == 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_FATSz32 - %08x, expected: Non-Zero",
(unsigned) FatBpb->Fat32.BPB_FATSz32);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BPB_FSVer != 0)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BPB_FSVer - %08x, expected: %04x",
FatBpb->Fat32.BPB_FSVer, 0);
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BPB_RootClus != 2)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BPB_RootClus - %08x, expected: %04x",
(unsigned) FatBpb->Fat32.BPB_RootClus, 2);
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BPB_FSInfo != 1)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BPB_FSInfo - %08x, expected: %04x",
FatBpb->Fat32.BPB_FSInfo, 1);
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BPB_BkBootSec != 6)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BPB_BkBootSec - %08x, expected: %04x",
FatBpb->Fat32.BPB_BkBootSec, 6);
}
if ((FatType == FatTypeFat32) &&
((*(UINT32 *)FatBpb->Fat32.BPB_Reserved != 0) ||
(*((UINT32 *)FatBpb->Fat32.BPB_Reserved + 1) != 0) ||
(*((UINT32 *)FatBpb->Fat32.BPB_Reserved + 2) != 0))) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BPB_Reserved - %02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x, expected: 0",
FatBpb->Fat32.BPB_Reserved[0],
FatBpb->Fat32.BPB_Reserved[1],
FatBpb->Fat32.BPB_Reserved[2],
FatBpb->Fat32.BPB_Reserved[3],
FatBpb->Fat32.BPB_Reserved[4],
FatBpb->Fat32.BPB_Reserved[5],
FatBpb->Fat32.BPB_Reserved[6],
FatBpb->Fat32.BPB_Reserved[7],
FatBpb->Fat32.BPB_Reserved[8],
FatBpb->Fat32.BPB_Reserved[9],
FatBpb->Fat32.BPB_Reserved[10],
FatBpb->Fat32.BPB_Reserved[11]);
return FatTypeUnknown;
}
if (((FatType == FatTypeFat12) || (FatType == FatTypeFat16)) &&
(FatBpb->Fat12_16.BS_Reserved1 != 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT12_16 - BS_Reserved1 - %02x, expected: 0\n",
FatBpb->Fat12_16.BS_Reserved1);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BS_Reserved1 != 0)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BS_Reserved1 - %02x, expected: 0\n",
FatBpb->Fat32.BS_Reserved1);
return FatTypeUnknown;
}
if (((FatType == FatTypeFat12) || (FatType == FatTypeFat16)) &&
(FatBpb->Fat12_16.BS_BootSig != FAT_BS_BOOTSIG)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT12_16 - BS_BootSig - %02x, expected: %02x\n",
FatBpb->Fat12_16.BS_BootSig, FAT_BS_BOOTSIG);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat32) &&
(FatBpb->Fat32.BS_BootSig != FAT_BS_BOOTSIG)) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3003: FAT32 - BS_BootSig - %02x, expected: %02x\n",
FatBpb->Fat32.BS_BootSig, FAT_BS_BOOTSIG);
return FatTypeUnknown;
}
if ((FatType == FatTypeFat12) || (FatType == FatTypeFat16)) {
memcpy (FilSysType, FatBpb->Fat12_16.BS_FilSysType, 8);
FilSysType[8] = 0;
if ((FatType == FatTypeFat12) &&
(strcmp (FilSysType, FAT12_FILSYSTYPE) != 0) &&
(strcmp (FilSysType, FAT_FILSYSTYPE) != 0)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT12 - BS_FilSysType - %s, expected: %s, or %s\n",
FilSysType, FAT12_FILSYSTYPE, FAT_FILSYSTYPE);
}
if ((FatType == FatTypeFat16) &&
(strcmp (FilSysType, FAT16_FILSYSTYPE) != 0) &&
(strcmp (FilSysType, FAT_FILSYSTYPE) != 0)) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT16 - BS_FilSysType - %s, expected: %s, or %s\n",
FilSysType, FAT16_FILSYSTYPE, FAT_FILSYSTYPE);
}
}
if (FatType == FatTypeFat32) {
memcpy (FilSysType, FatBpb->Fat32.BS_FilSysType, 8);
FilSysType[8] = 0;
if (strcmp (FilSysType, FAT32_FILSYSTYPE) != 0) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3003: FAT32 - BS_FilSysType - %s, expected: %s\n",
FilSysType, FAT32_FILSYSTYPE);
}
}
//
// pass all check, get FAT type
//
return FatType;
}
void
ParseBootSector (
char *FileName
)
{
FAT_BPB_STRUCT FatBpb;
FAT_TYPE FatType;
if (ReadFromFile ((void *)&FatBpb, FileName) == 0) {
return ;
}
FatType = GetFatType (&FatBpb);
if (FatType <= FatTypeUnknown || FatType >= FatTypeMax) {
printf ("ERROR: E3002: Unknown FAT Type!\n");
return;
}
printf ("\nBoot Sector %s:\n", FatTypeToString (FatType));
printf ("\n");
printf (" Offset Title Data\n");
printf ("==================================================================\n");
printf (" 0 JMP instruction %02x %02x %02x\n",
FatBpb.Fat12_16.BS_jmpBoot[0],
FatBpb.Fat12_16.BS_jmpBoot[1],
FatBpb.Fat12_16.BS_jmpBoot[2]);
printf (" 3 OEM %c%c%c%c%c%c%c%c\n",
FatBpb.Fat12_16.BS_OEMName[0],
FatBpb.Fat12_16.BS_OEMName[1],
FatBpb.Fat12_16.BS_OEMName[2],
FatBpb.Fat12_16.BS_OEMName[3],
FatBpb.Fat12_16.BS_OEMName[4],
FatBpb.Fat12_16.BS_OEMName[5],
FatBpb.Fat12_16.BS_OEMName[6],
FatBpb.Fat12_16.BS_OEMName[7]);
printf ("\n");
printf ("BIOS Parameter Block\n");
printf (" B Bytes per sector %04x\n", FatBpb.Fat12_16.BPB_BytsPerSec);
printf (" D Sectors per cluster %02x\n", FatBpb.Fat12_16.BPB_SecPerClus);
printf (" E Reserved sectors %04x\n", FatBpb.Fat12_16.BPB_RsvdSecCnt);
printf (" 10 Number of FATs %02x\n", FatBpb.Fat12_16.BPB_NumFATs);
printf (" 11 Root entries %04x\n", FatBpb.Fat12_16.BPB_RootEntCnt);
printf (" 13 Sectors (under 32MB) %04x\n", FatBpb.Fat12_16.BPB_TotSec16);
printf (" 15 Media descriptor %02x\n", FatBpb.Fat12_16.BPB_Media);
printf (" 16 Sectors per FAT (small vol.) %04x\n", FatBpb.Fat12_16.BPB_FATSz16);
printf (" 18 Sectors per track %04x\n", FatBpb.Fat12_16.BPB_SecPerTrk);
printf (" 1A Heads %04x\n", FatBpb.Fat12_16.BPB_NumHeads);
printf (" 1C Hidden sectors %08x\n", (unsigned) FatBpb.Fat12_16.BPB_HiddSec);
printf (" 20 Sectors (over 32MB) %08x\n", (unsigned) FatBpb.Fat12_16.BPB_TotSec32);
printf ("\n");
if (FatType != FatTypeFat32) {
printf (" 24 BIOS drive %02x\n", FatBpb.Fat12_16.BS_DrvNum);
printf (" 25 (Unused) %02x\n", FatBpb.Fat12_16.BS_Reserved1);
printf (" 26 Ext. boot signature %02x\n", FatBpb.Fat12_16.BS_BootSig);
printf (" 27 Volume serial number %08x\n", (unsigned) FatBpb.Fat12_16.BS_VolID);
printf (" 2B Volume lable %c%c%c%c%c%c%c%c%c%c%c\n",
FatBpb.Fat12_16.BS_VolLab[0],
FatBpb.Fat12_16.BS_VolLab[1],
FatBpb.Fat12_16.BS_VolLab[2],
FatBpb.Fat12_16.BS_VolLab[3],
FatBpb.Fat12_16.BS_VolLab[4],
FatBpb.Fat12_16.BS_VolLab[5],
FatBpb.Fat12_16.BS_VolLab[6],
FatBpb.Fat12_16.BS_VolLab[7],
FatBpb.Fat12_16.BS_VolLab[8],
FatBpb.Fat12_16.BS_VolLab[9],
FatBpb.Fat12_16.BS_VolLab[10]);
printf (" 36 File system %c%c%c%c%c%c%c%c\n",
FatBpb.Fat12_16.BS_FilSysType[0],
FatBpb.Fat12_16.BS_FilSysType[1],
FatBpb.Fat12_16.BS_FilSysType[2],
FatBpb.Fat12_16.BS_FilSysType[3],
FatBpb.Fat12_16.BS_FilSysType[4],
FatBpb.Fat12_16.BS_FilSysType[5],
FatBpb.Fat12_16.BS_FilSysType[6],
FatBpb.Fat12_16.BS_FilSysType[7]);
printf ("\n");
} else {
printf ("FAT32 Section\n");
printf (" 24 Sectors per FAT (large vol.) %08x\n", (unsigned) FatBpb.Fat32.BPB_FATSz32);
printf (" 28 Flags %04x\n", FatBpb.Fat32.BPB_ExtFlags);
printf (" 2A Version %04x\n", FatBpb.Fat32.BPB_FSVer);
printf (" 2C Root dir 1st cluster %08x\n", (unsigned) FatBpb.Fat32.BPB_RootClus);
printf (" 30 FSInfo sector %04x\n", FatBpb.Fat32.BPB_FSInfo);
printf (" 32 Backup boot sector %04x\n", FatBpb.Fat32.BPB_BkBootSec);
printf (" 34 (Reserved) %02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
FatBpb.Fat32.BPB_Reserved[0],
FatBpb.Fat32.BPB_Reserved[1],
FatBpb.Fat32.BPB_Reserved[2],
FatBpb.Fat32.BPB_Reserved[3],
FatBpb.Fat32.BPB_Reserved[4],
FatBpb.Fat32.BPB_Reserved[5],
FatBpb.Fat32.BPB_Reserved[6],
FatBpb.Fat32.BPB_Reserved[7],
FatBpb.Fat32.BPB_Reserved[8],
FatBpb.Fat32.BPB_Reserved[9],
FatBpb.Fat32.BPB_Reserved[10],
FatBpb.Fat32.BPB_Reserved[11]);
printf ("\n");
printf (" 40 BIOS drive %02x\n", FatBpb.Fat32.BS_DrvNum);
printf (" 41 (Unused) %02x\n", FatBpb.Fat32.BS_Reserved1);
printf (" 42 Ext. boot signature %02x\n", FatBpb.Fat32.BS_BootSig);
printf (" 43 Volume serial number %08x\n", (unsigned) FatBpb.Fat32.BS_VolID);
printf (" 47 Volume lable %c%c%c%c%c%c%c%c%c%c%c\n",
FatBpb.Fat32.BS_VolLab[0],
FatBpb.Fat32.BS_VolLab[1],
FatBpb.Fat32.BS_VolLab[2],
FatBpb.Fat32.BS_VolLab[3],
FatBpb.Fat32.BS_VolLab[4],
FatBpb.Fat32.BS_VolLab[5],
FatBpb.Fat32.BS_VolLab[6],
FatBpb.Fat32.BS_VolLab[7],
FatBpb.Fat32.BS_VolLab[8],
FatBpb.Fat32.BS_VolLab[9],
FatBpb.Fat32.BS_VolLab[10]);
printf (" 52 File system %c%c%c%c%c%c%c%c\n",
FatBpb.Fat32.BS_FilSysType[0],
FatBpb.Fat32.BS_FilSysType[1],
FatBpb.Fat32.BS_FilSysType[2],
FatBpb.Fat32.BS_FilSysType[3],
FatBpb.Fat32.BS_FilSysType[4],
FatBpb.Fat32.BS_FilSysType[5],
FatBpb.Fat32.BS_FilSysType[6],
FatBpb.Fat32.BS_FilSysType[7]);
printf ("\n");
}
printf (" 1FE Signature %04x\n", FatBpb.Fat12_16.Signature);
printf ("\n");
return ;
}
void
PatchBootSector (
char *DestFileName,
char *SourceFileName,
BOOLEAN ForcePatch
)
/*++
Routine Description:
Patch destination file according to the information from source file.
Only patch BPB data but leave boot code un-touched.
Arguments:
DestFileName - Destination file to patch
SourceFileName - Source file where patch from
--*/
{
FAT_BPB_STRUCT DestFatBpb;
FAT_BPB_STRUCT SourceFatBpb;
FAT_TYPE DestFatType;
FAT_TYPE SourceFatType;
CHAR8 VolLab[11];
CHAR8 FilSysType[8];
if (ReadFromFile ((void *)&DestFatBpb, DestFileName) == 0) {
return ;
}
if (ReadFromFile ((void *)&SourceFatBpb, SourceFileName) == 0) {
return ;
}
DestFatType = GetFatType (&DestFatBpb);
SourceFatType = GetFatType (&SourceFatBpb);
if (DestFatType != SourceFatType) {
//
// FAT type mismatch
//
if (ForcePatch) {
DebugMsg (NULL, 0, DEBUG_WARN, NULL, "ERROR: E3004: FAT type mismatch: Source - %s, Dest - %s",
FatTypeToString(SourceFatType), FatTypeToString(DestFatType));
} else {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3004: FAT type mismatch: Source - %s, Dest - %s",
FatTypeToString(SourceFatType), FatTypeToString(DestFatType));
return ;
}
}
if (SourceFatType <= FatTypeUnknown || SourceFatType >= FatTypeMax) {
DebugMsg (NULL, 0, DEBUG_ERROR, NULL, "ERROR: E3002: Unknown FAT Type!\n");
return;
}
//
// Copy BPB/boot data (excluding BS_jmpBoot, BS_OEMName, BootCode and Signature) from SourceFatBpb to DestFatBpb
//
printf ("Patching %s BPB: ", FatTypeToString (SourceFatType));
if (SourceFatType != FatTypeFat32) {
memcpy (
&DestFatBpb.Fat12_16.BPB_BytsPerSec,
&SourceFatBpb.Fat12_16.BPB_BytsPerSec,
((UINTN)&DestFatBpb.Fat12_16.Reserved - (UINTN)&DestFatBpb.Fat12_16.BPB_BytsPerSec)
);
} else {
memcpy (
&DestFatBpb.Fat32.BPB_BytsPerSec,
&SourceFatBpb.Fat32.BPB_BytsPerSec,
((UINTN)&DestFatBpb.Fat32.Reserved - (UINTN)&DestFatBpb.Fat32.BPB_BytsPerSec)
);
}
//
// Set BS_VolLab and BS_FilSysType of DestFatBpb
//
// BS_VolLab BS_FilSysType
// FAT12: EFI FAT12 FAT12
// FAT16: EFI FAT16 FAT16
// FAT32: EFI FAT32 FAT32
//
if (SourceFatType == FatTypeFat32) {
memcpy (VolLab, "EFI FAT32 ", sizeof(VolLab));
memcpy (FilSysType, FAT32_FILSYSTYPE, sizeof(FilSysType));
} else if (SourceFatType == FatTypeFat16) {
memcpy (VolLab, "EFI FAT16 ", sizeof(VolLab));
memcpy (FilSysType, FAT16_FILSYSTYPE, sizeof(FilSysType));
} else {
memcpy (VolLab, "EFI FAT12 ", sizeof(VolLab));
memcpy (FilSysType, FAT12_FILSYSTYPE, sizeof(FilSysType));
}
if (SourceFatType != FatTypeFat32) {
memcpy (DestFatBpb.Fat12_16.BS_VolLab, VolLab, sizeof(VolLab));
memcpy (DestFatBpb.Fat12_16.BS_FilSysType, FilSysType, sizeof(FilSysType));
} else {
memcpy (DestFatBpb.Fat32.BS_VolLab, VolLab, sizeof(VolLab));
memcpy (DestFatBpb.Fat32.BS_FilSysType, FilSysType, sizeof(FilSysType));
}
//
// Set Signature of DestFatBpb to 55AA
//
DestFatBpb.Fat12_16.Signature = FAT_BS_SIGNATURE;
//
// Write DestFatBpb
//
if (WriteToFile ((void *)&DestFatBpb, DestFileName)) {
printf ("successful!\n");
} else {
printf ("failed!\n");
}
return ;
}
void
ParseMbr (
char *FileName
)
{
MASTER_BOOT_RECORD Mbr;
if (ReadFromFile ((void *)&Mbr, FileName) == 0) {
return ;
}
printf ("\nMaster Boot Record:\n");
printf ("\n");
printf (" Offset Title Value\n");
printf ("==================================================================\n");
printf (" 0 Master bootstrap loader code (not list)\n");
printf (" 1B8 Windows disk signature %08x\n", (unsigned) Mbr.UniqueMbrSignature);
printf ("\n");
printf ("Partition Table Entry #1\n");
printf (" 1BE 80 = active partition %02x\n", Mbr.PartitionRecord[0].BootIndicator);
printf (" 1BF Start head %02x\n", Mbr.PartitionRecord[0].StartHead);
printf (" 1C0 Start sector %02x\n", Mbr.PartitionRecord[0].StartSector);
printf (" 1C1 Start cylinder %02x\n", Mbr.PartitionRecord[0].StartTrack);
printf (" 1C2 Partition type indicator %02x\n", Mbr.PartitionRecord[0].OSType);
printf (" 1C3 End head %02x\n", Mbr.PartitionRecord[0].EndHead);
printf (" 1C4 End sector %02x\n", Mbr.PartitionRecord[0].EndSector);
printf (" 1C5 End cylinder %02x\n", Mbr.PartitionRecord[0].EndTrack);
printf (" 1C6 Sectors preceding partition %08x\n", (unsigned) Mbr.PartitionRecord[0].StartingLBA);
printf (" 1CA Sectors in partition %08x\n", (unsigned) Mbr.PartitionRecord[0].SizeInLBA);
printf ("\n");
printf ("Partition Table Entry #2\n");
printf (" 1CE 80 = active partition %02x\n", Mbr.PartitionRecord[1].BootIndicator);
printf (" 1CF Start head %02x\n", Mbr.PartitionRecord[1].StartHead);
printf (" 1D0 Start sector %02x\n", Mbr.PartitionRecord[1].StartSector);
printf (" 1D1 Start cylinder %02x\n", Mbr.PartitionRecord[1].StartTrack);
printf (" 1D2 Partition type indicator %02x\n", Mbr.PartitionRecord[1].OSType);
printf (" 1D3 End head %02x\n", Mbr.PartitionRecord[1].EndHead);
printf (" 1D4 End sector %02x\n", Mbr.PartitionRecord[1].EndSector);
printf (" 1D5 End cylinder %02x\n", Mbr.PartitionRecord[1].EndTrack);
printf (" 1D6 Sectors preceding partition %08x\n", (unsigned) Mbr.PartitionRecord[1].StartingLBA);
printf (" 1DA Sectors in partition %08x\n", (unsigned) Mbr.PartitionRecord[1].SizeInLBA);
printf ("\n");
printf ("Partition Table Entry #3\n");
printf (" 1DE 80 = active partition %02x\n", Mbr.PartitionRecord[2].BootIndicator);
printf (" 1DF Start head %02x\n", Mbr.PartitionRecord[2].StartHead);
printf (" 1E0 Start sector %02x\n", Mbr.PartitionRecord[2].StartSector);
printf (" 1E1 Start cylinder %02x\n", Mbr.PartitionRecord[2].StartTrack);
printf (" 1E2 Partition type indicator %02x\n", Mbr.PartitionRecord[2].OSType);
printf (" 1E3 End head %02x\n", Mbr.PartitionRecord[2].EndHead);
printf (" 1E4 End sector %02x\n", Mbr.PartitionRecord[2].EndSector);
printf (" 1E5 End cylinder %02x\n", Mbr.PartitionRecord[2].EndTrack);
printf (" 1E6 Sectors preceding partition %08x\n", (unsigned) Mbr.PartitionRecord[2].StartingLBA);
printf (" 1EA Sectors in partition %08x\n", (unsigned) Mbr.PartitionRecord[2].SizeInLBA);
printf ("\n");
printf ("Partition Table Entry #4\n");
printf (" 1EE 80 = active partition %02x\n", Mbr.PartitionRecord[3].BootIndicator);
printf (" 1EF Start head %02x\n", Mbr.PartitionRecord[3].StartHead);
printf (" 1F0 Start sector %02x\n", Mbr.PartitionRecord[3].StartSector);
printf (" 1F1 Start cylinder %02x\n", Mbr.PartitionRecord[3].StartTrack);
printf (" 1F2 Partition type indicator %02x\n", Mbr.PartitionRecord[3].OSType);
printf (" 1F3 End head %02x\n", Mbr.PartitionRecord[3].EndHead);
printf (" 1F4 End sector %02x\n", Mbr.PartitionRecord[3].EndSector);
printf (" 1F5 End cylinder %02x\n", Mbr.PartitionRecord[3].EndTrack);
printf (" 1F6 Sectors preceding partition %08x\n", (unsigned) Mbr.PartitionRecord[3].StartingLBA);
printf (" 1FA Sectors in partition %08x\n", (unsigned) Mbr.PartitionRecord[3].SizeInLBA);
printf ("\n");
printf (" 1FE Signature %04x\n", Mbr.Signature);
printf ("\n");
return ;
}
void
PatchMbr (
char *DestFileName,
char *SourceFileName
)
{
MASTER_BOOT_RECORD DestMbr;
MASTER_BOOT_RECORD SourceMbr;
if (ReadFromFile ((void *)&DestMbr, DestFileName) == 0) {
return ;
}
if (ReadFromFile ((void *)&SourceMbr, SourceFileName) == 0) {
return ;
}
if (SourceMbr.Signature != MBR_SIGNATURE) {
printf ("ERROR: E3000: Invalid MBR!\n");
return;
}
printf ("Patching MBR:\n");
memcpy (
&DestMbr.PartitionRecord[0],
&SourceMbr.PartitionRecord[0],
sizeof(DestMbr.PartitionRecord)
);
DestMbr.Signature = MBR_SIGNATURE;
if (WriteToFile ((void *)&DestMbr, DestFileName)) {
printf ("\tsuccessful!\n");
}
return ;
}
int
main (
int argc,
char *argv[]
)
{
char *SrcImage;
char *DstImage;
BOOLEAN ForcePatch; // -f
BOOLEAN ProcessMbr; // -m
BOOLEAN DoParse; // -p SrcImage or -g SrcImage DstImage
BOOLEAN Verbose; // -v
UINT64 LogLevel;
EFI_STATUS EfiStatus;
SrcImage = DstImage = NULL;
ForcePatch = FALSE;
ProcessMbr = FALSE;
DoParse = TRUE;
Verbose = FALSE;
SetUtilityName ("bootsectimage");
argc--; argv++;
if (argc == 0) {
Usage ();
return -1;
}
while (argc != 0) {
if (strcmp (*argv, "-f") == 0 || strcmp (*argv, "--force") == 0) {
ForcePatch = TRUE;
} else if (strcmp (*argv, "-p") == 0 || strcmp (*argv, "--parse") == 0) {
DoParse = TRUE;
argc--; argv++;
if (argc < 1) {
Usage ();
return -1;
}
SrcImage = *argv;
} else if (strcmp (*argv, "-g") == 0 || strcmp (*argv, "--patch") == 0) {
DoParse = FALSE;
argc--; argv++;
if (argc < 2) {
Usage ();
return -1;
}
SrcImage = *argv;
argc--; argv++;
DstImage = *argv;
} else if (strcmp (*argv, "-m") == 0 || strcmp (*argv, "--mbr") == 0) {
ProcessMbr = TRUE;
} else if (strcmp (*argv, "-v") == 0 || strcmp (*argv, "--verbose") == 0) {
Verbose = TRUE;
} else if (strcmp (*argv, "--version") == 0) {
Version();
return 0;
} else if ((stricmp (*argv, "-d") == 0) || (stricmp (*argv, "--debug") == 0)) {
argc--; argv++;
if (argc < 1) {
Usage ();
return -1;
}
EfiStatus = AsciiStringToUint64 (*argv, FALSE, &LogLevel);
if (EFI_ERROR (EfiStatus)) {
Error (NULL, 0, 1003, "Invalid option value", "%s = %s", "--debug", *argv);
return 1;
}
if (LogLevel > 9) {
Error (NULL, 0, 1003, "Invalid option value", "Debug Level range is 0-9, currnt input level is %d", (int) LogLevel);
return 1;
}
SetPrintLevel (LogLevel);
DebugMsg (NULL, 0, 9, "Debug Mode Set", "Debug Output Mode Level %s is set!", *argv);
} else {
Usage ();
return -1;
}
argc--; argv++;
}
if (ForcePatch && DoParse) {
printf ("ERROR: E1002: Conflicting options: -f, -p. Cannot apply force(-f) to parse(-p)!\n");
Usage ();
return -1;
}
if (ForcePatch && !DoParse && ProcessMbr) {
printf ("ERROR: E1002: Conflicting options: -f, -g -m. Cannot apply force(-f) to processing MBR (-g -m)!\n");
Usage ();
return -1;
}
if (Verbose) {
SetPrintLevel (VERBOSE_LOG_LEVEL);
} else {
SetPrintLevel (KEY_LOG_LEVEL);
}
if (DoParse) {
if (ProcessMbr) {
ParseMbr (SrcImage);
} else {
ParseBootSector (SrcImage);
}
} else {
if (ProcessMbr) {
PatchMbr (DstImage, SrcImage);
} else {
PatchBootSector (DstImage, SrcImage, ForcePatch);
}
}
return 0;
}

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@ -1,152 +0,0 @@
/** @file
Fat file system structure and definition.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _FAT_BPB_H_
#define _FAT_BPB_H_
#include "CommonLib.h"
#pragma pack(1)
typedef struct {
//
// Fat common field
//
UINT8 BS_jmpBoot[3];
CHAR8 BS_OEMName[8];
UINT16 BPB_BytsPerSec;
UINT8 BPB_SecPerClus;
UINT16 BPB_RsvdSecCnt;
UINT8 BPB_NumFATs;
UINT16 BPB_RootEntCnt;
UINT16 BPB_TotSec16;
UINT8 BPB_Media;
UINT16 BPB_FATSz16;
UINT16 BPB_SecPerTrk;
UINT16 BPB_NumHeads;
UINT32 BPB_HiddSec;
UINT32 BPB_TotSec32;
//
// Fat12/16 specific field
//
UINT8 BS_DrvNum;
UINT8 BS_Reserved1;
UINT8 BS_BootSig;
UINT32 BS_VolID;
CHAR8 BS_VolLab[11];
CHAR8 BS_FilSysType[8];
//
// Boot Code and Data
//
UINT8 Reserved[448];
//
// Fat common signature - 0xAA55
//
UINT16 Signature;
} FAT12_16_BPB_STRUCT;
typedef struct {
//
// Fat common field
//
UINT8 BS_jmpBoot[3];
CHAR8 BS_OEMName[8];
UINT16 BPB_BytsPerSec;
UINT8 BPB_SecPerClus;
UINT16 BPB_RsvdSecCnt;
UINT8 BPB_NumFATs;
UINT16 BPB_RootEntCnt;
UINT16 BPB_TotSec16;
UINT8 BPB_Media;
UINT16 BPB_FATSz16;
UINT16 BPB_SecPerTrk;
UINT16 BPB_NumHeads;
UINT32 BPB_HiddSec;
UINT32 BPB_TotSec32;
//
// Fat32 specific field
//
UINT32 BPB_FATSz32;
UINT16 BPB_ExtFlags;
UINT16 BPB_FSVer;
UINT32 BPB_RootClus;
UINT16 BPB_FSInfo;
UINT16 BPB_BkBootSec;
UINT8 BPB_Reserved[12];
UINT8 BS_DrvNum;
UINT8 BS_Reserved1;
UINT8 BS_BootSig;
UINT32 BS_VolID;
CHAR8 BS_VolLab[11];
CHAR8 BS_FilSysType[8];
//
// Boot Code and Data
//
UINT8 Reserved[420];
//
// Fat common signature - 0xAA55
//
UINT16 Signature;
} FAT32_BPB_STRUCT;
typedef union {
FAT12_16_BPB_STRUCT Fat12_16;
FAT32_BPB_STRUCT Fat32;
} FAT_BPB_STRUCT;
typedef enum {
FatTypeUnknown,
FatTypeFat12,
FatTypeFat16,
FatTypeFat32,
FatTypeMax
} FAT_TYPE;
typedef struct {
CHAR8 DIR_Name[11];
UINT8 DIR_Attr;
UINT8 DIR_NTRes;
UINT8 DIR_CrtTimeTenth;
UINT16 DIR_CrtTime;
UINT16 DIR_CrtDate;
UINT16 DIR_LstAccDate;
UINT16 DIR_FstClusHI;
UINT16 DIR_WrtTime;
UINT16 DIR_WrtDate;
UINT16 DIR_FstClusLO;
UINT32 DIR_FileSize;
} FAT_DIRECTORY_ENTRY;
#pragma pack()
#define FAT_MAX_FAT12_CLUSTER 0xFF5
#define FAT_MAX_FAT16_CLUSTER 0xFFF5
#define FAT_BS_SIGNATURE 0xAA55
#define FAT_BS_BOOTSIG 0x29
#define FAT_BS_JMP1 0xEB
#define FAT_BS_JMP2 0xE9
#define FAT_FILSYSTYPE "FAT "
#define FAT12_FILSYSTYPE "FAT12 "
#define FAT16_FILSYSTYPE "FAT16 "
#define FAT32_FILSYSTYPE "FAT32 "
#endif

View File

@ -1,58 +0,0 @@
/** @file
MBR Partition Entry and Table structure defintions.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _MBR_H_
#define _MBR_H_
#include "CommonLib.h"
#pragma pack(1)
#define MAX_MBR_PARTITIONS 4
//
// MBR Partition Entry
//
typedef struct {
UINT8 BootIndicator;
UINT8 StartHead;
UINT8 StartSector;
UINT8 StartTrack;
UINT8 OSType;
UINT8 EndHead;
UINT8 EndSector;
UINT8 EndTrack;
UINT32 StartingLBA;
UINT32 SizeInLBA;
} MBR_PARTITION_RECORD;
//
// MBR Partition table
//
typedef struct {
UINT8 BootCode[440];
UINT32 UniqueMbrSignature;
UINT16 Unknown;
MBR_PARTITION_RECORD PartitionRecord[MAX_MBR_PARTITIONS];
UINT16 Signature;
} MASTER_BOOT_RECORD;
#pragma pack()
#define MBR_SIGNATURE 0xAA55
#define EXTENDED_DOS_PARTITION 0x05
#define EXTENDED_WINDOWS_PARTITION 0x0F
#endif

View File

@ -882,72 +882,6 @@ InternalSafeStringNoStrOverlap (
return !InternalSafeStringIsOverlap (Str1, Size1 * sizeof(CHAR16), Str2, Size2 * sizeof(CHAR16));
}
RETURN_STATUS
StrDecimalToUintnS (
CONST CHAR16 *String,
CHAR16 **EndPointer, OPTIONAL
UINTN *Data
)
{
ASSERT (((UINTN) String & BIT0) == 0);
//
// 1. Neither String nor Data shall be a null pointer.
//
SAFE_STRING_CONSTRAINT_CHECK ((String != NULL), RETURN_INVALID_PARAMETER);
SAFE_STRING_CONSTRAINT_CHECK ((Data != NULL), RETURN_INVALID_PARAMETER);
//
// 2. The length of String shall not be greater than RSIZE_MAX.
//
if (RSIZE_MAX != 0) {
SAFE_STRING_CONSTRAINT_CHECK ((StrnLenS (String, RSIZE_MAX + 1) <= RSIZE_MAX), RETURN_INVALID_PARAMETER);
}
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
//
// Ignore the pad spaces (space or tab)
//
while ((*String == L' ') || (*String == L'\t')) {
String++;
}
//
// Ignore leading Zeros after the spaces
//
while (*String == L'0') {
String++;
}
*Data = 0;
while (InternalIsDecimalDigitCharacter (*String)) {
//
// If the number represented by String overflows according to the range
// defined by UINTN, then MAX_UINTN is stored in *Data and
// RETURN_UNSUPPORTED is returned.
//
if (*Data > ((MAX_UINTN - (*String - L'0')) / 10)) {
*Data = MAX_UINTN;
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
return RETURN_UNSUPPORTED;
}
*Data = *Data * 10 + (*String - L'0');
String++;
}
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
return RETURN_SUCCESS;
}
/**
Convert a Null-terminated Unicode decimal string to a value of type UINT64.
@ -1064,9 +998,9 @@ StrDecimalToUint64S (
/**
Convert a Null-terminated Unicode hexadecimal string to a value of type
UINTN.
UINT64.
This function outputs a value of type UINTN by interpreting the contents of
This function outputs a value of type UINT64 by interpreting the contents of
the Unicode string specified by String as a hexadecimal number. The format of
the input Unicode string String is:
@ -1091,8 +1025,8 @@ StrDecimalToUint64S (
If String has no valid hexadecimal digits in the above format, then 0 is
stored at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINTN, then
MAX_UINTN is stored at the location pointed to by Data.
If the number represented by String exceeds the range defined by UINT64, then
MAX_UINT64 is stored at the location pointed to by Data.
If EndPointer is not NULL, a pointer to the character that stopped the scan
is stored at the location pointed to by EndPointer. If String has no valid
@ -1112,86 +1046,10 @@ StrDecimalToUint64S (
characters, not including the
Null-terminator.
@retval RETURN_UNSUPPORTED If the number represented by String exceeds
the range defined by UINTN.
the range defined by UINT64.
**/
RETURN_STATUS
StrHexToUintnS (
CONST CHAR16 *String,
CHAR16 **EndPointer, OPTIONAL
UINTN *Data
)
{
ASSERT (((UINTN) String & BIT0) == 0);
//
// 1. Neither String nor Data shall be a null pointer.
//
SAFE_STRING_CONSTRAINT_CHECK ((String != NULL), RETURN_INVALID_PARAMETER);
SAFE_STRING_CONSTRAINT_CHECK ((Data != NULL), RETURN_INVALID_PARAMETER);
//
// 2. The length of String shall not be greater than RSIZE_MAX.
//
if (RSIZE_MAX != 0) {
SAFE_STRING_CONSTRAINT_CHECK ((StrnLenS (String, RSIZE_MAX + 1) <= RSIZE_MAX), RETURN_INVALID_PARAMETER);
}
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
//
// Ignore the pad spaces (space or tab)
//
while ((*String == L' ') || (*String == L'\t')) {
String++;
}
//
// Ignore leading Zeros after the spaces
//
while (*String == L'0') {
String++;
}
if (InternalCharToUpper (*String) == L'X') {
if (*(String - 1) != L'0') {
*Data = 0;
return RETURN_SUCCESS;
}
//
// Skip the 'X'
//
String++;
}
*Data = 0;
while (InternalIsHexaDecimalDigitCharacter (*String)) {
//
// If the number represented by String overflows according to the range
// defined by UINTN, then MAX_UINTN is stored in *Data and
// RETURN_UNSUPPORTED is returned.
//
if (*Data > ((MAX_UINTN - InternalHexCharToUintn (*String)) >> 4)) {
*Data = MAX_UINTN;
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
return RETURN_UNSUPPORTED;
}
*Data = (*Data << 4) + InternalHexCharToUintn (*String);
String++;
}
if (EndPointer != NULL) {
*EndPointer = (CHAR16 *) String;
}
return RETURN_SUCCESS;
}
RETURN_STATUS
StrHexToUint64S (
CONST CHAR16 *String,
CHAR16 **EndPointer, OPTIONAL
@ -1291,28 +1149,6 @@ StrHexToUint64 (
return Result;
}
UINTN
StrDecimalToUintn (
CONST CHAR16 *String
)
{
UINTN Result;
StrDecimalToUintnS (String, (CHAR16 **) NULL, &Result);
return Result;
}
UINTN
StrHexToUintn (
CONST CHAR16 *String
)
{
UINTN Result;
StrHexToUintnS (String, (CHAR16 **) NULL, &Result);
return Result;
}
UINTN
StrSize (
CONST CHAR16 *String
@ -1400,7 +1236,6 @@ InternalAllocateCopyPool (
VOID *Memory;
ASSERT (Buffer != NULL);
ASSERT (AllocationSize <= (MAX_ADDRESS - (UINTN) Buffer + 1));
Memory = malloc (AllocationSize);
if (Memory != NULL) {
@ -1785,7 +1620,7 @@ StrToIpv4Address (
{
RETURN_STATUS Status;
UINTN AddressIndex;
UINTN Uintn;
UINT64 Uint64;
EFI_IPv4_ADDRESS LocalAddress;
UINT8 LocalPrefixLength;
CHAR16 *Pointer;
@ -1812,7 +1647,7 @@ StrToIpv4Address (
//
// Get D or P.
//
Status = StrDecimalToUintnS ((CONST CHAR16 *) Pointer, &Pointer, &Uintn);
Status = StrDecimalToUint64S ((CONST CHAR16 *) Pointer, &Pointer, &Uint64);
if (RETURN_ERROR (Status)) {
return RETURN_UNSUPPORTED;
}
@ -1820,18 +1655,18 @@ StrToIpv4Address (
//
// It's P.
//
if (Uintn > 32) {
if (Uint64 > 32) {
return RETURN_UNSUPPORTED;
}
LocalPrefixLength = (UINT8) Uintn;
LocalPrefixLength = (UINT8) Uint64;
} else {
//
// It's D.
//
if (Uintn > MAX_UINT8) {
if (Uint64 > MAX_UINT8) {
return RETURN_UNSUPPORTED;
}
LocalAddress.Addr[AddressIndex] = (UINT8) Uintn;
LocalAddress.Addr[AddressIndex] = (UINT8) Uint64;
AddressIndex++;
}
@ -1888,7 +1723,7 @@ StrToIpv6Address (
{
RETURN_STATUS Status;
UINTN AddressIndex;
UINTN Uintn;
UINT64 Uint64;
EFI_IPv6_ADDRESS LocalAddress;
UINT8 LocalPrefixLength;
CONST CHAR16 *Pointer;
@ -1969,7 +1804,7 @@ StrToIpv6Address (
//
// Get X.
//
Status = StrHexToUintnS (Pointer, &End, &Uintn);
Status = StrHexToUint64S (Pointer, &End, &Uint64);
if (RETURN_ERROR (Status) || End - Pointer > 4) {
//
// Number of hexadecimal digit characters is no more than 4.
@ -1978,24 +1813,24 @@ StrToIpv6Address (
}
Pointer = End;
//
// Uintn won't exceed MAX_UINT16 if number of hexadecimal digit characters is no more than 4.
// Uint64 won't exceed MAX_UINT16 if number of hexadecimal digit characters is no more than 4.
//
ASSERT (AddressIndex + 1 < ARRAY_SIZE (Address->Addr));
LocalAddress.Addr[AddressIndex] = (UINT8) ((UINT16) Uintn >> 8);
LocalAddress.Addr[AddressIndex + 1] = (UINT8) Uintn;
LocalAddress.Addr[AddressIndex] = (UINT8) ((UINT16) Uint64 >> 8);
LocalAddress.Addr[AddressIndex + 1] = (UINT8) Uint64;
AddressIndex += 2;
} else {
//
// Get P, then exit the loop.
//
Status = StrDecimalToUintnS (Pointer, &End, &Uintn);
if (RETURN_ERROR (Status) || End == Pointer || Uintn > 128) {
Status = StrDecimalToUint64S (Pointer, &End, &Uint64);
if (RETURN_ERROR (Status) || End == Pointer || Uint64 > 128) {
//
// Prefix length should not exceed 128.
//
return RETURN_UNSUPPORTED;
}
LocalPrefixLength = (UINT8) Uintn;
LocalPrefixLength = (UINT8) Uint64;
Pointer = End;
break;
}
@ -2252,9 +2087,9 @@ Strtoi (
)
{
if (IsHexStr (Str)) {
return StrHexToUintn (Str);
return (UINTN)StrHexToUint64 (Str);
} else {
return StrDecimalToUintn (Str);
return (UINTN)StrDecimalToUint64 (Str);
}
}

View File

@ -22,8 +22,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define MAX_LONG_FILE_PATH 500
#define MAX_UINTN MAX_ADDRESS
#define MAX_UINT64 ((UINT64)0xFFFFFFFFFFFFFFFFULL)
#define MAX_UINT32 ((UINT32)0xFFFFFFFF)
#define MAX_UINT16 ((UINT16)0xFFFF)
#define MAX_UINT8 ((UINT8)0xFF)
#define ARRAY_SIZE(Array) (sizeof (Array) / sizeof ((Array)[0]))
@ -250,16 +250,6 @@ StrSize (
CONST CHAR16 *String
);
UINTN
StrHexToUintn (
CONST CHAR16 *String
);
UINTN
StrDecimalToUintn (
CONST CHAR16 *String
);
UINT64
StrHexToUint64 (
CONST CHAR16 *String
@ -277,13 +267,6 @@ StrHexToUint64S (
UINT64 *Data
);
RETURN_STATUS
StrHexToUintnS (
CONST CHAR16 *String,
CHAR16 **EndPointer, OPTIONAL
UINTN *Data
);
RETURN_STATUS
StrDecimalToUint64S (
CONST CHAR16 *String,
@ -291,13 +274,6 @@ StrDecimalToUint64S (
UINT64 *Data
);
RETURN_STATUS
StrDecimalToUintnS (
CONST CHAR16 *String,
CHAR16 **EndPointer, OPTIONAL
UINTN *Data
);
VOID *
ReallocatePool (
UINTN OldSize,

View File

@ -520,7 +520,7 @@ EisaIdFromText (
return (((Text[0] - 'A' + 1) & 0x1f) << 10)
+ (((Text[1] - 'A' + 1) & 0x1f) << 5)
+ (((Text[2] - 'A' + 1) & 0x1f) << 0)
+ (UINT32) (StrHexToUintn (&Text[3]) << 16)
+ (UINT32) (StrHexToUint64 (&Text[3]) << 16)
;
}
@ -1506,7 +1506,7 @@ DevPathFromTextNVMe (
Index = sizeof (Nvme->NamespaceUuid) / sizeof (UINT8);
while (Index-- != 0) {
Uuid[Index] = (UINT8) StrHexToUintn (SplitStr (&NamespaceUuidStr, L'-'));
Uuid[Index] = (UINT8) StrHexToUint64 (SplitStr (&NamespaceUuidStr, L'-'));
}
return (EFI_DEVICE_PATH_PROTOCOL *) Nvme;

View File

@ -62,7 +62,7 @@ IsDevicePathValid (
ASSERT (DevicePath != NULL);
if (MaxSize == 0) {
MaxSize = MAX_UINTN;
MaxSize = MAX_UINT32;
}
//
@ -78,7 +78,7 @@ IsDevicePathValid (
return FALSE;
}
if (NodeLength > MAX_UINTN - Size) {
if (NodeLength > MAX_UINT32 - Size) {
return FALSE;
}
Size += NodeLength;

View File

@ -1,319 +0,0 @@
/** @file
Creates and EFILDR image.
This tool combines several PE Image files together using following format denoted as EBNF:
FILE := EFILDR_HEADER
EFILDR_IMAGE +
<PeImageFileContent> +
The order of EFILDR_IMAGE is same as the order of placing PeImageFileContent.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "ParseInf.h"
#include "CommonLib.h"
#include "EfiUtilityMsgs.h"
#define MAX_PE_IMAGES 63
#define FILE_TYPE_FIXED_LOADER 0
#define FILE_TYPE_RELOCATABLE_PE_IMAGE 1
typedef struct {
UINT32 CheckSum;
UINT32 Offset;
UINT32 Length;
UINT8 FileName[52];
} EFILDR_IMAGE;
typedef struct {
UINT32 Signature;
UINT32 HeaderCheckSum;
UINT32 FileLength;
UINT32 NumberOfImages;
} EFILDR_HEADER;
//
// Utility Name
//
#define UTILITY_NAME "EfiLdrImage"
//
// Utility version information
//
#define UTILITY_MAJOR_VERSION 1
#define UTILITY_MINOR_VERSION 0
void
Version (
void
)
/*++
Routine Description:
Displays the standard utility information to SDTOUT
Arguments:
None
Returns:
None
--*/
{
printf ("%s Version %d.%d Build %s\n", UTILITY_NAME, UTILITY_MAJOR_VERSION, UTILITY_MINOR_VERSION, __BUILD_VERSION);
}
VOID
Usage (
VOID
)
{
printf ("Usage: EfiLdrImage -o OutImage LoaderImage PeImage1 PeImage2 ... PeImageN\n");
printf ("%s Version %d.%d Build %s\n", UTILITY_NAME, UTILITY_MAJOR_VERSION, UTILITY_MINOR_VERSION, __BUILD_VERSION);
printf ("Copyright (c) 1999-2017 Intel Corporation. All rights reserved.\n");
printf ("\n The EfiLdrImage tool is used to combine PE files into EFILDR image with Efi loader header.\n");
}
EFI_STATUS
CountVerboseLevel (
IN CONST CHAR8* VerboseLevelString,
IN CONST UINT64 Length,
OUT UINT64 *ReturnValue
)
{
UINT64 i = 0;
for (;i < Length; ++i) {
if (VerboseLevelString[i] != 'v' && VerboseLevelString[i] != 'V') {
return EFI_ABORTED;
}
++(*ReturnValue);
}
return EFI_SUCCESS;
}
UINT64
FCopyFile (
FILE *in,
FILE *out
)
/*++
Routine Description:
Write all the content of input file to output file.
Arguments:
in - input file pointer
out - output file pointer
Return:
UINT64 : file size of input file
--*/
{
UINT32 filesize, offset, length;
CHAR8 Buffer[8*1024];
fseek (in, 0, SEEK_END);
filesize = ftell(in);
fseek (in, 0, SEEK_SET);
offset = 0;
while (offset < filesize) {
length = sizeof(Buffer);
if (filesize-offset < length) {
length = filesize-offset;
}
fread (Buffer, length, 1, in);
fwrite (Buffer, length, 1, out);
offset += length;
}
return filesize;
}
int
main (
int argc,
char *argv[]
)
/*++
Routine Description:
Arguments:
Returns:
--*/
{
UINT64 i;
UINT64 filesize;
FILE *fpIn, *fpOut;
EFILDR_HEADER EfiLdrHeader;
EFILDR_IMAGE EfiLdrImage[MAX_PE_IMAGES];
CHAR8* OutputFileName = NULL;
CHAR8* InputFileNames[MAX_PE_IMAGES + 1];
UINT8 InputFileCount = 0;
UINT64 DebugLevel = 0;
UINT64 VerboseLevel = 0;
EFI_STATUS Status = EFI_SUCCESS;
SetUtilityName (UTILITY_NAME);
if (argc == 1) {
printf ("Usage: EfiLdrImage -o OutImage LoaderImage PeImage1 PeImage2 ... PeImageN\n");
return STATUS_ERROR;
}
argc --;
argv ++;
if ((stricmp (argv[0], "-h") == 0) || (stricmp (argv[0], "--help") == 0)) {
Usage();
return STATUS_SUCCESS;
}
if (stricmp (argv[0], "--version") == 0) {
Version();
return STATUS_SUCCESS;
}
while (argc > 0) {
if ((stricmp (argv[0], "-o") == 0) || (stricmp (argv[0], "--output") == 0)) {
OutputFileName = argv[1];
if (OutputFileName == NULL) {
Error (NULL, 0, 1003, "Invalid option value", "Output file can't be null");
return STATUS_ERROR;
}
argc -= 2;
argv += 2;
continue;
}
if ((stricmp (argv[0], "-q") == 0) || (stricmp (argv[0], "--quiet") == 0)) {
argc --;
argv ++;
continue;
}
if ((strlen(argv[0]) >= 2 && argv[0][0] == '-' && (argv[0][1] == 'v' || argv[0][1] == 'V')) || (stricmp (argv[0], "--verbose") == 0)) {
VerboseLevel = 1;
if (strlen(argv[0]) > 2) {
Status = CountVerboseLevel (&argv[0][2], strlen(argv[0]) - 2, &VerboseLevel);
if (EFI_ERROR (Status)) {
Error (NULL, 0, 1003, "Invalid option value", "%s", argv[0]);
return STATUS_ERROR;
}
}
argc --;
argv ++;
continue;
}
if ((stricmp (argv[0], "-d") == 0) || (stricmp (argv[0], "--debug") == 0)) {
Status = AsciiStringToUint64 (argv[1], FALSE, &DebugLevel);
if (EFI_ERROR (Status)) {
Error (NULL, 0, 1003, "Invalid option value", "%s = %s", argv[0], argv[1]);
return STATUS_ERROR;
}
argc -= 2;
argv += 2;
continue;
}
//
// Don't recognize the parameter, should be regarded as the input file name.
//
InputFileNames[InputFileCount] = argv[0];
InputFileCount++;
argc--;
argv++;
}
if (InputFileCount == 0) {
Error (NULL, 0, 1001, "Missing option", "No input file");
return STATUS_ERROR;
}
//
// Open output file for write
//
if (OutputFileName == NULL) {
Error (NULL, 0, 1001, "Missing option", "No output file");
return STATUS_ERROR;
}
fpOut = fopen (LongFilePath (OutputFileName), "w+b");
if (!fpOut) {
Error (NULL, 0, 0001, "Could not open output file", OutputFileName);
return STATUS_ERROR;
}
memset (&EfiLdrHeader, 0, sizeof (EfiLdrHeader));
memset (&EfiLdrImage, 0, sizeof (EFILDR_IMAGE) * (InputFileCount));
memcpy (&EfiLdrHeader.Signature, "EFIL", 4);
EfiLdrHeader.FileLength = sizeof(EFILDR_HEADER) + sizeof(EFILDR_IMAGE)*(InputFileCount);
//
// Skip the file header first
//
fseek (fpOut, EfiLdrHeader.FileLength, SEEK_SET);
//
// copy all the input files to the output file
//
for(i=0;i<InputFileCount;i++) {
//
// Copy the content of PeImage file to output file
//
fpIn = fopen (LongFilePath (InputFileNames[i]), "rb");
if (!fpIn) {
Error (NULL, 0, 0001, "Could not open input file", InputFileNames[i]);
fclose (fpOut);
return STATUS_ERROR;
}
filesize = FCopyFile (fpIn, fpOut);
fclose(fpIn);
//
// And in the same time update the EfiLdrHeader and EfiLdrImage array
//
EfiLdrImage[i].Offset = EfiLdrHeader.FileLength;
EfiLdrImage[i].Length = (UINT32) filesize;
strncpy ((CHAR8*) EfiLdrImage[i].FileName, InputFileNames[i], sizeof (EfiLdrImage[i].FileName) - 1);
EfiLdrHeader.FileLength += (UINT32) filesize;
EfiLdrHeader.NumberOfImages++;
}
//
// Write the image header to the output file finally
//
fseek (fpOut, 0, SEEK_SET);
fwrite (&EfiLdrHeader, sizeof(EFILDR_HEADER) , 1, fpOut);
fwrite (&EfiLdrImage , sizeof(EFILDR_IMAGE)*(InputFileCount), 1, fpOut);
fclose (fpOut);
printf ("Created %s\n", OutputFileName);
return 0;
}

View File

@ -1,21 +0,0 @@
## @file
# GNU/Linux makefile for 'EfiLdrImage' module build.
#
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
MAKEROOT ?= ..
APPNAME = EfiLdrImage
LIBS = -lCommon
OBJECTS = EfiLdrImage.o
include $(MAKEROOT)/Makefiles/app.makefile

View File

@ -1,22 +0,0 @@
## @file
# Windows makefile for 'EfiLdrImage' module build.
#
# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
!INCLUDE ..\Makefiles\ms.common
APPNAME = EfiLdrImage
LIBS = $(LIB_PATH)\Common.lib
OBJECTS = EfiLdrImage.obj
!INCLUDE ..\Makefiles\ms.app

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