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Author SHA1 Message Date
b24306f15d NetworkPkg: Fix incorrect unicode string of the AKM/Cipher Suite
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3813

The size of buffer should be 3 CHAR16 for Null-terminated Unicode
string.
The first char is the AKM/Cipher Suite number, the second char is ' ',
the third char is '\0'.

Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Signed-off-by: Heng Luo <heng.luo@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2022-02-21 15:19:40 +00:00
8a57673316 ShellPkg: Fix Ping GetTimerPeriod API failure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3819

Ping GetTimerPeriod API returns sometime zero value when
StallCounter has smaller value than RttTimerTick (divide by zero)
which results some failure at ping UEFI shell command

Signed-off-by: MohammedX Rehan <mohammedx.rehan@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2022-02-16 08:09:46 +00:00
c28e376edc OvmfPkg/FvbServicesSmm: use the VmgExitLibNull
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3835

The commit ade62c18f4 caused a boot failure
when OVMF is build with SECURE_BOOT/SMM enabled.

This happen because the above commit extended the BaseMemEncryptSevLib.inf
to include VmgExitLib. The FvbServicesSmm uses the functions provided
by the MemEncryptSevLib to clear the memory encryption mask from the
page table. It created a dependency, as shown below

OvmfPkg/FvbServicesSmm.inf
 ---> MemEncryptSevLib                   class
 ---> "OvmfPkg/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf"  instance
 ---> VmgExitLib
 ---> "OvmfPkg/VmgExitLib"    instance
 ---> LocalApicLib                       class
 ---> UefiCpuPkg/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf    instance
 ---> TimerLib                           class
 ---> "OvmfPkg/AcpiTimerLib/DxeAcpiTimerLib.inf"              instance
 ---> PciLib                             class
 ---> "OvmfPkg/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf"     instance

The LocalApicLib provides a constructor, execution of the constructor
causes an exception. The SEV-ES and SEV-SNP do not support the SMM, so
skip including the VmgExitLib chain. Use the module override to use the
VmgExitLibNull to avoid the inclusion of unneeded LocalApicLib dependency
chain in FvbServicesSmm. We ran similar issue for AmdSevDxe driver,
see commit 19914edc5a

After the patch, the dependency look like this:

OvmfPkg/FvbServicesSmm.inf
 ---> MemEncryptSevLib                   class
 ---> "OvmfPkg/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf"  instance
 ---> VmgExitLib
 ---> "UefiCpuPkg/Library/VmgExitLibNull"    instance

Fixes: ade62c18f4
Reported-by: Aaron Young <aaron.young@oracle.com>
Cc: Dann Frazier <dann.frazier@canonical.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Tested-by: dann frazier <dann.frazier@canonical.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2022-02-16 06:51:58 +00:00
85589ddbf6 OvmfPkg/VmgExitLib: Fix uninitialized variable warning with XCODE5
XCODE5 reported the following warning:

OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c:1895:12: note:
uninitialized use occurs here
           Compacted
           ^^^^^^^^^

Initialize the 'Compacted' variable to fix the warning.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-15 10:17:31 +00:00
1193aa2dfb MdeModulePkg: update brotli submodule
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3417
Update the brotli submodule to the latest commit (f4153a0)
so that the build isn't broken in GCC 11 compilers.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Pedro Falcato <pedro.falcato@gmail.com>

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-15 02:13:32 +00:00
42af706dfb BaseTools: Update brotli submodule
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3417
Update the brotli submodule to the latest commit (f4153a0)
so that the build isn't broken in GCC 11 compilers.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-15 02:13:32 +00:00
c9b7c6e0cc BaseTools: Update CLANG{35,38}_WARNING_OVERRIDES to ignore unused vars
Building with the CLANG35 and CLANG38 toolset fails because of variables
which are set but not otherwise used in the RELEASE build.

GCC added -Wno-unused-but-set-variable back in 2016, and later added
-Wno-unused-const-variable. Add those to CLANG35_WARNING_OVERRIDES and
CLANG38_WARNING_OVERRIDES.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2022-02-10 02:03:57 +00:00
b360b0b589 Maintainers.txt: Update email address
Update Email address for Xiaoyu Lu.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Xiaoyu Lu <xiaoyu1.lu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2022-02-07 17:03:48 +00:00
1f54eaa725 Maintainers.txt: update email for Leif Lindholm
NUVIA inc. was acquired by Qualcomm in March 2021, but we continued
contributions under the existing IDs until the start of this year.
We are now switching to use Qualcomm Innovation Center email, so
update Maintainers.txt to reflect this.

Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2022-02-07 11:40:56 +00:00
bd676f080a Maintainers.txt: add missing github IDs to OvmfPkf/Fdt reviewers
This section seems to have been missed when introducing github IDs,
so add them.

Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2022-02-07 11:40:56 +00:00
96b8b5fd10 MdeModulePkg/UiApp: Fix spelling of 'FRONTPAGE'
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-07 08:03:32 +00:00
f78b937c95 MdeModulePkg/RuntimeDxe: clear mVirtualMapMaxIndex
When setting mVirtualMap to NULL also set mVirtualMapMaxIndex to 0.
Without that RuntimeDriverConvertPointer() will go search the ZeroPage
for EFI_MEMORY_DESCRIPTOR entries.

In case mVirtualMapMaxIndex happens to be small small enough that'll go
unnoticed, the search will not find anything and EFI_NOT_FOUND will be
returned.

In case mVirtualMapMaxIndex is big enough the search will reach the end
of the ZeroPage and trigger a page fault.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-07 05:31:17 +00:00
d4ac53aa91 BaseTools: Fix error leg in DscBuildData.py
Fix a Edk2Logger.warn() message format to match the arguments.

We ran into this after a failure in PcdValueInit.  The failure was
masked by a new exception, "TypeError: not all arguments converted
during string formatting".

Signed-off-by: Jake Garver <jake@nvidia.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-07 03:29:20 +00:00
c09dbc92e9 BaseTools/Conf: Add new macro for customizing dll file reduction.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3810

New macro OBJCOPY_STRIPFLAG is added in build_rule.template to replace
'--strip-unneeded -R .eh_frame', so that module can have some unique
objcopy flags for its own purpose.
In tools_def.template, set '--strip-unneeded -R .eh_frame' as default
value of OBJCOPY_STRIPFLAG.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-02-07 02:39:18 +00:00
6fb09da89f ShellPkg: Fix incorrect PPTT FlagName dereference
Bugzilla: 3770 (https://bugzilla.tianocore.org/show_bug.cgi?id=3770)

The PPTT parser in AcpiView incorrectly dereferences a pointer to
FlagName when trying to log an error with the PPTT cache flags, which
can lead to random crashes and other errors.

Also fix some spacing in the error message to ensure the message is
printed cleanly.

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-02-07 01:52:17 +00:00
a4b7aa362d MdeModulePkg/Bus/Pci/PciBusDxe: Support platform PCI ROM override
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3811

Remove ASSERT() statements that are triggered if a platform provides
an override of PCI ROM attached to a PCI Controller.  The PCI Platform
Protocol allows the platform to provide a PCI ROM image for a PCI
Controller.  This works for PCI Controllers that do not have an attached
PCI ROM, but the platform is not allowed to replace the PCI ROM for a
PCI Controller that has its own PCI ROM.  Removing these ASSERT()
statements enables this additional use case.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-04 18:10:25 +00:00
33189f0527 DynamicTablesPkg: Add AmlCodeGenMethodRetInteger function
Add AmlCodeGenMethodRetInteger function to generate AML code for
a Method returning an Integer.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-02-02 18:38:55 +00:00
007a95055b DynamicTablesPkg: Remove redundant cast in AmlCodeGenReturn
In AmlCodeGenReturn, the cast to AML_NODE_HEADER* in the call to
AmlSetFixedArgument is redundant because ReturnNode is already a
AML_NODE_HEADER* .

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-02-02 18:38:55 +00:00
45b1612659 DynamicTablesPkg: Add Memory32Fixed function
Add a Memory32Fixed function to generate code for the corresponding
Memory32Fixed macro in AML.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-02-02 18:38:55 +00:00
017564d637 ArmPkg/ArmMmuLib AARCH64: avoid EL0 accessible mappings
We never run any code at EL0, and so it would seem that any access
permissions set for EL0 (via the AP[1] attribute in the page tables) are
irrelevant. We currently set EL0 and EL1 permissions to the same value
arbitrarily.

However, this causes problems on hardware like the Apple M1 running the
MacOS hypervisor framework, which enters EL1 with SCTLR_EL1.SPAN
enabled, causing the Privileged Access Never (PAN) feature to be enabled
on any exception taken to EL1, including the IRQ exceptions that handle
our timer interrupt. When PAN is enabled, EL1 has no access to any
mappings that are also accessible to EL0, causing the firmware to crash
if it attempts to access such a mapping.

Even though it is debatable whether or not SCTLR_EL1.SPAN should be
disabled at entry or whether the firmware should put all UNKNOWN bits in
all system registers in a consistent state (which it should), using EL0
permissions serves no purpose whatsoever so let's fix that regardless.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Alexander Graf <agraf@csgraf.de>
Acked-by: Leif Lindholm <leif@nuviainc.com>
2022-02-01 23:09:01 +00:00
5b3c682d91 ArmVirtPkg/Kvmtool: Enable Acpiview
Acpiview is a command line tool allowing to display, dump, or check
installed ACPI tables. Add a 'ACPIVIEW_ENABLE' switch to enable it
on an ArmVirt platform.

The switch is set for the ArmVirtKvmTool platform.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
17a02163bd ArmVirtPkg/Kvmtool: Enable ACPI support
A Configuration Manager that uses the Dynamic Tables framework
to generate ACPI tables for Kvmtool Guests has been provided.
This Configuration Manager uses the FdtHwInfoParser module to
parse the Kvmtool Device Tree and generate the required
Configuration Manager objects for generating the ACPI tables.

Therefore, enable ACPI table generation for Kvmtool.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3742
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
312ef7a0a4 ArmVirtPkg/Kvmtool: Add Configuration Manager
Add Configuration Manager to enable ACPI tables for Kvmtool
firmware. The Configuration Manager for Kvmtool uses the DT
Hardware Information Parser module (FdtHwInfoParser) to parse
the DT provided by Kvmtool. The FdtHwInfoParser parses the DT
and invokes the callback function HW_INFO_ADD_OBJECT to add
the Configuration Manager objects to the Platform Information
repository.

The information for some Configuration Manager objects may not
be available in the DT. Such objects are initialised locally
by the Configuration Manager.

Support for the following ACPI tables is provided:
 - DBG2
 - DSDT (Empty stub)
 - FADT
 - GTDT
 - MADT
 - SPCR
 - SSDT (Cpu Hierarchy)
 - SSDT (Pcie bus)

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
0dbd356983 ArmVirtPkg/Kvmtool: Add DSDT ACPI table
Most ACPI tables for Kvmtool firmware are dynamically
generated. The AML code is also generated at runtime
for most components in appropriate SSDTs.

Although there may not be much to describe in the DSDT,
the DSDT table is mandatory.

Therefore, add an empty stub for DSDT.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
dc1118fa0d ArmVirtPkg: Add cspell exceptions
The cpsell tool checks for unknown words in the upstream CI.
Add some new words to the list of exceptions.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
5816bd3eab DynamicTablesPkg: AcpiSsdtPcieLibArm: Remove link device generation
In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts
can be defined following 2 models.
In the first model, _PRT entries reference link devices. Link devices
then describe interrupts. This allows to dynamically modify
interrupts through _SRS and _PRS objects and to choose exactly the
interrupt type (level/edge triggered, active high/low).
In the second model, interrupt numbder are described in the _PRT entry.
The interrupt type is then assumed by the OS.

The Arm BSA, sE.6 "Legacy interrupts" states that PCI legacy
interrupts must be converted to SPIs, and programmed level-sensitive,
active high. Thus any OS must configure interrupts as such and there
is no need to specify the interrupt type.
Plus it is not possible to dynamically configure PCI interrupts.

Thus remove the link device generation and use the second model
for _PRT.

Suggested-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
5751d60821 DynamicTablesPkg: AmlLib: AmlAddPrtEntry() to handle GSI
In ACPI 6.4, s6.2.13, _PRT objects describing PCI legacy interrupts
can be defined following 2 models.
In the first model, _PRT entries reference link devices. Link devices
then describe interrupts. This allows to dynamically modify
interrupts through _SRS and _PRS objects and to choose exactly the
interrupt type (level/edge triggered, active high/low).
In the second model, interrupt numbers are described in the _PRT entry.
The interrupt type is then assumed by the OS.

AmlAddPrtEntry() currently only handles the first model. Make
changes to also handle the second model.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
13136cc311 DynamicTablesPkg: FdtHwInfoParserLib: Parse Pmu info
Parse the Pmu interrupts if a pmu compatible node is present,
and populate the MADT GicC structure accordingly.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
742dafd2cc DynamicTablesPkg: Print specifier macro for CM_OBJECT_ID
Add a macro that specifies the format for printing CM_OBJECT_ID.
This allows to print the CM_OBJECT_ID is a consistent way in the
output logs.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-02-01 17:39:34 +00:00
103fa647d1 ArmPkg: Replace CoreId and ClusterId with Mpidr in ARM_CORE_INFO struct
Remove the ClusterId and CoreId fields in the ARM_CORE_INFO structure in
favor of a new Mpidr field. Update code in
ArmPlatformPkg/PrePeiCore/MainMPCore and ArmPlatformPkg/PrePi/MainMPCore.c
to use the new field and call new macros GET_MPIDR_AFF0 and GET_MPIDR_AFF1
instead.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-30 11:04:41 +00:00
ba79becd55 OvmfPkg/BaseCachingPciExpressLib: Migrate BaseCachingPciExpressLib
Move BaseCachingPciExpressLib library from ArmVirtPkg to under OvmfPkg.
RISC-V Virt platform can leverage the same library to access PCI Express
registers through PCI Express base address set in PcdPciExpressBaseAddress
and cached in a global variable.

Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:36:59 +00:00
49a2d8cbf5 OvmfPkg/QemuVideoDxe: parse edid blob, detect display resolution
Check whenever an EDID blob is present.  In case it is get the display
resolution from it.  Unless PcdVideoResolutionSource indicates the
display resolution has been set already, update
PcdVideoHorizontalResolution and PcdVideoVerticalResolution accordingly.
Also add the resolution to the mode list.

This will make OVMF boot up with the display resolution configured by
QEMU, which is 1280x800 by default.  The resolution can be set using the
xres and yres properties.  Here is an example for FullHD:

qemu-system-x86_64 -device VGA,xres=1920,yres=1080

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3778
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1749250
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:04:21 +00:00
55c05427b9 OvmfPkg/QemuVideoDxe: factor out QemuVideoBochsAddMode
Add helper function to add a video mode to the list of modes.
Move code.  Minor debug logging tweaks, no other functional
change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:04:21 +00:00
336da55ca8 OvmfPkg/QemuVideoDxe: drop QEMU_VIDEO_BOCHS_MODES->ColorDepth
All video modes in the list are 32-bit,
so drop the useless ColorDepth field.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:04:21 +00:00
7f25ddbc03 OvmfPkg/QemuVideoDxe: simplify InitializeBochsGraphicsMode
struct QEMU_VIDEO_MODE_DATA has all the data needed to set the video
mode, there is no need to take the extra indirection and use
struct QEMU_VIDEO_BOCHS_MODES.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:04:21 +00:00
929804b172 OvmfPkg: add PcdVideoResolutionSource
It's a UINT8 (enum) PCD telling where the PcdVideoHorizontalResolution
and PcdVideoVerticalResolution values are coming from.  It can be:

 0 (unset aka default from dsc file), or
 1 (from PlatformConfig), or
 2 (set by Video Driver).

It will be used by video drivers to avoid overriding PlatformConfig
values, or override each others values in case multiple display devices
are present.

The underlying problem this tries to solve is that the GOP protocol has
no way to indicate the preferred video mode.  On physical hardware this
isn't much of a problem because using the highest resolution available
works just fine as that is typically the native display resolution

But in a virtual machine you don't want come up with a huge 4k window by
default just because the virtual vga is able to handle that.  Cutting
down the video mode list isn't a great solution either as that would
also remove the modes from the platform configuration so the user
wouldn't be able to pick a resolution higher than the default any more.

So with patch drivers can use use PcdVideoHorizontalResolution and
PcdVideoVerticalResolution to indicate what the preferred display
resolution is, without overwriting the user preferences from
PlatformConfig if present.

A possible alternative approach would be to extend the GOP protocol, but
I'm not sure this is a good plan given this is mostly a problem for
virtual machines and using PCDs allows to keep this local to OvmfPkg.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 17:04:21 +00:00
e95b44c90e ArmVirtPkg: change qemu default resolution to 1280x800
ovmf default display resolution is 800x600.  This is rather small for
modern guests.  qemu used 1024x768 as default for a long time and
switched the to 1280x800 recently[1] for the upcoming 7.0 release.

This patch brings ovmf in sync with the recent qemu update and likewise
switches the default to 1280x800.

[1] de72c4b7cd

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 16:16:15 +00:00
862ea6e836 OvmfPkg: change qemu default resolution to 1280x800
ovmf default display resolution is 800x600.  This is rather small for
modern guests.  qemu used 1024x768 as default for a long time and
switched the to 1280x800 recently[1] for the upcoming 7.0 release.

This patch brings ovmf in sync with the recent qemu update and likewise
switches the default to 1280x800.

[1] de72c4b7cd

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 16:16:15 +00:00
ae35314e7b Maintainers.txt: Add Sami Mujawar as reviewer for ArmPkg
Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2022-01-29 15:22:09 +00:00
8542fc5f95 NetworkPkg: Add the missing VariablePolicyHelperLib in NetworkPkg.dsc
This change is required by f4b7b473b4.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Maciej Rabeda <maciej.rabeda@linux.intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Siyuan Fu <siyuan.fu@intel.com>
2022-01-29 01:37:24 +00:00
76b3d45b75 ShellPkg: Add the missing VariablePolicyHelperLib in ShellPkg.dsc
This change is required by f4b7b473b4.

Signed-off-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
2022-01-29 01:37:24 +00:00
f4b7b473b4 MdeModulePkg/UefiBootManagerLib: Convert BmLoadOption to Variable Policy
Since the Variable Lock protocol is deprecated, convert locking of
PlatformRecovery#### in EfiBootManagerLoadOptionToVariable to use the
Variable Policy protocol.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-01-28 06:08:45 +00:00
a867f3a704 UefiPayloadPkg: Use BaseCpuTimerLib for Universal Payload by default
Current, a macro CPU_TIMER_LIB_ENABLE is added to determine which timerlib
is used. BaseCpuTimerLib.inf is a better way and only fit for recent CPU.
Meanwhile, Universal Payload are only aimed to work with recent CPU.
Therefore, for Universal Payload, use the BaseCpuTimerLib by default

Cc: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2022-01-28 02:12:25 +00:00
6777e67383 EmbeddedPkg: Fix a build error in FwVol.c in X64 arch
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3814

CompressedDataLength is declared as UINTN which is UINT64 in X64 arch.
But the second parameter of UefiDecompressGetInfo() is declared as
UINT32. So a build error is triggered. To declare CompressedDataLength
as UINT32 to fix the build error.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
2022-01-27 06:19:05 +00:00
8cc5590eab ArmPkg: MmCommunicationDxe: Update MM communicate MessageLength check
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751

Current MM communicate routine from ArmPkg would conduct few checks prior
to proceeding with SMC calls. However, the inspection step is different
from PI specification.

This patch updated MM communicate input argument inspection routine to
assure that "if the `MessageLength` is zero, or too large for the MM
implementation to manage, the MM implementation must update the
`MessageLength` to reflect the size of the `Data` buffer that it can
tolerate", as described by `EFI_MM_COMMUNICATION_PROTOCOL.Communicate()`
section in PI specification.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-01-27 02:16:17 +00:00
1aa1ec4574 ArmPkg: MmCommunicationDxe: Update MM communicate CommSize check
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751

Current MM communicate routine from ArmPkg would conduct few checks prior
to proceeding with SMC calls. However, the inspection step is different
from PI specification.

This patch updated MM communicate input argument inspection routine to
assure `CommSize` represents "the size of the data buffer being passed
in" instead of the size of the data being used from data buffer, as
described by section `EFI_MM_COMMUNICATION2_PROTOCOL.Communicate()` in PI
specification.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-01-27 02:16:17 +00:00
541a077bd1 ArmPkg: MmCommunicationDxe: Update MM communicate CommBuffer** checks
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3751

Current MM communicate routine from ArmPkg would conduct few checks prior
to proceeding with SMC calls. However, the inspection step is different
from PI specification.

This patch updated MM communicate input argument inspection routine to
assure that return code `EFI_INVALID_PARAMETER` represents "the
`CommBuffer**` parameters do not refer to the same location in memory",
as described by `EFI_MM_COMMUNICATION2_PROTOCOL.Communicate()` section
in PI specification.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-01-27 02:16:17 +00:00
ce37f45955 ArmPkg: MmCommunicationDxe: MM communicate function argument attributes
Current MM communicate2 function from ArmPkg described input arguments
`CommBufferPhysical`, `CommBufferVirtual` and `CommSize` as input only,
which mismatches with the "input and output type" as in PI specification.

This change updated function descriptions of MM communite2 to match input
argument types.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2022-01-27 02:16:17 +00:00
5b39832e18 MdePkg: MmCommunication2: Update MM communicate2 function description
Current MM communicate2 function definition described input arguments
`CommBufferPhysical`, `CommBufferVirtual` and `CommSize` as input only,
which mismatches with the "input and output type" as in PI specification.

This change updated function descriptions of MM communite2 definition to
match input argument types.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-01-27 02:16:17 +00:00
ee67067f17 MdeModulePkg: VariableSmmRuntimeDxe: Fix Variable Policy Message Length
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3709

In EDKII implementation of variable policy, the DXE runtime agent would
communicate to MM to disable, register or query policies. However, these
operations populate the value of MessageLength that includes communicate
header to include MM communicate header, which mismatches with the
description of PI specification.

This fix will correct the MessageLength field calculation to exclude
the size of MM_COMMUNICATE_HEADER.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-01-27 02:16:17 +00:00
7e5c603cba MdeModulePkg/SdMmcPciHcDxe: Robust improvements for SD card 1.8V switch
This changes is by adding 50ms delay during voltage switching from 3.3V to
1.8V, plus adding a goto Voltage33Retry for 3.3V checking and retrying.

Change is for Enabling OS boot from SD card through UEFI payload.

Signed-off-by: Aiman Rosli <muhammad.aiman.rosli@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2022-01-24 01:52:35 +00:00
21320ef669 MdeModulePkg/Variable: Make only EFI_VARIABLE_NON_VOLATILE invalid
Only EFI_VARIABLE_NON_VOLATILE attribute is an invalid combination
of attribute bits, so update the variable driver to return
EFI_INVALID_PARAMETER so that we can prevent the invalid variable
being created.

This change also fixes the SCT failure below:
 - RT.QueryVariableInfo - With being an invalid combination -- FAILURE

For details, please check the threads below:
 - https://edk2.groups.io/g/devel/topic/86486174
 - https://edk2.groups.io/g/devel/message/82466

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: G Edhaya Chandran <edhaya.chandran@arm.com>
Cc: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@arm.com>

Signed-off-by: Sunny Wang <sunny.wang@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-01-21 02:13:31 +00:00
7709988dd8 RedfishPkg/RedfishRestExDxe:Simplify status check
Remove redundant determine statements.
No functional change.

Cc: Abner Chang <abner.chang@hpe.com>
Cc: Nickle Wang <nickle.wang@hpe.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
2022-01-20 13:26:51 +00:00
772c5bb8dc FmpDevicePkg/FmpDxe: Update FmpDeviceCheckImageWithStatus() handling
Update the logic handling last attempt status codes from
FmpDeviceCheckImageWithStatus() implementations to account for
cases when the function return status code is EFI_SUCCESS
(since the image was checked successfully) but the ImageUpdatable
value is not valid.

In addition the following sentence is removed from the
LastAttemptStatus parameter definition for
FmpDeviceCheckImageWithStatus() since it can lead to confusion.
The expected status code value range is sufficient to implement
the library API.

  "This value will only be checked when this
   function returns an error."

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
2022-01-20 01:41:06 +00:00
5801910013 UefiPayloadPkg: Not use BaseCpuTimerLib by default.
For recent X86 CPU, 0x15 CPUID instruction will return Time Stamp
Counter. This is recommended way to get the time, and also how
BaseCpuTimerLib works However, some CPU doesn't support this feature,
so disable it by default.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2022-01-17 19:17:09 +00:00
59c48c9314 UefiPayloadPkg: Change the user interface name of the Uiapp
Chanage the name "Uiapp" to "Enter Setup".

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2022-01-17 18:29:57 +00:00
5302bd81d9 OvmfPkg: Add CloudHvX64 to the CI
Adding the newly created target for Cloud Hypervisor to the CI,
validating it can be properly built.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
b66056ef21 OvmfPkg/CloudHv: add Maintainers.txt entry
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
e73d1bf96a OvmfPkg/CloudHv: Remove CSM support
Cloud Hypervisor doesn't need the support for legacy BIOS, therefore the
CSM support can be removed.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
7b6cbe0a81 OvmfPkg/CloudHv: Remove USB support
Cloud Hypervisor doesn't emulate any USB controller or device, therefore
the support can be removed.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
196be601f9 OvmfPkg/CloudHv: Remove video support
No need for video or virtio-gpu support since Cloud Hypervisor doesn't
emulate any of these.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
71082d3d1b OvmfPkg/CloudHv: Reduce dependency on QemuFwCfg
Since Cloud Hypervisor doesn't rely on the FwCfg mechanism, remove the
libraries imports when possible.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
fdcea7ff6f OvmfPkg/CloudHv: Remove Q35 specifics
Anything specific to the QEMU Q35 platform is not relevant for the
CloudHv target.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
1552050ce7 OvmfPkg/CloudHv: Remove legacy 8259 PIC support
Cloud Hypervisor does not emulate any 8259 PIC, therefore there's no
reason to load the corresponding driver for it.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
6ecdda71fe OvmfPkg/CloudHv: Connect serial console
Cloud Hypervisor doesn't emulate any LPC bridge, therefore we simply
need to rely on the serial I/O port to be connected as a console.
It reuses the code from Xen since it's very generic.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
a2da72b2ca OvmfPkg/CloudHv: Replace legacy 8254 PIT with local APIC timer
Cloud Hypervisor doesn't emulate the legacy 8254 PIT, which is why
instead of relying on it as the timer UEFI services, rely on the
XenTimerDxe implementation. This is not Xen specific, as it simply uses
the local APIC timer triggering interrupts on the vector 32.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
c712ce2bb1 OvmfPkg/CloudHv: Add new target for Cloud Hypervisor
Adding the new target CloudHvX64, copied directly from OvmfPkgX64. The
point is to create a target dedicated for Cloud Hypervisor rather than
trying to support both QEMU and Cloud Hypervisor on the same target.

Improvements and cleanups will be performed in follow up patches.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-01-13 14:54:40 +00:00
7438a85bf1 BaseTools: Fix wrong variable header size
There are two type variable header and their size are different,
need to use matched size when calculating offset info, otherwise
it'll destroy other variables content when patching.

Signed-off-by: Chen, Lin Z <lin.z.chen@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2022-01-13 09:35:35 +00:00
6062002bd5 MdeModulePkg/PartitionDxe: Add break to handle invalid LBA0 in MBR
Read Disk does a modification of ExtMbrStartingLba with the code MultU64x32
(ExtMbrStartingLba, BlockSize) Error detection to see if ExtMbrStartingLBA
has a value of 0. This is invalid as LBA 0 = MBR. After modification, the
next time ExtMbrStartingLba is in this function if ExtMbrStartingLba is set
to 0 in the MBR it never passes the while/do evaluation It is multiplied by
0 by read disk , set to 0 by an invalid MBR and goes back to evaluation
This condition will also cause Ws19 and WS22 to hang, however Microsoft has
developed a hotfix patch that will be released in 2022

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>

Signed-off-by: Craig Edwards <craig.edwards@dell.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2022-01-10 07:16:05 +00:00
14a731096d UnitTestFrameworkPkg: CI YAML: Grant cmockery spell check exception
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3798

UnitTestFrameworkPkg.dec contains cmockery folder from cmocka submodule.
However, the term "cmockery" is unrecognized by cspell tool.

This change grants spell check exception to "cmockery" to prevent
pipeline building failure.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>

Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2022-01-08 03:47:09 +00:00
9dd14fc91c MdePkg: Add registers of boot partition feature
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3757

Add registers of boot partition feature which defined in NVM Express 1.4 Spec

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Maggie Chu <maggie.chu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-01-07 06:37:18 +00:00
079a58276b OvmfPkg/AmdSev/SecretPei: Mark SEV launch secret area as reserved
Mark the SEV launch secret MEMFD area as reserved, which will allow the
guest OS to use it during the lifetime of the OS, without creating
copies of the sensitive content.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Tobin Feldman-Fitzthum <tobin@linux.ibm.com>
Signed-off-by: Dov Murik <dovmurik@linux.ibm.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.Yao@intel.com>
Reviewed-by: Brijesh Singh <brijesh.singh@amd.com>
2022-01-04 08:06:53 +00:00
13d9e8ec98 MdeModulePkg: Put off UFS HCS.DP checking to fix timing problem
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3776

Put off UFS HCS.DP (Device Attached) checking
until UfsDeviceDetection() to fix timing problem.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ian Chiu <Ian.chiu@intel.com>
Cc: Maggie Chu <maggie.chu@intel.com>
Signed-off-by: VincentX Ke <vincentx.ke@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2022-01-04 02:23:14 +00:00
45920941d9 MdeModulePkg: Refactoring UFS DME request and fix timing problem
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3775

Refactoring UFS DME request function and retry up to 5 times.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ian Chiu <Ian.chiu@intel.com>
Cc: Maggie Chu <maggie.chu@intel.com>
Signed-off-by: VincentX Ke <vincentx.ke@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2022-01-04 02:23:14 +00:00
d463c56ddd MdeModulePkg: Replace with UFS_UNIT_DESC to fix timeout problem
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3714

Replace with UFS_UNIT_DESC to fix response timeout problem.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ian Chiu <Ian.chiu@intel.com>
Cc: Maggie Chu <maggie.chu@intel.com>
Signed-off-by: VincentX Ke <vincentx.ke@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2022-01-04 02:23:14 +00:00
c095122d4b MdeModulePkg/PciBusDxe: Enumerator to check for RCiEP before looking for RP
Before trying to access parent root port to check ARI capabilities,
enumerator should see if Endpoint device is not Root Complex integrated
to avoid undefined parent register accesses.

Signed-off-by: Damian Bassa <damian.bassa@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-29 13:45:29 +00:00
7935be0fbd IntelFsp2Pkg/FspSecCore: ExtendedImageRevision was not printed.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3791

ExtendedImageRevision should be printed when Header revision >= 6.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-12-29 02:03:25 +00:00
e910f076ad BaseTools: Fix the bug of --cmd-len build option
currently the --cmd-len build option does not work.
This patch is going to fix this bug.

Signed-off-by: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Yuwei Chen <yuwei.chen@intel.com>
2021-12-28 08:39:25 +00:00
6612ff8561 UefiCpuPkg: Extend measurement of microcode patches to TPM
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3683

TCG specification says BIOS should extend measurement of microcode to TPM.
However, reference BIOS is not doing this. BIOS shall extend measurement of
microcode to TPM.

Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min M Xu <min.m.xu@intel.com>
Cc: Qi Zhang <qi1.zhang@intel.com>
Signed-off-by: Longlong Yang <longlong.yang@intel.com>
2021-12-24 09:08:20 +00:00
15c596aeeb OvmfPkg: Bhyve: Delete unused AcpiTables/Ssdt.asl file
The Ssdt.asl file isn't used, so delete it.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Peter Grehan <grehan@freebsd.org>
2021-12-23 07:48:08 +00:00
ae8272ef78 MdeModulePkg/UsbBusDxe: fix NOOPT build error
gcc-11 (fedora 35):

/home/kraxel/projects/edk2/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c: In function ?UsbIoBulkTransfer?:
/home/kraxel/projects/edk2/MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBus.c:277:12: error: ?UsbHcBulkTransfer? accessing 80 bytes in a region of size 8 [-Werror=stringop-overflow=]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-12-23 01:27:49 +00:00
9ec2cc1f31 IntelFsp2WrapperPkg : Remove EFIAPI from local functions.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642

Local functions do not need EFIAPI.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
2021-12-22 05:11:50 +00:00
de9e5b7dc7 IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
when the module is not building in IA32 mode which will lead to building
error. when a module built-in X64 function pointer will be the size of
64bit width which cannot be fit in 32bit address which will lead to
error. to overcome this issue introducing the 2 new PCD's for the 64bit
modules can consume it. based on the which pcd platform set, use that.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Kuo Ted <ted.kuo@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Digant H Solanki <digant.h.solanki@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2021-12-20 03:42:50 +00:00
ee1f8262b8 OvmfPkg: Call PlatformInitializeConsole for GPU passthrough case
For GPU passthrough support we have to initialize the console after
EfiBootManagerDispatchDeferredImages() has loaded ROMs, so call it after
this. This was the calling order before the TCG physical presence support
had to be moved and the console initialized earlier so user interaction
could be supported before processing TCG physical presence opcodes.

Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Tested-by: Shivanshu Goyal <shivanshu3@gmail.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-17 17:36:14 +00:00
f129b1f06f OvmfPkg/Bhyve: fix tls-enabled build
Path doesn't exist below OvmfPkg/Bhyve, use the OvmfPkg version
instead.  Fixes build with -D NETWORK_TLS_ENABLE.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-17 16:59:09 +00:00
c63a10ecb7 EmbeddedPkg/AcpiLib: Add more helper functions
This adds more helper functions that assist in calculating the checksum,
locating an ACPI table by signature, and updating an AML integer object.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
2021-12-17 15:53:06 +00:00
ab5ab2f603 SecurityPkg: TPM must go to Idle state on CRB command completion
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3463

In V2: Fixed patch format and uncrustify cleanup

In V1: To follow the TCG CRB protocol specification, on every CRB TPM
 command completion the TPM should return to Idle state, regardless of
the CRB Idle Bypass capability reported by the TPM device.

See: TCG PC Client Device Driver Design Principles for TPM 2.0,
Version 1.0, Rev 0.27

Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-12-17 15:03:43 +00:00
195f011973 SecurityPkg: Reallocate TPM Active PCRs based on platform support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3515

In V4: Fixed patch format and uncrustify cleanup

In V3: Cleaned up comments, debug prints and updated patch to use the
new debug ENUM definitions.

- Replaced EFI_D_INFO with DEBUG_INFO.
- Replaced EFI_D_VERBOSE with DEBUG_VERBOSE.

In V2: Add case to RegisterHashInterfaceLib logic

RegisterHashInterfaceLib needs to correctly handle registering the HashLib
instance supported algorithm bitmap when PcdTpm2HashMask is set to zero.

The current implementation of SyncPcrAllocationsAndPcrMask() triggers
PCR bank reallocation only based on the intersection between
TpmActivePcrBanks and PcdTpm2HashMask.

When the software HashLibBaseCryptoRouter solution is used, no PCR bank
reallocation is occurring based on the supported hashing algorithms
registered by the HashLib instances.

Need to have an additional check for the intersection between the
TpmActivePcrBanks and the PcdTcg2HashAlgorithmBitmap populated by the
HashLib instances present on the platform's BIOS.

Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-12-17 15:03:43 +00:00
8ed8568922 SecurityPkg: Debug code to audit BIOS TPM extend operations
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2858

In V2: Fixed patch format and uncrustify cleanup

In V1: Add debug functionality to examine TPM extend operations
performed by BIOS and inspect the PCR 00 value prior to
any BIOS measurements.

Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-12-17 15:03:43 +00:00
b451c69088 ArmPkg/ProcessorSubClassDxe: Get serial and part number from OemMiscLib
Currently, the serial and part number of a processor are filled with
fixed PCDs. However, they may be updated dynamically according to the
information being passed from a the pre-UEFI firmware during booting.
So, this patch is to support updating these string fields from
OemMiscLib if the PCDs are empty.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-16 18:08:22 +00:00
45e3842970 ArmPkg/SmbiosMiscDxe: Get full SMBIOS strings from OemMiscLib
Typically, the information of the SMBIOS type 1/2/3 is fetched from an
FRU device during UEFI booting intead of fixed PCDs. Therefore, this
patch is to add more HII string fields in the OemMiscLib and support
updating these SMBIOS types with the strings provided by the OemMiscLib
if the PCDs are empty.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-16 18:08:22 +00:00
a6c0418651 ArmPkg/SmbiosMiscDxe: Remove duplicate HII string definition
This patch removes duplicate HII string definition in the
MiscSystemManufacturer.uni.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-16 18:08:22 +00:00
e6ea1464a8 OvmfPkg/PlatformPei: Revert "stop using cmos for memory detection"
This reverts commit 41d8bb3038, as it
breaks Cloud Hypervisor.

Reported-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-15 18:03:26 +00:00
4de8d61bce OvmfPkg: rework TPM configuration
Rename TPM_ENABLE to TPM2_ENABLE so naming is in line with the
ArmVirtPkg config option name.

Add separate TPM1_ENABLE option for TPM 1.2 support.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Stefan Berger <stefanb@linux.ibm.com>
2021-12-15 16:16:05 +00:00
b819388772 OvmfPkg: create Tcg12ConfigPei.inf
Split Tcg2ConfigPei.inf into two variants: Tcg12ConfigPei.inf with
TPM 1.2 support included and Tcg2ConfigPei.inf supporting TPM 2.0 only.
This allows x86 builds to choose whenever TPM 1.2 support should be
included or not by picking the one or the other inf file.

Switch x86 builds to Tcg12ConfigPei.inf, so they continue to
have TPM 1.2 support.

No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Tested-by: Stefan Berger <stefanb@linux.ibm.com>
2021-12-15 16:16:05 +00:00
5711ff4d0b OvmfPkg: drop TPM_CONFIG_ENABLE
Drop TPM_CONFIG_ENABLE config option.  Including TPM support in the
build without also including the TPM configuration menu is not useful.

Suggested-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Stefan Berger <stefanb@linux.ibm.com>
2021-12-15 16:16:05 +00:00
b47575801e OvmfPkg: move tcg configuration to dsc and fdf include files
With this in place the tpm configuration is not duplicated for each of
our four ovmf config variants (ia32, ia32x64, x64, amdsev) and it is
easier to keep them all in sync when updating the tpm configuration.

No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
2021-12-15 16:16:05 +00:00
3a72ec71cd OvmfPkg: remove unused TPM options from MicrovmX64.dsc
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-15 16:16:05 +00:00
f14fff5135 StandaloneMmPkg/FvLib: Support large file with EFI_FFS_FILE_HEADER2.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3769

Current FvLib will hit parse issue when encountering LARGE file, then
ignore latter ffs/section, thus causing required drivers not being
dispatched. Therefore, need to add support for EFI_FFS_FILE_HEADER2
and EFI_COMMON_SECTION_HEADER2 in FvLib to fix this issue.

Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-15 07:24:22 +00:00
38f6d78c3b DynamicTablesPkg: Add DynamicPlatRepo library
The DynamicPlatRepo library allows to handle dynamically created
CmObj. The dynamic platform repository can be in the following states:
1 - Non-initialised
2 - Transient:
    Possibility to add CmObj to the platform, but not to query them.
3 - Finalised:
    Possibility to query CmObj, but not to add new.

A token is allocated to each CmObj added to the dynamic platform
repository (except for reference tokens CmObj). This allows to retrieve
dynamic CmObjs among all CmObj (static CmObj for instance).

This patch add the inf file of the module and the main module
functionnalities and update the dsc file of the package.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 18:45:19 +00:00
5fe5b6f94f DynamicTablesPkg: DynamicPlatRepo: Add TokenMapper
The DynamicPlatRepo library allows to handle dynamically created
CmObj. The dynamic platform repository can be in the following states:
1 - Non-initialised
2 - Transient:
    Possibility to add CmObj to the platform, but not to query them.
3 - Finalised:
    Possibility to query CmObj, but not to add new.

A token is allocated to each CmObj added to the dynamic platform
repository (except for reference tokens CmObj). This allows to retrieve
dynamic CmObjs among all CmObj (static CmObj for instance).

This patch add the TokenMapper files, allowing to retrieve a CmObj
from a token/CmObjId couple.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 18:45:19 +00:00
740e3bb634 DynamicTablesPkg: DynamicPlatRepo: Add TokenFixer
The DynamicPlatRepo library allows to handle dynamically created
CmObj. The dynamic platform repository can be in the following states:
1 - Non-initialised
2 - Transient:
    Possibility to add CmObj to the platform, but not to query them.
3 - Finalised:
    Possibility to query CmObj, but not to add new.

A token is allocated to each CmObj added to the dynamic platform
repository (except for reference tokens CmObj). This allows to retrieve
dynamic CmObjs among all CmObj (static CmObj for instance).

This patch add the TokenFixer files, allowing to update the
self-token some CmObj have.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 18:45:19 +00:00
2e2db65e39 DynamicTablesPkg: DynamicPlatRepo: Add TokenGenerator
The DynamicPlatRepo library allows to handle dynamically created
CmObj. The dynamic platform repository can be in the following states:
1 - Non-initialised
2 - Transient:
    Possibility to add CmObj to the platform, but not to query them.
3 - Finalised:
    Possibility to query CmObj, but not to add new.

A token is allocated to each CmObj added to the dynamic platform
repository (except for reference tokens CmObj). This allows to retrieve
dynamic CmObjs among all CmObj (static CmObj for instance).

This patch add the TokenGenerator files.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 18:45:19 +00:00
b2d0ed20fd DynamicTablesPkg: Definition for DynamicPlatRepoLib interface
The DynamicPlatRepoLib library allows to handle dynamically created
CmObj. The dynamic platform repository can be in the following states:
1 - Non-initialised
2 - Transient:
    Possibility to add CmObj to the platform, but not to query them.
3 - Finalised:
    Possibility to query CmObj, but not to add new.

A token is allocated to each CmObj added to the dynamic platform
repository (except for reference tokens CmObj). This allows to
retrieve dynamic CmObjs among all CmObj (static CmObj for instance).

This patch defines the library interface of the DynamicPlatRepo.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 18:45:19 +00:00
9006967c8d DynamicTablesPkg: Handle 16550_WITH_GAS id
Handle the EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_WITH_GAS
id when generating an AML description of a serial port. The same
_HID/_CID as the EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550
are generated.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
deb01dfd7f DynamicTablesPkg: Add FdtHwInfoParser library
Hardware information parser is an optional module defined
by the Dynamic Tables Framework. It can either parse an
XML, a Device Tree or a Json file containing the platform
hardware information to populate the platform information
repository.

FdtHwInfoParser library is an instance of a HwInfoParser
that parses a Device Tree and populates the Configuration
Manager Platform information repository.

FdtHwInfoParser library is aimed at providing a solution
for generating ACPI tables for Guest Partitions launched
by virtual machine managers (VMMs). One such use case is
Kvmtool where the Device Tree for the Guest is passed on
to the firmware by Kvmtool. The Configuration Manager for
Kvmtool firmware shall invoke the FdtHwInfoParser to parse
the Device Tree to populate the hardware information in
the Platform Info Repository. The Kvmtool Configuration
Manager can the process this information to generate the
required ACPI tables for the Guest VM.

This approach also scales well if the number of CPUs or
if the hardware configuration of the Guest partition is
varied.

FdtHwInfoParser thereby introduces 'Dynamic Tables for
Virtual Machines'.

Ref:https://bugzilla.tianocore.org/show_bug.cgi?id=3741
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
c67bf628c8 DynamicTablesPkg: FdtHwInfoParser: Add PCI config parser
On platforms that implement PCIe, the PCIe configuration space
information must be described to a standards-based operating
system in the Memory mapped configuration space base address
Description (MCFG) table.

The PCIe information is described in the platform Device Tree,
the bindings for which can be found at:
- linux/Documentation/devicetree/bindings/pci/
  host-generic-pci.yaml

The FdtHwInfoParser implements a PCI configuration space Parser
that parses the platform Device Tree to create
CM_ARM_PCI_CONFIG_SPACE_INFO objects which are encapsulated in a
Configuration Manager descriptor object and added to the platform
information repository.

The platform Configuration Manager can then utilise this
information when generating the MCFG table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
26bf034a59 DynamicTablesPkg: FdtHwInfoParser: Add GIC dispatcher
The GIC Dispatcher is the top-level component that is responsible
for invoking the respective parsers for GICC, GICD, GIC MSI Frame,
GIC ITS and the GICR.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
7b6c8b30a5 DynamicTablesPkg: FdtHwInfoParser: Add GICR parser
The GIC Redistributor (GICR) structure is part of the Multiple
APIC Description Table (MADT) that enables the discovery of
GIC Redistributor base addresses by providing the Physical Base
Address of a page range containing the GIC Redistributors. More
than one GICR Structure may be presented in the MADT. The GICR
structures should only be used when describing GIC version 3 or
higher.

The GIC Redistributor information is described in the platform
Device Tree, the bindings for which can be found at:
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic-v3.yaml

The FdtHwInfoParser implements a GIC Redistributor Parser that
parses the platform Device Tree to create CM_ARM_GIC_REDIST_INFO
objects which are encapsulated in a Configuration Manager
descriptor object and added to the platform information
repository.

The platform Configuration Manager can then utilise this
information when generating the MADT table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
d250d408cf DynamicTablesPkg: FdtHwInfoParser: Add ITS parser
Arm GIC v3/v4 optionally includes support for GIC Interrupt
Translation Service (ITS). The GIC ITS Structure is part of
the Multiple APIC Description Table (MADT) that describes
the GIC Interrupt Translation service to the OS.

The GIC Interrupt Translation Service information is described
in the platform Device Tree, the bindings for which can be
found at:
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic-v3.yaml

The FdtHwInfoParser implements a GIC ITS Parser that parses the
platform Device Tree to create CM_ARM_GIC_ITS_INFO objects which
are encapsulated in a Configuration Manager descriptor object and
added to the platform information repository.

The platform Configuration Manager can then utilise this information
when generating the MADT table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
b04cf355a0 DynamicTablesPkg: FdtHwInfoParser: Add MSI Frame parser
Arm GIC version 2 systems that support Message Signalled Interrupts
implement GICv2m MSI frame(s). Each GICv2m MSI frame consists of a
4k page which includes registers to generate message signalled
interrupts to an associated GIC distributor. The frame also includes
registers to discover the set of distributor lines which may be
signalled by MSIs from that frame. A system may have multiple MSI
frames, and separate frames may be defined for secure and non-secure
access.

A MSI Frame structure is part of the Multiple APIC Description Table
(MADT) and must only be used to describe non-secure MSI frames.

The MSI Frame information is described in the platform Device Tree,
the bindings for which can be found at:
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic.yaml
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic-v3.yaml

The FdtHwInfoParser implements a MSI Frame Parser that parses
the platform Device Tree to create CM_ARM_GIC_MSI_FRAME_INFO
objects which are encapsulated in a Configuration Manager
descriptor object and added to the platform information
repository.

The platform Configuration Manager can then utilise this
information when generating the MADT table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
0fa1217726 DynamicTablesPkg: FdtHwInfoParser: Add GICD parser
On ARM-based systems the Generic Interrupt Controller (GIC)
manages interrupts on the system. Each interrupt is identified
in the GIC by an interrupt identifier (INTID). ACPI GSIVs map
one to one to GIC INTIDs for peripheral interrupts, whether
shared (SPI) or private (PPI). The GIC distributor provides
the routing configuration for the interrupts.

The GIC Distributor (GICD) structure is part of the Multiple
APIC Description Table (MADT) that describes the GIC
distributor to the OS. The MADT table is a mandatory table
required for booting a standards-based operating system.

The GIC Distributor information is described in the platform
Device Tree, the bindings for which can be found at:
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic.yaml
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic-v3.yaml

The FdtHwInfoParser implements a GIC Distributor Parser that
parses the platform Device Tree to create CM_ARM_GICD_INFO
object which is encapsulated in a Configuration Manager
descriptor object and added to the platform information
repository.

The platform Configuration Manager can then utilise this
information when generating the MADT table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
e366a41ef0 DynamicTablesPkg: FdtHwInfoParser: Add GICC parser
The GIC CPU Interface (GICC) structure is part of the Multiple
APIC Description Table (MADT) that describes the interrupt model
for the platform. The MADT table is a mandatory table required
for booting a standards-based operating system.

Arm requires the GIC interrupt model, in which the logical
processors are required to have a Processor Device object in
the DSDT, and must convey each processor's GIC information to
the OS using the GICC structure.

The CPU and GIC information is described in the platform Device
Tree, the bindings for which can be found at:
 - linux/Documentation/devicetree/bindings/arm/cpus.yaml
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic.yaml
 - linux/Documentation/devicetree/bindings/interrupt-controller/
   arm,gic-v3.yaml

The FdtHwInfoParser implements a GIC CPU Interface Parser that
parses the platform Device Tree to create CM_ARM_GICC_INFO
objects which are encapsulated in a Configuration Manager
descriptor object and added to the platform information
repository.

The platform Configuration Manager can then utilise this
information when generating the MADT and the SSDT CPU
information tables.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
51941f7558 DynamicTablesPkg: FdtHwInfoParser: Add Serial port parser
The Microsoft Debug Port Table 2 (DBG2), the Serial Port Console
Redirector (SPCR) table are mandatory tables required for booting
a standards-based operating system. The DBG2 table is used by the
OS debugger while the SPCR table is used to configure the serial
terminal. Additionally, the serial ports available on a platform
for generic use also need to be described in DSDT/SSDT for an OS
to be able to use the serial ports.

The Arm Base System Architecture 1.0 specification a lists of
supported serial port hardware for Arm Platforms. This list
includes the following serial port UARTs:
 - SBSA/Generic UART
 - a fully 16550 compatible UART.
Along, with these the PL011 UART is the most commonly used serial
port hardware on Arm platforms.

The serial port hardware information is described in the platform
Device Tree, the bindings for which can be found at:
 - linux/Documentation/devicetree/bindings/serial/serial.yaml
 - linux/Documentation/devicetree/bindings/serial/8250.txt
 - linux/Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt
 - linux/Documentation/devicetree/bindings/serial/pl011.yaml

The FdtHwInfoParser implements a Serial Port Parser that parses
the platform Device Tree to create CM_ARM_SERIAL_PORT_INFO objects
with the following IDs:
 - EArmObjSerialConsolePortInfo (for use by SPCR)
 - EArmObjSerialDebugPortInfo (for use by DBG2)
 - EArmObjSerialPortInfo (for use as generic Serial Ports)

The Serial Port for use by SPCR is selected by parsing the Device
Tree for the '/chosen' node with the 'stdout-path' property. The
next Serial Port is selected for use as the Debug Serial Port and
the remaining serial ports are used as generic serial ports.

The CM_ARM_SERIAL_PORT_INFO objects are encapsulated in Configuration
Manager descriptor objects with the respective IDs and are added to
the platform information repository.

The platform Configuration Manager can then utilise this information
when generating the DBG2, SPCR and the SSDT serial port tables.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
3ebe1ff5c9 DynamicTablesPkg: FdtHwInfoParser: Generic Timer Parser
The Generic Timer Description Table (GTDT) is a mandatory table
required for booting a standards-based operating system. It
provides an OSPM with information about a system's Generic Timer
configuration. The Generic Timer (GT) is a standard timer interface
implemented on ARM processor-based systems. The GTDT provides OSPM
with information about a system's GT interrupt configurations, for
both per-processor timers, and platform (memory-mapped) timers.

The Generic Timer information is described in the platform Device
Tree. The Device Tree bindings for the Generic timers can be found
at:
 - linux/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml

The FdtHwInfoParser implements a Generic Timer Parser that parses
the platform Device Tree to create a CM_ARM_GENERIC_TIMER_INFO
object. The CM_ARM_GENERIC_TIMER_INFO object is encapsulated in a
Configuration Manager descriptor object and added to the platform
information repository.

The platform Configuration Manager can then utilise this information
when generating the GTDT table.

Note: The Generic Timer Parser currently does not support parsing
of memory-mapped platform timers.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
8d2691c3d5 DynamicTablesPkg: FdtHwInfoParser: Add Boot Arch parser
The Fixed ACPI Description Table (FADT) is a mandatory table
required for booting a standards-based operating system. The
FADT table has an 'ARM Boot Architecture Flags' field that is
used by an OS at boot time to determine the code path during
boot. This field is used to specify if the platform complies
with the PSCI specification. It is also used to describe the
conduit (SMC/HVC) to be used for PSCI.

The PSCI compliance information for a platform is described
in the platform Device Tree, the bindings for which can be
found at:
 - linux/Documentation/devicetree/bindings/arm/psci.yaml

The FdtHwInfoParser implements a Boot Arch Parser that parses
the platform Device Tree to create a CM_ARM_BOOT_ARCH_INFO
object. The CM_ARM_BOOT_ARCH_INFO object is encapsulated in
a Configuration Manager descriptor object and added to the
platform information repository.

The platform Configuration Manager can then utilise this
information when generating the FADT table.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
5d8b5d171c DynamicTablesPkg: FdtHwInfoParser: Add FDT utility functions
The FdtHwInfoParser parses a platform Device Tree and populates
the Platform Information repository with Configuration Manager
objects.

Therefore, add a set of helper functions to simplify parsing of
the platform Device Tree.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
d59c5a20f8 DynamicTablesPkg: FdtHwInfoParser: CM Object descriptor helper
FdtHwInfoParserLib is an instance of the HwInfoParser. The
FdtHwInfoParser parses a platform Device Tree and populates
the Platform Information repository with Configuration
Manager objects that describe the platform hardware.
These Configuration Manager objects are encapsulated in
Configuration Manager Object Descriptors.

Therefore, add helper functions to create and free the
Configuration Manager Object descriptors.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 16:07:00 +00:00
90ad4b3b34 DynamicTablesPkg: Definition for HwInfoParser interface
Hardware information parser is an optional module defined
by the Dynamic Tables Framework. It can either parse an
XML, a Device Tree or a Json file containing the platform
hardware information to populate the platform information
repository.

The Configuration Manager can then utilise this information
to generate ACPI tables for the platform.

Therefore, define an interface for the HwInfoParser library
class.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Co-authored-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
2021-12-14 16:07:00 +00:00
c039fa7ff0 ArmPkg: Update SMC calls to use the new ArmCallSmc0/1/2/3 functions
New SMC helper functions have been added to reduce the amount of
template code. Update ArmSmcPsciResetSystemLib and
Smbios/ProcessorSubClassDxe to use them.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 11:30:26 +00:00
4d30352445 ArmPkg: Add SMC helper functions
Add functions ArmCallSmc0/1/2/3 to do SMC calls with 0, 1, 2 or 3
arguments.
The functions return up to 3 values.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-14 11:30:26 +00:00
7a6e6ae933 EmulatorPkg: Update lldbefi.py to work with current lldb which uses python3
The version of lldb shipping with macOS Big Sur is lldb-1205.0.27.3, and
it uses python3. Update lldbefi.py to work with it, including removing
the unused 'commands' import and fixing the print statements.

Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-13 15:24:10 +00:00
41d8bb3038 OvmfPkg/PlatformPei: stop using cmos for memory detection
Not needed for qemu 1.7 (released in 2013) and newer.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3593
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-13 14:47:37 +00:00
759e3c6d21 OvmfPkg/PlatformPei: prefer etc/e820 for memory detection
Prefer the e820 map provided via qemu firmware config interface
for memory detection.  Use rtc cmos only as fallback, which should
be rarely needed these days as qemu supports etc/e820 since 2013.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3593
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 14:47:37 +00:00
557dede8a6 OvmfPkg/PlatformPei: ScanOrAdd64BitE820Ram improvements
Add a bool parameter to ScanOrAdd64BitE820Ram to explicitly specify
whenever ScanOrAdd64BitE820Ram should add HOBs for high memory (above
4G) or scan only.

Also add a lowmem parameter so ScanOrAdd64BitE820Ram
can report the memory size below 4G.

This allows a more flexible usage of ScanOrAdd64BitE820Ram,
a followup patch will use it for all memory detection.

No functional change.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3593
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 14:47:37 +00:00
ec37fd9c1f DynamicTablesPkg: Fix multiple objects parsing
When a CmObjDesc contains multiple objects, only the first one is
parsed as the buffer doesn't progress. Fix this.
Also check that the whole buffer has been parsed with an asset.

Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
e35a746cf5 DynamicTablesPkg: SSDT Pci express generator
This generator allows to generate a SSDT table describing
a Pci express Bus. It uses the following CmObj:
- EArmObjCmRef
- EArmObjPciConfigSpaceInfo
- EArmObjPciAddressMapInfo
- EArmObjPciInterruptMapInfo

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3682

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
ce306e48eb DynamicTablesPkg: Add Pci related objects
Introduce the following CmObj in the ArmNameSpaceObjects:
 - CM_ARM_PCI_ADDRESS_MAP_INFO
 - CM_ARM_PCI_INTERRUPT_MAP_INFO

These objects allow to describe address range mapping
of Pci busses and interrupt mapping of Pci devices.

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
69ddfee1c3 DynamicTablesPkg: Add AmlAttachNode()
This function allows to add a node as the last node of a parent node
in an AML tree. For instance,
ASL code corresponding to NewNode:
  Name (_UID, 0)

ASL code corresponding to ParentNode:
  Device (PCI0) {
    Name(_HID, EISAID("PNP0A08"))
  }

"AmlAttachNode (ParentNode, NewNode)" will result in:
ASL code:
  Device (PCI0) {
    Name(_HID, EISAID("PNP0A08"))
    Name (_UID, 0)
  }

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
b2b8def4e3 DynamicTablesPkg: AML Code generation to add _PRT entries
_PRT entries can describe interrupt mapping for Pci devices. The
object is described in ACPI 6.4 s6.2.13 "_PRT (PCI Routing Table)".

Add AmlCodeGenPrtEntry() helper function to add _PRT entries
to an existing _PRT object.

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
fd5fc4bbb7 DynamicTablesPkg: AML Code generation to create a named ResourceTemplate()
Add AmlCodeGenNameResourceTemplate() to generate code for a
ResourceTemplate().

AmlCodeGenNameResourceTemplate ("REST", ParentNode, NewObjectNode) is
equivalent of the following ASL code:
  Name(REST, ResourceTemplate () {})

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
0e7147fe75 DynamicTablesPkg: AML Code generation to create a named Package()
Add AmlCodeGenNamePackage() to generate code for a Package().

AmlCodeGenNamePackage ("PACK", ParentNode, NewObjectNode) is
equivalent of the following ASL code:
   Name(PACK, Package () {})

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
7f1861be2b DynamicTablesPkg: AML Code generation for memory ranges
Add helper functions to generate AML Resource Data describing memory
ranges. Memory ranges can be one, double or four words long. They
can be of 'normal', IO or bus number memory type. The following
APIs are exposed:
 - AmlCodeGenRdDWordIo ()
 - AmlCodeGenRdDWordMemory ()
 - AmlCodeGenRdWordBusNumber ()
 - AmlCodeGenRdQWordMemory ()

To: Sami Mujawar <sami.mujawar@arm.com>
To: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-13 12:48:42 +00:00
e07d27e24d OvmfPkg/Microvm: add README
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3599
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 12:16:32 +00:00
2a68abf6ee OvmfPkg/Microvm/virtio: add virtio-mmio support
Add virtio-mmio support (VirtioMmioDeviceLib and VirtioFdtDxe).

With this patch added and a new enough qemu version (6.2+) edk2
will detect virtio-mmio devices, so it is possible to boot from
storage (virtio-blk, virtio-scsi) or network (virtio-net).

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3689
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 12:16:32 +00:00
c802f8935c OvmfPkg/Microvm/fdt: add empty fdt
FdtClient is unhappy without a device tree, so add an empty fdt
which we can use in case etc/fdt is not present in fw_cfg.

On ARM machines a device tree is mandatory for hardware detection,
that's why FdtClient fails hard.

On microvm the device tree is only used to detect virtio-mmio devices
(this patch series) and the pcie host (future series).  So edk2 can
continue with limited functionality in case no device tree is present:
no storage, no network, but serial console and direct kernel boot
works.

qemu release 6.2 & newer will provide a device tree for microvm.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3689
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 12:16:32 +00:00
79dcaf7054 OvmfPkg/Microvm/fdt: load fdt from fw_cfg
Needed for hardware detection: virtio-mmio devices for now,
later also pcie root bridge.

Depends on patched qemu which actually provides an fdt:
https://gitlab.com/kraxel/qemu/-/commits/sirius/microvm-device-tree

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3689
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 12:16:32 +00:00
64ef0dd1d3 OvmfPkg/Microvm/fdt: add device tree support
Add fdt parser from EmbeddedPkg (FdtLib and FdtClientDxe) to MicrovmX64.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3689
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 12:16:32 +00:00
1203eba58e OvmfPkg/PlatformCI: add XenBuild.py
Add build test for OvmfXen.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-13 11:36:57 +00:00
2722856a87 OvmfPkg/PlatformCI: dummy grub.efi for AmdSev
Building grub.efi for AmdSev is difficult because it depends on patches
not yet merged to upstream grub.  So shortcut the grub build by simply
creating an empty grub.efi file.  That allows to at least build-test the
AmdSev variant.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Dov Murik <dovmurik@linux.ibm.com>
2021-12-13 11:36:57 +00:00
8b8ae609a7 OvmfPkg/PlatformCI: add AmdSevBuild.py
Add build test for OvmfPkg/AmdSev.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 11:36:57 +00:00
04eacd3943 OvmfPkg/PlatformCI: add MicrovmBuild.py
Add build test for OvmfPkg/Microvm.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 11:36:57 +00:00
64bccda534 OvmfPkg/PlatformCI: add BhyveBuild.py
Add build test for OvmfPkg/Bhyve.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-13 11:36:57 +00:00
21ee379407 OvmfPkg/PlatformCI: add QEMU_SKIP
Skip the qemu boot test in case QEMU_SKIP is set to true.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-13 11:36:57 +00:00
61be49e0f7 OvmfPkg/PlatformCI: factor out PlatformBuildLib.py
Move SettingsManager and PlatformBuilder classes to PlatformBuildLib.py
file, keep only CommonPlatform class in PlatformBuild.py.  Allows
reusing these classes for other builds.  Pure code motion, no functional
change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-13 11:36:57 +00:00
2686468c43 OvmfPkg/Bhyve: add MemEncryptSevLib
Fixes build failure:

build.py...
/home/kraxel/projects/edk2/OvmfPkg/Bhyve/BhyveX64.dsc(...): error 1001: Module type [SEC] is not supported by library instance [/home/kraxel/projects/edk2/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf]
	consumed by [/home/kraxel/projects/edk2/OvmfPkg/Sec/SecMain.inf]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-13 09:23:48 +00:00
adf070ff56 OvmfPkg/Microvm: add PcdConfidentialComputingGuestAttr
Fixes build failure:

/home/kraxel/projects/edk2/OvmfPkg/PlatformPei/AmdSev.c: In function ‘AmdSevInitialize’:
/home/kraxel/projects/edk2/MdePkg/Include/Library/PcdLib.h:511:38: error: implicit declaration of function ‘_PCD_SET_MODE_64_S_PcdConfidentialComputingGuestAttr’ [-Werror=implicit-function-declaration]
  511 | #define PcdSet64S(TokenName, Value)  _PCD_SET_MODE_64_S_##TokenName    ((Value))
      |                                      ^~~~~~~~~~~~~~~~~~~
/home/kraxel/projects/edk2/OvmfPkg/PlatformPei/AmdSev.c:410:17: note: in expansion of macro ‘PcdSet64S’
  410 |     PcdStatus = PcdSet64S (PcdConfidentialComputingGuestAttr, CCAttrAmdSevSnp);
      |                 ^~~~~~~~~
cc1: all warnings being treated as errors

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-12-13 09:23:48 +00:00
8c06c53b58 SecurityPkg: Support CcMeasurementProtocol in DxeTpmMeasurementLib
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3625

DxeTpmMeasurementLib supports TPM based measurement in DXE phase.
After CcMeasurementProtocol is introduced, CC based measurement needs
to be supported in DxeTpmMeasurementLib as well.

A platform should have only one RTS/RTR. Only one of (virtual)TPM1.2,
(virtual)TPM2.0 and CC MR exists. Then only one TCG_SERVICE_PROTOCOL,
TCG2_PROTOCOL, CC_MEASUREMENT_PROTOCOL is exposed.

In this library when do measurement only one of above 3 protocols will
be called.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
2021-12-11 17:00:53 +00:00
a124cd4ef9 SecurityPkg: Support CcMeasurementProtocol in DxeTpm2MeasureBootLib
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3625

DxeTpm2MeasureBootLib supports TPM2 based measure boot. After
CcMeasurementProtocol is introduced, CC based measure boot needs to
be supported in DxeTpm2MeasureBootLib as well.

There are 2 major changes in this commit.

1. A platform should have only one RTS/RTR. Only one of (virtual)TPM1.2,
(virtual)TPM2.0 and CC MR exists. Then only one TCG_SERVICE_PROTOCOL,
TCG2_PROTOCOL, CC_MEASUREMENT_PROTOCOL is exposed. In this library when
do measure boot only one of TCG2_PROTOCOL / CC_MEASUREMENT_PROTOCOL
will be called. MEASURE_BOOT_PROTOCOLS is defined to store the instances
of TCG2 protocol and CC Measurement protocol.

2. CcEvent is similar to Tcg2Event except the MrIndex and PcrIndex.
So in the code Tcg2Event will be first created and intialized. If
CcMeasurementProtocol is called to do the measure boot, then CcEvent
points to Tcg2Event and the MrIndex is adjusted.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
2021-12-11 17:00:53 +00:00
d5efc875ef MdePkg: Introduce CcMeasurementProtocol for CC Guest firmware
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3625

CC guest is a Confidential Computing guest. If CC Guest firmware
supports measurement and an event is created, CC Guest firmware
is designed to report the event log with the same data structure
in TCG-Platform-Firmware-Profile specification with
EFI_TCG2_EVENT_LOG_FORMAT_TCG_2 format.

The CC Guest firmware supports measurement. It is designed to
produce EFI_CC_MEASUREMENT_PROTOCOL with new GUID
EFI_CC_MEASUREMENT_PROTOCOL_GUID to report event log and provides
hash capability.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ken Lu <ken.lu@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
2021-12-11 17:00:53 +00:00
2b20a34fd5 OvmfPkg-EmuVariableFvbRuntimeDxe: Support Access To Memory Above 4G
In FvbInitialize Function,
PcdFlashNvStorageVariableBase64 PcdFlashNvStorageFtwWorkingBase
PcdFlashNvStorageFtwSpareBase will not exceed 0x100000000,
Due to truncation and variable type limitations.
That leads to the NV variable cannot be saved to the memory above 4G.

Modify as follows:
1.Remove the forced type conversion of UINT32.
2.Use UINT64 type variables.

Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-12-11 16:13:07 +00:00
f6df289a1c OvmfPkg/OvmfXen: Fix Xen build
commit 202fb22be6 "OvmfPkg/SecMain: validate the memory used for
decompressing Fv" broke building OvmfXen with:

edk2/OvmfPkg/OvmfXen.dsc(...): error 1001: Module type [SEC] is not
supported by library instancer
[edk2/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf]
	consumed by [edk2/OvmfPkg/Sec/SecMain.inf]

The above commit added a reference to MemEncryptSevLib into SecMain.inf,
but OvmfXen.dsc doesn't have a MemEncryptSevLib entry for SEC.  Add one
like OvmfPkgX64.dsc has.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Jason Andryuk <jandryuk@gmail.com>
2021-12-11 15:40:44 +00:00
7594c5bfe2 OvmfPkg: Install ACPI tables for Cloud Hypervisor
Adding support for retrieving the Cloud Hypervisor ACPI tables as a
fallback mechanism if tables are not found through fw_cfg.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-11 14:26:05 +00:00
66bce05f6d OvmfPkg: Generalize AcpiPlatformDxe
Don't make the package Qemu centric so that we can introduce some
alternative support for other VMMs not using the fw_cfg mechanism.

This patch is purely about renaming existing files with no functional
change.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-11 14:26:05 +00:00
d8ef774346 OvmfPkg: Retrieve SMBIOS from Cloud Hypervisor
Add a fallback on the SMBIOS code to find the SMBIOS table for Cloud
Hypervisor if it couldn't be found for Qemu through fw_cfg.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-11 14:26:05 +00:00
2ccefa32a6 OvmfPkg: Create global entry point for SMBIOS parsing
Move the generic entry point part out of Qemu.c to anticipate the
addition of new ways of retrieving the SMBIOS table.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-11 14:26:05 +00:00
9afcd48a94 OvmfPkg: Handle Cloud Hypervisor host bridge
Handle things differently when the detected host bridge matches the
Cloud Hypervisor PCI host bridge identifier.

Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-11 14:26:05 +00:00
e81a81e584 DynamicTablesPkg: Add CacheId to PPTT generator
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

Update the PPTT generator with the CacheId field as defined in table
5.140 of the ACPI 6.4 specification.

Also add validations to ensure that the cache id generated is unique.

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
e139829dd6 DynamicTablesPkg: Update PPTT generator to ACPI 6.4
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

Update the PPTT generator to use Acpi64.h.

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
b2bbe3df54 DynamicTablesPkg: Remove PPTT ID structure from ACPI 6.4 generator
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

ACPI 6.3A deprecated PPTT ID (type 2) structure which was subsequently
removed in ACPI 6.4. Therefore remove support for generating PPTT ID
structures.

Mantis ID for removing PPTT type 2 structure:
2072 (https://mantis.uefi.org/mantis/view.php?id=2072)

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
8cf2bdfcfb ShellPkg: Add Cache ID to PPTT parser
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

Update the Acpiview PPTT parser with the Cache ID field and relevant
validations as defined in tables 5.140 and 5.141 of the ACPI 6.4
specification.

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
a50b65ce22 ShellPkg: Update Acpiview PPTT parser to ACPI 6.4
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

Update the Acpiview PPTT parser to use Acpi64.h. As part of the changes,
remove support for parsing PPTT type 2 ID structure.

Mantis ID for removing PPTT type 2 structure:
2072 (https://mantis.uefi.org/mantis/view.php?id=2072)

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
0077c22f6d MdePkg: Remove PPTT ID type structure
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

The ACPI 6.3A specification deprecated the PPTT ID type structure (type
2) therefore remove it from Acpi64.h.

Mantis ID: 2072 (https://mantis.uefi.org/mantis/view.php?id=2072)

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
30631f0a26 MdePkg: Add missing Cache ID (in)valid define
Bugzilla: 3697 (https://bugzilla.tianocore.org/show_bug.cgi?id=3697)

Add Cache ID valid/invalid defines to Acpi64.h which were not initially
added when the CacheIdValid field was added to
EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS.

Signed-off-by: Chris Jones <christopher.jones@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-10 20:06:52 +00:00
0f1d7477c0 OvmfPkg: Remove unused print service driver (PrintDxe)
PrintDxe produces gEfiPrint2ProtocolGuid and gEfiPrint2SProtocolGuid,
and those are consumed by the following PrintLib instance:

MdeModulePkg/Library/DxePrintLibPrint2Protocol/DxePrintLibPrint2Protocol.inf

However, none of the OVMF DSC files contain such a PrintLib class
resolution, so none of the OVMF platforms need PrintDxe.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3744
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
2021-12-10 10:02:08 +00:00
06544455d0 UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Use the SEV-SNP AP Creation NAE event to create and launch APs under
SEV-SNP. This capability will be advertised in the SEV Hypervisor
Feature Support PCD (PcdSevEsHypervisorFeatures).

Cc: Michael Roth <michael.roth@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
67484aed69 OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Now that both the secrets and cpuid pages are reserved in the HOB,
extract the location details through fixed PCD and make it available
to the guest OS through the configuration table.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
ea3a12d970 OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map
When SEV-SNP is active, the CPUID and Secrets memory range contains the
information that is used during the VM boot. The content need to be persist
across the kexec boot. Mark the memory range as Reserved in the EFI map
so that guest OS or firmware does not use the range as a system RAM.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
b7b8872031 OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address
The SetMemoryEncDec() is used by the higher level routines to set or clear
the page encryption mask for system RAM and Mmio address. When SEV-SNP is
active, in addition to set/clear page mask it also updates the RMP table.
The RMP table updates are required for the system RAM address and not
the Mmio address.

Add a new parameter in SetMemoryEncDec() to tell whether the specified
address is Mmio. If its Mmio then skip the page state change in the RMP
table.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
b928eb44d5 OvmfPkg/MemEncryptSevLib: change the page state in the RMP table
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The MemEncryptSev{Set,Clear}PageEncMask() functions are used to set or
clear the memory encryption attribute in the page table. When SEV-SNP
is active, we also need to change the page state in the RMP table so that
it is in sync with the memory encryption attribute change.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
d4d7c9ad5f UefiCpuPkg/MpInitLib: use BSP to do extended topology check
During AP bringup, just after switching to long mode, APs will do some
cpuid calls to verify that the extended topology leaf (0xB) is available
so they can fetch their x2 APIC IDs from it. In the case of SEV-ES,
these cpuid instructions must be handled by direct use of the GHCB MSR
protocol to fetch the values from the hypervisor, since a #VC handler
is not yet available due to the AP's stack not being set up yet.

For SEV-SNP, rather than relying on the GHCB MSR protocol, it is
expected that these values would be obtained from the SEV-SNP CPUID
table instead. The actual x2 APIC ID (and 8-bit APIC IDs) would still
be fetched from hypervisor using the GHCB MSR protocol however, so
introducing support for the SEV-SNP CPUID table in that part of the AP
bring-up code would only be to handle the checks/validation of the
extended topology leaf.

Rather than introducing all the added complexity needed to handle these
checks via the CPUID table, instead let the BSP do the check in advance,
since it can make use of the #VC handler to avoid the need to scan the
SNP CPUID table directly, and add a flag in ExchangeInfo to communicate
the result of this check to APs.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Suggested-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
9c703bc0f1 UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

An SEV-SNP guest requires that the physical address of the GHCB must
be registered with the hypervisor before using it. See the GHCB
specification section 2.3.2 for more details.

Cc: Michael Roth <michael.roth@amd.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@Intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
2c354252be MdePkg/GHCB: increase the GHCB protocol max version
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Now that OvmfPkg supports version 2 of the GHCB specification, bump the
protocol version.

Cc: Michael Roth <michael.roth@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
f5a6e1bab5 OvmfPkg/PlatformPei: set the Hypervisor Features PCD
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of the GHCB specification added the support to query the
hypervisor feature bitmap. The feature bitmap provide information
such as whether to use the AP create VmgExit or use the AP jump table
approach to create the APs. The MpInitLib will use the
PcdGhcbHypervisorFeatures to determine which method to use for creating
the AP.

Query the hypervisor feature and set the PCD accordingly.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
f4e3ce5f53 UefiCpuPkg: add PcdGhcbHypervisorFeatures
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Version 2 of the GHCB specification added a new VMGEXIT that the guest
could use for querying the hypervisor features. One of the immediate
users for it will be an AP creation code. When SEV-SNP is enabled, the
guest can use the newly added AP_CREATE VMGEXIT to create the APs.

The MpInitLib will check the hypervisor feature, and if AP_CREATE is
available, it will use it.

See GHCB spec version 2 for more details on the VMGEXIT.

Cc: Michael Roth <michael.roth@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@Intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
b95908e043 UefiCpuPkg/MpInitLib: use PcdConfidentialComputingAttr to check SEV status
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Previous commit introduced a generic confidential computing PCD that can
determine whether AMD SEV-ES is enabled. Update the MpInitLib to drop the
PcdSevEsIsEnabled in favor of PcdConfidentialComputingAttr.

Cc: Michael Roth <michael.roth@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
504ae26b80 OvmfPkg/PlatformPei: set PcdConfidentialComputingAttr when SEV is active
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The MpInitLib uses the ConfidentialComputingAttr PCD to determine whether
AMD SEV is active so that it can use the VMGEXITs defined in the GHCB
specification to create APs.

Cc: Michael Roth <michael.roth@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
26210f9436 MdePkg: Define ConfidentialComputingGuestAttr
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

While initializing APs, the MpInitLib may need to know whether the
guest is running with active AMD SEV or Intel TDX memory encryption.

Add a new ConfidentialComputingGuestAttr PCD that can be used to query
the memory encryption attribute.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Suggested-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
8eb79b5f4f OvmfPkg/PlatformPei: validate the system RAM when SNP is active
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

When SEV-SNP is active, a memory region mapped encrypted in the page
table must be validated before access. There are two approaches that
can be taken to validate the system RAM detected during the PEI phase:

1) Validate on-demand
OR
2) Validate before access

On-demand
=========
If memory is not validated before access, it will cause a #VC
exception with the page-not-validated error code. The VC exception
handler can perform the validation steps.

The pages that have been validated will need to be tracked to avoid
the double validation scenarios. The range of memory that has not
been validated will need to be communicated to the OS through the
recently introduced unaccepted memory type
https://github.com/microsoft/mu_basecore/pull/66, so that OS can
validate those ranges before using them.

Validate before access
======================
Since the PEI phase detects all the available system RAM, use the
MemEncryptSevSnpValidateSystemRam() function to pre-validate the
system RAM in the PEI phase.

For now, choose option 2 due to the dependency and the complexity
of the on-demand validation.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
202fb22be6 OvmfPkg/SecMain: validate the memory used for decompressing Fv
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The VMM launch sequence should have pre-validated all the data pages used
in the Reset vector. The range does not cover the data pages used during
the SEC phase (mainly PEI and DXE firmware volume decompression memory).

When SEV-SNP is active, the memory must be pre-validated before the access.
Add support to pre-validate the memory range from SnpSecPreValidatedStart
to SnpSecPreValidatedEnd. This should be sufficent to enter into the PEI
phase.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
d39f8d88ec OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The initial page built during the SEC phase is used by the
MemEncryptSevSnpValidateSystemRam() for the system RAM validation. The
page validation process requires using the PVALIDATE instruction;  the
instruction accepts a virtual address of the memory region that needs
to be validated. If hardware encounters a page table walk failure (due
to page-not-present) then it raises #GP.

The initial page table built in SEC phase address up to 4GB. Add an
internal function to extend the page table to cover > 4GB. The function
builds 1GB entries in the page table for access > 4GB. This will provide
the support to call PVALIDATE instruction for the virtual address >
4GB in PEI phase.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
11b15336f0 OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated system RAM
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The MemEncryptSevSnpPreValidateSystemRam() is used for pre-validating the
system RAM. As the boot progress, each phase validates a fixed region of
the RAM. In the PEI phase, the PlatformPei detects all the available RAM
and calls to pre-validate the detected system RAM.

While validating the system RAM in PEI phase, we must skip previously
validated system RAM to avoid the double validation.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
d706f8fec2 OvmfPkg/MemEncryptSevLib: add function to check the VMPL0
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Virtual Machine Privilege Level (VMPL) feature in the SEV-SNP
architecture allows a guest VM to divide its address space into four
levels. The level can be used to provide the hardware isolated
abstraction layers with a VM. The VMPL0 is the highest privilege, and
VMPL3 is the least privilege. Certain operations must be done by the
VMPL0 software, such as:

* Validate or invalidate memory range (PVALIDATE instruction)
* Allocate VMSA page (RMPADJUST instruction when VMSA=1)

The initial SEV-SNP support assumes that the guest is running on VMPL0.
Let's add function in the MemEncryptSevLib that can be used for checking
whether guest is booted under the VMPL0.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
ade62c18f4 OvmfPkg/MemEncryptSevLib: add support to validate system RAM
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Many of the integrity guarantees of SEV-SNP are enforced through the
Reverse Map Table (RMP). Each RMP entry contains the GPA at which a
particular page of DRAM should be mapped. The guest can request the
hypervisor to add pages in the RMP table via the Page State Change VMGEXIT
defined in the GHCB specification section 2.5.1 and 4.1.6. Inside each RMP
entry is a Validated flag; this flag is automatically cleared to 0 by the
CPU hardware when a new RMP entry is created for a guest. Each VM page
can be either validated or invalidated, as indicated by the Validated
flag in the RMP entry. Memory access to a private page that is not
validated generates a #VC. A VM can use the PVALIDATE instruction to
validate the private page before using it.

During the guest creation, the boot ROM memory is pre-validated by the
AMD-SEV firmware. The MemEncryptSevSnpValidateSystemRam() can be called
during the SEC and PEI phase to validate the detected system RAM.

One of the fields in the Page State Change NAE is the RMP page size. The
page size input parameter indicates that either a 4KB or 2MB page should
be used while adding the RMP entry. During the validation, when possible,
the MemEncryptSevSnpValidateSystemRam() will use the 2MB entry. A
hypervisor backing the memory may choose to use the different page size
in the RMP entry. In those cases, the PVALIDATE instruction should return
SIZEMISMATCH. If a SIZEMISMATCH is detected, then validate all 512-pages
constituting a 2MB region.

Upon completion, the PVALIDATE instruction sets the rFLAGS.CF to 0 if
instruction changed the RMP entry and to 1 if the instruction did not
change the RMP entry. The rFlags.CF will be 1 only when a memory region
is already validated. We should not double validate a memory
as it could lead to a security compromise. If double validation is
detected, terminate the boot.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
19914edc5a OvmfPkg/AmdSevDxe: do not use extended PCI config space
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Commit 85b8eac59b added support to ensure
that MMIO is only performed against the un-encrypted memory. If MMIO
is performed against encrypted memory, a #GP is raised.

The AmdSevDxe uses the functions provided by the MemEncryptSevLib to
clear the memory encryption mask from the page table. If the
MemEncryptSevLib is extended to include VmgExitLib then depedency
chain will look like this:

OvmfPkg/AmdSevDxe/AmdSevDxe.inf
-----> MemEncryptSevLib                    class
-----> "OvmfPkg/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf"   instance
-----> VmgExitLib                          class
-----> "OvmfPkg/VmgExitLib"    instance
-----> LocalApicLib                        class
-----> "UefiCpuPkg/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf" instance
-----> TimerLib                            class
-----> "OvmfPkg/AcpiTimerLib/DxeAcpiTimerLib.inf"   instance
-----> PciLib                                           class
-----> "OvmfPkg/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf"    instance
-----> PciExpressLib                                          class
-----> "MdePkg/BasePciExpressLib/BasePciExpressLib.inf"  instance

The LocalApicLib provides a constructor that gets called before the
AmdSevDxe can clear the memory encryption mask from the MMIO regions.

When running under the Q35 machine type, the call chain looks like this:

AcpiTimerLibConstructor ()  [AcpiTimerLib]
  PciRead32 ()              [DxePciLibI440FxQ35]
   PciExpressRead32 ()      [PciExpressLib]

The PciExpressRead32 () reads the MMIO region. The MMIO regions are not
yet mapped un-encrypted, so the check introduced in the commit
85b8eac59b raises a #GP.

The AmdSevDxe driver does not require the access to the extended PCI
config space. Accessing a normal PCI config space, via IO port should be
sufficent. Use the module-scope override to make the AmdSevDxe use the
BasePciLib instead of BasePciExpressLib so that PciRead32 () uses the
IO ports instead of the extended config space.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
a19b648952 OvmfPkg/PlatformPei: register GHCB gpa for the SEV-SNP guest
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The SEV-SNP guest requires that GHCB GPA must be registered before using.
See the GHCB specification section 2.3.2 for more details.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
d2b998fbdc OvmfPkg/VmgExitLib: use SEV-SNP-validated CPUID values
SEV-SNP firmware allows a special guest page to be populated with
guest CPUID values so that they can be validated against supported
host features before being loaded into encrypted guest memory to be
used instead of hypervisor-provided values [1].

Add handling for this in the CPUID #VC handler and use it whenever
SEV-SNP is enabled. To do so, existing CPUID handling via VmgExit is
moved to a helper, GetCpuidHyp(), and a new helper that uses the CPUID
page to do the lookup, GetCpuidFw(), is used instead when SNP is
enabled. For cases where SNP CPUID lookups still rely on fetching
specific CPUID fields from hypervisor, GetCpuidHyp() is used there as
well.

[1]: SEV SNP Firmware ABI Specification, Rev. 0.8, 8.13.2.6

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
7c3b2892ea OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The SEV-SNP guest requires that GHCB GPA must be registered before using.
See the GHCB specification section 2.3.2 for more details.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
d9822304ce OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled()
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Create a function that can be used to determine if VM is running as an
SEV-SNP guest.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
34819f2cac OvmfPkg/ResetVector: use SEV-SNP-validated CPUID values
CPUID instructions are issued during early boot to do things like probe
for SEV support. Currently these are handled by a minimal #VC handler
that uses the MSR-based GHCB protocol to fetch the CPUID values from
the hypervisor. When SEV-SNP is enabled, use the firmware-validated
CPUID values from the CPUID page instead [1].

[1]: SEV SNP Firmware ABI Specification, Rev. 0.8, 8.13.2.6

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
f2dc28f0b6 OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

An SEV-SNP guest requires that private memory (aka pages mapped encrypted)
must be validated before being accessed.

The validation process consist of the following sequence:

1) Set the memory encryption attribute in the page table (aka C-bit).
   Note: If the processor is in non-PAE mode, then all the memory accesses
   are considered private.
2) Add the memory range as private in the RMP table. This can be performed
   using the Page State Change VMGEXIT defined in the GHCB specification.
3) Use the PVALIDATE instruction to set the Validated Bit in the RMP table.

During the guest creation time, the VMM encrypts the OVMF_CODE.fd using
the SEV-SNP firmware provided LAUNCH_UPDATE_DATA command. In addition to
encrypting the content, the command also validates the memory region.
This allows us to execute the code without going through the validation
sequence.

During execution, the reset vector need to access some data pages
(such as page tables, SevESWorkarea, Sec stack). The data pages are
accessed as private memory. The data pages are not part of the
OVMF_CODE.fd, so they were not validated during the guest creation.

There are two approaches we can take to validate the data pages before
the access:

a) Enhance the OVMF reset vector code to validate the pages as described
   above (go through step 2 - 3).
OR
b) Validate the pages during the guest creation time. The SEV firmware
   provides a command which can be used by the VMM to validate the pages
   without affecting the measurement of the launch.

Approach #b seems much simpler; it does not require any changes to the
OVMF reset vector code.

Update the OVMF metadata with the list of regions that must be
pre-validated by the VMM before the boot.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
cca9cd3dd6 OvmfPkg: reserve CPUID page
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Platform features and capabilities are traditionally discovered via the
CPUID instruction. Hypervisors typically trap and emulate the CPUID
instruction for a variety of reasons. There are some cases where incorrect
CPUID information can potentially lead to a security issue. The SEV-SNP
firmware provides a feature to filter the CPUID results through the PSP.
The filtered CPUID values are saved on a special page for the guest to
consume. Reserve a page in MEMFD that will contain the results of
filtered CPUID values.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
707c71a01b OvmfPkg: reserve SNP secrets page
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

During the SNP guest launch sequence, a special secrets page needs to be
inserted by the VMM. The PSP will populate the page; it will contain the
VM Platform Communication Key (VMPCKs) used by the guest to send and
receive secure messages to the PSP.

The purpose of the secrets page in the SEV-SNP is different from the one
used in SEV guests. In SEV, the secrets page contains the guest owner's
private data after the remote attestation.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
3053183d41 OvmfPkg/ResetVector: introduce SEV metadata descriptor for VMM use
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The OvmfPkgX86 build reserves memory regions in MEMFD. The memory regions
get accessed in the SEC phase. AMD SEV-SNP require that the guest's
private memory be accepted or validated before access.

Introduce a Guided metadata structure that describes the reserved memory
regions. The VMM can locate the metadata structure by iterating through
the reset vector guid and process the areas based on the platform
specific requirements.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
2fe8edfe55 OvmfPkg/ResetVector: move clearing GHCB in SecMain
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

In preparation for SEV-SNP support move clearing of the GHCB memory from
the ResetVector/AmdSev.asm to SecMain/AmdSev.c. The GHCB page is not
accessed until SevEsProtocolCheck() switch to full GHCB. So, the move
does not make any changes in the code flow or logic. The move will
simplify the SEV-SNP support.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
e2289d19d8 UefiCpuPkg/MpInitLib: move SEV specific routines in AmdSev.c
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Move all the SEV specific function in AmdSev.c.

No functional change intended.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Suggested-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
2ddacfb6b8 OvmfPkg/SecMain: move SEV specific routines in AmdSev.c
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

Move all the SEV specific function in AmdSev.c.

No functional change intended.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
2021-12-09 06:28:10 +00:00
c82ab4d8c1 BaseTools/VfrCompile: Correct Bit Field Flags for numeric/one of
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3752

Add Bit mask to numeric/one of opcode to set correctly Flags for Bit Field.
VfrSyntax.g: Set "LFlags &= EDKII_IFR_DISPLAY_BIT" before "LFlags |= (EDKII_IFR_NUMERIC_SIZE_BIT & (_GET_CURRQEST_VARSIZE()));"
VfrFormPkg.h: update "if (LFlags & EFI_IFR_DISPLAY)" with "if (LFlags & EDKII_IFR_DISPLAY_BIT)" in SetFlagsForBitField()

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>

Signed-off-by: Long1 Huang <long1.huang@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2021-12-09 03:31:26 +00:00
d25b803e51 MdeModulePkg/Bus/Pci/UhciDxe: Fix the UsbHc memory allocate and free issue
When use the UsbHcAllocMemFromBlock() and UsbHcFreeMem() to allocate
memory and free memory for the UHC, it should use the corresponding host
address but not the pci bus address.

Signed-off-by: jdzhang <jdzhang@zd-tech.com.cn>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-12-09 02:36:30 +00:00
7b28310008 BaseTools: Increase the DevicePath length for support more PCD value.
Currently the PCD Value only support 13 Guid,When use more 13 pcd will cause the build tool fail,
Need calculate the required memory,then allocate it.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3718

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Signed-off-by: Xiaolu Jiang <xiaolu.jiang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2021-12-09 00:43:16 +00:00
85a678bf76 UefiPayloadPkg: Add integration instruction for coreboot common error
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3753

When integrate the latest UefiPayload with coreboot 4.14 or older, a
common error would occur like "E: Not a usable UEFI firmware volume."
The change adds an entry for how to solve this issue.

Cc: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Aaron Li <aaron.li@intel.com>
2021-12-08 04:08:21 +00:00
965292135b UefiPayloadPkg/UefiPayloadPkg.dsc:Add BootManagerLib for BootManagerMenuApp
Add PlatformBootManagerLibconstructor for BootManagerMenuApp,
to get the value PcdBootManagefile overrided by platform side.

Signed-off-by: Ning Feng <ning.feng@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2021-12-08 04:08:21 +00:00
ffdde9d719 UefiPayloadPkg: Skip ModuleInfo HOB in Payload
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3754

1. DxeCore will use ModuleInfo to install LoadedImage protocol for DxeCore.
2. DxeIpl will create the ModuleInfo of UniversalPayload. and
   UniversalPayload will create the ModuleInfo of DxeCore.
3. UniversalPayload should skip the ModuleInfo from the DxeIpl to avoid
   the mismatched ModuleInfo for DxeCore.

Changes:
1. Use function IsHobNeed to check if the HOB should be added
2. Add the ModuleInfo check logic in IsHobNeed function

Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
2021-12-08 04:08:21 +00:00
2527723de9 UefiPayloadPkg: Add performance measurement feature
Add a Macro to enable performance measurement feature.
For any platform that uses UniversalPayload, we assume it supports
BaseCpuTimerLib and use it to align timerlib to get more accurate
performance result.

Reviewed-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2021-12-08 04:08:21 +00:00
94e0a7bddb UefiPayloadPkg: Add missing Guid gUefiAcpiBoardInfoGuid
The library PciSegmentInfoLibAcpiBoardInfo consumes the Guid gUefiAcpiBoardInfoGuid.

Reviewed-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2021-12-08 04:08:21 +00:00
b2f7ee2ded UefiPayloadPkg: Increase SystemMemoryUefiRegionSize from 32M to 64M
Current, the SystemMemoryUefiRegionSize is 32M, which means in universal
payload entry, we can at most use 32M heap.
However, this can't meet the memory requirment for 5 level page table.
In UefiPayloadPkg\UefiPayloadEntry\X64\VirtualMemory.c, we assume the
Physical Address at most has 52 bits. Using 1G table support, with 52 bits
Physical Address, to build page table, we need one page to hold 16 PML5
entries, each PML5 entry points to one page containing 512 PML4 entries.
One PML4 entry points to one page containing 512 PML3 entries. Each PML3
entries will point to 1G memory space. Totally 8209 pages are needed,
which is around 32M bytes.

Therefore, increase SystemMemoryUefiRegionSize from 32M to 64M to support
5 level page tables.

Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2021-12-08 04:08:21 +00:00
ca78281c25 UefiPayloadPkg/PayloadEntry: Inherit 4/5-level paging from bootloader
The patch removes the dep on PcdUse5LevelPageTable.
Now the payload inherits the 5-level paging setting from
bootloader in IA-32e mode and uses 4-level paging in
legacy protected mode.

This fix the potential issue when bootloader enables 5-level paging
but 64bit payload sets 4-level page table to CR3 resulting CPU
exception because PcdUse5LevelPageTable is FALSE.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
2021-12-08 04:08:21 +00:00
1832eb15aa UefiPayloadPkg/UefiPayloadPkg.fdf: Update DXE Apriori list
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3729

Put ReportStatusCodeRouterRuntimeDxe and StatusCodeHandlerRuntimeDxe in
DXE Apriori list to enable DEBUG() via serial port through
PeiDxeDebugLibReportStatusCode DebugLib instance as early as possible.
The earliest point to add them is right before BlSupportDxe.

Signed-off-by: Gao Cheng <gao.cheng@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
2021-12-08 04:08:21 +00:00
dc453b5164 .pytool/Plugin/UncrustifyCheck: Add Uncrustify CI plugin
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3748

Adds a new CI plugin for Uncrustify. This is used to check
coding standard compliance of source code to the EDK II C Coding
Standards Specification.

An external dependency is added in the plugin directory to retrieve
the Uncrustify executable. Currently, the executable is from an edk2
fork of the application host in this repository:

https://dev.azure.com/projectmu/Uncrustify/

Note that the Uncrustify application outputs the commit ID that the
application was built from when given the --version parameter.

This ID can be mapped to the version specified in the Uncrustify CI
plugin external dependency file (uncrustify_ext_dep.yaml) such as
73.0.3 by visiting the Uncrustify edk2 fork release pipeline page
which associates the NuGet package version with the commit ID it was
built from:

https://dev.azure.com/projectmu/Uncrustify/_build

The default Uncrustify configuration files are added in the plugin
directory. Additional details are in the Readme.md file added in
the Uncrustify plugin directory.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Tested-by: Michael D Kinney <michael.d.kinney@intel.com>
2021-12-07 18:51:02 +00:00
7c0ad2c338 UnitTestFrameworkPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UnitTestFrameworkPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
2021-12-07 17:24:28 +00:00
e5efcf8be8 UefiPayloadPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
053e878bfb UefiCpuPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiCpuPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
91415a36ae StandaloneMmPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the StandaloneMmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
c1e126b119 SourceLevelDebugPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the SourceLevelDebugPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
b878648967 SignedCapsulePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the SignedCapsulePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
47d20b54f9 ShellPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ShellPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
c411b485b6 SecurityPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the SecurityPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
39de741e2d RedfishPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the RedfishPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
2021-12-07 17:24:28 +00:00
5220bd211d PcAtChipsetPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the PcAtChipsetPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
ac0a286f4d OvmfPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the OvmfPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
d1050b9dff NetworkPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the NetworkPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-12-07 17:24:28 +00:00
2f88bd3a12 MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
1436aea4d5 MdeModulePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the MdeModulePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
7c7184e201 IntelFsp2WrapperPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2WrapperPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2021-12-07 17:24:28 +00:00
111f2228dd IntelFsp2Pkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2Pkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
2021-12-07 17:24:28 +00:00
45ce0a67bb FmpDevicePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the FmpDevicePkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
bcdcc4160d FatPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the FatPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
a550d468a6 EmulatorPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the EmulatorPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
e7108d0e96 EmbeddedPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the EmbeddedPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
731c67e1d7 DynamicTablesPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the DynamicTablesPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
7c34237831 CryptoPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the CryptoPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
2b16a4fb91 ArmVirtPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmVirtPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
40b0b23ed3 ArmPlatformPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPlatformPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
429309e0c6 ArmPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the ArmPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
7c2a6033c1 UefiCpuPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
f9f4fb2329 SecurityPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
deba54761a PcAtChipsetPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
8e875037bf OvmfPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
ed7f7c9168 NetworkPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-12-07 17:24:28 +00:00
098307e082 MdePkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
db52c7f755 MdeModulePkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
4a9d411662 DynamicTablesPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
e3b855f283 CryptoPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
ea85f0fe13 ArmVirtPkg: Change complex DEBUG_CODE() to DEBUG_CODE_BEGIN/END()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3767

Update use of DEBUG_CODE(Expression) if Expression is a complex code
block with if/while/for/case statements that use {}.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
78bc3bdd2a UnitTestFrameworkPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
2021-12-07 17:24:28 +00:00
e35dd32821 UefiPayloadPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
4ec586b9f6 UefiCpuPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
902e76de19 StandaloneMmPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
f9c9215b55 SourceLevelDebugPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
18908e6131 SignedCapsulePkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
9b8507cabe ShellPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
12710fe93b SecurityPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
dc8fe5ec95 RedfishPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
2021-12-07 17:24:28 +00:00
237295f46d PcAtChipsetPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
79d49e162e OvmfPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
8874fa199d NetworkPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-12-07 17:24:28 +00:00
d0e2f8232a MdePkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
e3917e22e7 MdeModulePkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
9c721071d3 FmpDevicePkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
c69fc80c80 EmulatorPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
792433088c EmbeddedPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
fe2d81892f DynamicTablesPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
c8f46130f8 CryptoPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
9607597a74 ArmVirtPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-12-07 17:24:28 +00:00
2863ba97ca ArmPlatformPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
1871d28eaf ArmPkg: Change OPTIONAL keyword usage style
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3760

Update all use of ', OPTIONAL' to ' OPTIONAL,' for function params.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2021-12-07 17:24:28 +00:00
96e1cba5c1 UefiCpuPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
586fda4800 SourceLevelDebugPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2021-12-07 17:24:28 +00:00
4a1aee13d8 ShellPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
e905fbb05a SecurityPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2021-12-07 17:24:28 +00:00
ca56749b0e PcAtChipsetPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
47719926e8 OvmfPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07 17:24:28 +00:00
c49ca4a29e NetworkPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>
2021-12-07 17:24:28 +00:00
5f289f3ae3 MdePkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
87000d7708 MdeModulePkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-12-07 17:24:28 +00:00
917e98f3e5 FatPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
9c7da8d804 EmulatorPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-12-07 17:24:28 +00:00
a1878955b2 EmbeddedPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07 17:24:28 +00:00
c5b3a56e4f ArmVirtPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07 17:24:28 +00:00
1d2482e1e3 ArmPlatformPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07 17:24:28 +00:00
a4a582e180 ArmPkg: Change use of EFI_D_* to DEBUG_*
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739

Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07 17:24:28 +00:00
dfafa8e453 MdeModulePkg/DxeCorePerformanceLib:Variable Initial
SmmBootRecordDataSize is initialized in InternalGetSmmPerData,
but this function may fail. so to avoid using SmmBootRecordDataSize
without intialization, set it to 0 at first.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Wenyi Xie <xiewenyi2@huawei.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
2021-12-03 09:57:17 +00:00
f0f3f5aae7 UnitTestFrameworkPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
2021-11-30 14:19:07 +00:00
c057347977 UefiPayloadPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
2021-11-30 14:19:07 +00:00
c30c40d6c6 StandaloneMmPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2021-11-30 14:19:07 +00:00
9944508e85 ShellPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Acked-by: Zhichao Gao <zhichao.gao@intel.com>
2021-11-30 14:19:07 +00:00
60fa40be45 SecurityPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Qi Zhang <qi1.zhang@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Qi Zhang <qi1.zhang@intel.com>
2021-11-30 14:19:07 +00:00
df790cd6b3 MdePkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-11-30 14:19:07 +00:00
9deb937076 MdeModulePkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-11-30 14:19:07 +00:00
d7d30e8f21 EmulatorPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2021-11-30 14:19:07 +00:00
d5744ecba8 CryptoPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Xiaoyu Lu <xiaoyux.lu@intel.com>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
2021-11-30 14:19:07 +00:00
c97fee87f0 ArmVirtPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-11-30 14:19:07 +00:00
1939fc9569 ArmPlatformPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-11-30 14:19:07 +00:00
365dced2c3 ArmPkg: Update YAML to ignore specific ECC files/errors
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3749

Update package YAML files to ignore ECC errors that are
already present.  These issues must be fixed in the future,
but should not block source code changes for these known
issues.

Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2021-11-30 14:19:07 +00:00
76a1ce4d5f .azurepipelines/templates: Update max pipeline job time to 2 hours
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3750

Large patches that modify a large number of files(e.g uncrustify)
take longer to process through CI checks such as ECC.  Increase
the max job time from 1 hour to 2 hours to accommodate larger patch
series.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2021-11-29 07:33:52 +00:00
99f84ff473 .pytools/Plugin/LicenseCheck: Use temp directory for git diff output
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3746

Use --output option in git diff command to remove code diffs
from build log on stdout when LicenseCheck plugin is run.
Instead, create a temp directory for the diff output file and
remove the temp directory after the diff output is processed.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
2021-11-29 07:12:18 +00:00
3019f1bbab .pytool/Plugin/EccCheck: Add performance optimizations
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2986

Improve the performance of EccCheck by using a temp file
instead of stdout to capture the results of the git diff
commands. If a large patch set is passed into EccCheck,
using stdout could be slow and also added the large diff
content to the build log that is redundant information.

A second performance improvement is to filter the
modified directories to remove duplicate directories.
Complex libraries and modules that have subdirectories
with sources would be scanned twice if there were source
changes in both the main directory and subdirectories.
Filter out the subdirectories from the modified directory
list when this case is detected.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-11-29 06:38:51 +00:00
854462bd34 .pytool/Plugin/EccCheck: Remove temp directory on exception
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2986

Add try/except to RunBuildPlugin() to remove temporary
directory if a KeyboardInterrupt exception or an unexpected
exception is detected.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-11-29 06:38:51 +00:00
69877614fd .pytool/Plugin/EccCheck: Remove RevertCode()
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2986

The RevertCode() method uses git reset which can remove
local changes. Instead of modifying the local files, a
copy of the package passed into the EccCheck tool is
copied to a temp directory in Build/ecctemp.  This same
temp directory is also used for exception.xml. The working
directory used by ECC is also set to this same temp
directory. The combination of these changes eliminates
operations that that modified the git state.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Sean Brogan <sean.brogan@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2021-11-29 06:38:51 +00:00
ef9a059cdb EmulatorPkg/Win/Host: Update CC_FLAGS
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3747

* Remove deprecated option /Gm that generates a warning.
* Remove /Zi and use '=' instead of '== to let DEBUG/RELEASE/NOOPT
  profile from tools_def.txt enable debug information
* Remove /Gs8192 option that is overriding the larger setting of
  /GS32768 from tools_def.txt that generates a warning.

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael Kubacki <michael.kubacki@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Ray Ni <ray.ni@Intel.com>
2021-11-29 05:44:34 +00:00
4466 changed files with 368212 additions and 326850 deletions

View File

@ -17,7 +17,7 @@ parameters:
jobs:
- job: Build_${{ parameters.tool_chain_tag }}
timeoutInMinutes: 120
#Use matrix to speed up the build process
strategy:
matrix:

View File

@ -30,7 +30,6 @@ class EccCheck(ICiBuildPlugin):
},
"""
ReModifyFile = re.compile(r'[B-Q,S-Z]+[\d]*\t(.*)')
FindModifyFile = re.compile(r'\+\+\+ b\/(.*)')
LineScopePattern = (r'@@ -\d*\,*\d* \+\d*\,*\d* @@.*')
LineNumRange = re.compile(r'@@ -\d*\,*\d* \+(\d*)\,*(\d*) @@.*')
@ -69,77 +68,174 @@ class EccCheck(ICiBuildPlugin):
env.set_shell_var('WORKSPACE', workspace_path)
env.set_shell_var('PACKAGES_PATH', os.pathsep.join(Edk2pathObj.PackagePathList))
self.ECC_PASS = True
self.ApplyConfig(pkgconfig, workspace_path, basetools_path, packagename)
modify_dir_list = self.GetModifyDir(packagename)
patch = self.GetDiff(packagename)
ecc_diff_range = self.GetDiffRange(patch, packagename, workspace_path)
self.GenerateEccReport(modify_dir_list, ecc_diff_range, workspace_path, basetools_path)
ecc_log = os.path.join(workspace_path, "Ecc.log")
self.RevertCode()
# Create temp directory
temp_path = os.path.join(workspace_path, 'Build', '.pytool', 'Plugin', 'EccCheck')
try:
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
# Copy package being scanned to temp_path
shutil.copytree (
os.path.join(workspace_path, packagename),
os.path.join(temp_path, packagename),
symlinks=True
)
# Copy exception.xml to temp_path
shutil.copyfile (
os.path.join(basetools_path, "Source", "Python", "Ecc", "exception.xml"),
os.path.join(temp_path, "exception.xml")
)
# Output file to use for git diff operations
temp_diff_output = os.path.join (temp_path, 'diff.txt')
self.ApplyConfig(pkgconfig, temp_path, packagename)
modify_dir_list = self.GetModifyDir(packagename, temp_diff_output)
patch = self.GetDiff(packagename, temp_diff_output)
ecc_diff_range = self.GetDiffRange(patch, packagename, temp_path)
#
# Use temp_path as working directory when running ECC tool
#
self.GenerateEccReport(modify_dir_list, ecc_diff_range, temp_path, basetools_path)
ecc_log = os.path.join(temp_path, "Ecc.log")
if self.ECC_PASS:
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetSuccess()
self.RemoveFile(ecc_log)
return 0
else:
with open(ecc_log, encoding='utf8') as output:
ecc_output = output.readlines()
for line in ecc_output:
logging.error(line.strip())
self.RemoveFile(ecc_log)
tc.SetFailed("EccCheck failed for {0}".format(packagename), "Ecc detected issues")
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck failed for {0}".format(packagename), "CHECK FAILED")
return 1
except KeyboardInterrupt:
# If EccCheck is interrupted by keybard interrupt, then return failure
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck interrupted for {0}".format(packagename), "CHECK FAILED")
return 1
else:
# If EccCheck fails for any other exception type, raise the exception
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
tc.SetFailed("EccCheck exception for {0}".format(packagename), "CHECK FAILED")
raise
return 1
def RevertCode(self) -> None:
submoudle_params = "submodule update --init"
RunCmd("git", submoudle_params)
reset_params = "reset HEAD --hard"
RunCmd("git", reset_params)
def GetDiff(self, pkg: str) -> List[str]:
return_buffer = StringIO()
params = "diff --unified=0 origin/master HEAD"
RunCmd("git", params, outstream=return_buffer)
p = return_buffer.getvalue().strip()
patch = p.split("\n")
return_buffer.close()
def GetDiff(self, pkg: str, temp_diff_output: str) -> List[str]:
patch = []
#
# Generate unified diff between origin/master and HEAD.
#
params = "diff --output={} --unified=0 origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
with open(temp_diff_output) as file:
patch = file.read().strip().split('\n')
return patch
def RemoveFile(self, file: str) -> None:
if os.path.exists(file):
os.remove(file)
return
def GetModifyDir(self, pkg: str, temp_diff_output: str) -> List[str]:
#
# Generate diff between origin/master and HEAD using --diff-filter to
# exclude deleted and renamed files that do not need to be scanned by
# ECC. Also use --name-status to only generate the names of the files
# with differences. The output format of this git diff command is a
# list of files with the change status and the filename. The filename
# is always at the end of the line. Examples:
#
# M MdeModulePkg/Application/CapsuleApp/CapsuleApp.h
# M MdeModulePkg/Application/UiApp/FrontPage.h
#
params = "diff --output={} --diff-filter=dr --name-status origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
dir_list = []
with open(temp_diff_output) as file:
dir_list = file.read().strip().split('\n')
def GetModifyDir(self, pkg: str) -> List[str]:
return_buffer = StringIO()
params = "diff --name-status" + ' HEAD' + ' origin/master'
RunCmd("git", params, outstream=return_buffer)
p1 = return_buffer.getvalue().strip()
dir_list = p1.split("\n")
return_buffer.close()
modify_dir_list = []
for modify_dir in dir_list:
file_path = self.ReModifyFile.findall(modify_dir)
if file_path:
file_dir = os.path.dirname(file_path[0])
else:
#
# Parse file name from the end of the line
#
file_path = modify_dir.strip().split()
#
# Skip lines that do not have at least 2 elements (status and file name)
#
if len(file_path) < 2:
continue
if pkg in file_dir and file_dir != pkg:
modify_dir_list.append('%s' % file_dir)
else:
#
# Parse the directory name from the file name
#
file_dir = os.path.dirname(file_path[-1])
#
# Skip directory names that do not start with the package being scanned.
#
if file_dir.split('/')[0] != pkg:
continue
#
# Skip directory names that are identical to the package being scanned.
# The assumption here is that there are no source files at the package
# root. Instead, the only expected files in the package root are
# EDK II meta data files (DEC, DSC, FDF).
#
if file_dir == pkg:
continue
#
# Skip directory names that are already in the modified dir list
#
if file_dir in modify_dir_list:
continue
#
# Add the candidate directory to scan to the modified dir list
#
modify_dir_list.append(file_dir)
modify_dir_list = list(set(modify_dir_list))
return modify_dir_list
#
# Remove duplicates from modify_dir_list
# Given a folder path, ECC performs a recursive scan of that folder.
# If a parent and child folder are both present in modify_dir_list,
# then ECC will perform redudanct scans of source files. In order
# to prevent redundant scans, if a parent and child folder are both
# present, then remove all the child folders.
#
# For example, if modified_dir_list contains the following elements:
# MdeModulePkg/Core/Dxe
# MdeModulePkg/Core/Dxe/Hand
# MdeModulePkg/Core/Dxe/Mem
#
# Then MdeModulePkg/Core/Dxe/Hand and MdeModulePkg/Core/Dxe/Mem should
# be removed because the files in those folders are covered by a scan
# of MdeModulePkg/Core/Dxe.
#
filtered_list = []
for dir1 in modify_dir_list:
Append = True
for dir2 in modify_dir_list:
if dir1 == dir2:
continue
common = os.path.commonpath([dir1, dir2])
if os.path.normpath(common) == os.path.normpath(dir2):
Append = False
break
if Append and dir1 not in filtered_list:
filtered_list.append(dir1)
return filtered_list
def GetDiffRange(self, patch_diff: List[str], pkg: str, workingdir: str) -> Dict[str, List[Tuple[int, int]]]:
def GetDiffRange(self, patch_diff: List[str], pkg: str, temp_path: str) -> Dict[str, List[Tuple[int, int]]]:
IsDelete = True
StartCheck = False
range_directory: Dict[str, List[Tuple[int, int]]] = {}
for line in patch_diff:
modify_file = self.FindModifyFile.findall(line)
if modify_file and pkg in modify_file[0] and not StartCheck and os.path.isfile(modify_file[0]):
modify_file_comment_dic = self.GetCommentRange(modify_file[0], workingdir)
modify_file_comment_dic = self.GetCommentRange(modify_file[0], temp_path)
IsDelete = False
StartCheck = True
modify_file_dic = modify_file[0]
@ -158,11 +254,13 @@ class EccCheck(ICiBuildPlugin):
range_directory[modify_file_dic].append(i)
return range_directory
def GetCommentRange(self, modify_file: str, workingdir: str) -> List[Tuple[int, int]]:
modify_file_path = os.path.join(workingdir, modify_file)
def GetCommentRange(self, modify_file: str, temp_path: str) -> List[Tuple[int, int]]:
comment_range: List[Tuple[int, int]] = []
modify_file_path = os.path.join(temp_path, modify_file)
if not os.path.exists (modify_file_path):
return comment_range
with open(modify_file_path) as f:
line_no = 1
comment_range: List[Tuple[int, int]] = []
Start = False
for line in f:
if line.startswith('/**'):
@ -179,35 +277,33 @@ class EccCheck(ICiBuildPlugin):
return comment_range
def GenerateEccReport(self, modify_dir_list: List[str], ecc_diff_range: Dict[str, List[Tuple[int, int]]],
workspace_path: str, basetools_path: str) -> None:
temp_path: str, basetools_path: str) -> None:
ecc_need = False
ecc_run = True
config = os.path.join(basetools_path, "Source", "Python", "Ecc", "config.ini")
exception = os.path.join(basetools_path, "Source", "Python", "Ecc", "exception.xml")
report = os.path.join(workspace_path, "Ecc.csv")
config = os.path.normpath(os.path.join(basetools_path, "Source", "Python", "Ecc", "config.ini"))
exception = os.path.normpath(os.path.join(temp_path, "exception.xml"))
report = os.path.normpath(os.path.join(temp_path, "Ecc.csv"))
for modify_dir in modify_dir_list:
target = os.path.join(workspace_path, modify_dir)
target = os.path.normpath(os.path.join(temp_path, modify_dir))
logging.info('Run ECC tool for the commit in %s' % modify_dir)
ecc_need = True
ecc_params = "-c {0} -e {1} -t {2} -r {3}".format(config, exception, target, report)
return_code = RunCmd("Ecc", ecc_params, workingdir=workspace_path)
return_code = RunCmd("Ecc", ecc_params, workingdir=temp_path)
if return_code != 0:
ecc_run = False
break
if not ecc_run:
logging.error('Fail to run ECC tool')
self.ParseEccReport(ecc_diff_range, workspace_path)
self.ParseEccReport(ecc_diff_range, temp_path)
if not ecc_need:
logging.info("Doesn't need run ECC check")
revert_params = "checkout -- {}".format(exception)
RunCmd("git", revert_params)
return
def ParseEccReport(self, ecc_diff_range: Dict[str, List[Tuple[int, int]]], workspace_path: str) -> None:
ecc_log = os.path.join(workspace_path, "Ecc.log")
ecc_csv = os.path.join(workspace_path, "Ecc.csv")
def ParseEccReport(self, ecc_diff_range: Dict[str, List[Tuple[int, int]]], temp_path: str) -> None:
ecc_log = os.path.join(temp_path, "Ecc.log")
ecc_csv = os.path.join(temp_path, "Ecc.csv")
row_lines = []
ignore_error_code = self.GetIgnoreErrorCode()
if os.path.exists(ecc_csv):
@ -236,16 +332,16 @@ class EccCheck(ICiBuildPlugin):
log.writelines(all_line)
return
def ApplyConfig(self, pkgconfig: Dict[str, List[str]], workspace_path: str, basetools_path: str, pkg: str) -> None:
def ApplyConfig(self, pkgconfig: Dict[str, List[str]], temp_path: str, pkg: str) -> None:
if "IgnoreFiles" in pkgconfig:
for a in pkgconfig["IgnoreFiles"]:
a = os.path.join(workspace_path, pkg, a)
a = os.path.join(temp_path, pkg, a)
a = a.replace(os.sep, "/")
logging.info("Ignoring Files {0}".format(a))
if os.path.exists(a):
if os.path.isfile(a):
self.RemoveFile(a)
os.remove(a)
elif os.path.isdir(a):
shutil.rmtree(a)
else:
@ -253,7 +349,7 @@ class EccCheck(ICiBuildPlugin):
if "ExceptionList" in pkgconfig:
exception_list = pkgconfig["ExceptionList"]
exception_xml = os.path.join(basetools_path, "Source", "Python", "Ecc", "exception.xml")
exception_xml = os.path.join(temp_path, "exception.xml")
try:
logging.info("Appending exceptions")
self.AppendException(exception_list, exception_xml)

View File

@ -5,6 +5,7 @@
##
import os
import shutil
import logging
import re
from io import StringIO
@ -61,12 +62,19 @@ class LicenseCheck(ICiBuildPlugin):
# - Junit Logger
# - output_stream the StringIO output stream from this plugin via logging
def RunBuildPlugin(self, packagename, Edk2pathObj, pkgconfig, environment, PLM, PLMHelper, tc, output_stream=None):
return_buffer = StringIO()
params = "diff --unified=0 origin/master HEAD"
RunCmd("git", params, outstream=return_buffer)
p = return_buffer.getvalue().strip()
patch = p.split("\n")
return_buffer.close()
# Create temp directory
temp_path = os.path.join(Edk2pathObj.WorkspacePath, 'Build', '.pytool', 'Plugin', 'LicenseCheck')
if not os.path.exists(temp_path):
os.makedirs(temp_path)
# Output file to use for git diff operations
temp_diff_output = os.path.join (temp_path, 'diff.txt')
params = "diff --output={} --unified=0 origin/master HEAD".format(temp_diff_output)
RunCmd("git", params)
with open(temp_diff_output) as file:
patch = file.read().strip().split("\n")
# Delete temp directory
if os.path.exists(temp_path):
shutil.rmtree(temp_path)
ignore_files = []
if "IgnoreFiles" in pkgconfig:

View File

@ -0,0 +1,120 @@
# UncrustifyCheck Plugin
This CiBuildPlugin scans all the files in a given package and checks for coding standard compliance issues.
This plugin is enabled by default. If a package would like to prevent the plugin from reporting errors, it can do
so by enabling [`AuditOnly`](#auditonly) mode.
This plugin requires the directory containing the Uncrustify executable that should be used for this plugin to
be specified in an environment variable named `UNCRUSTIFY_CI_PATH`. This unique variable name is used to avoid confusion
with other paths to Uncrustify which might not be the expected build for use by this plugin.
By default, an Uncrustify configuration file named "uncrustify.cfg" located in the same directory as the plugin is
used. The value can be overridden to a package-specific path with the `ConfigFilePath` configuration file option.
* Uncrustify source code and documentation: https://github.com/uncrustify/uncrustify
* Project Mu Uncrustify fork source code and documentation: https://dev.azure.com/projectmu/Uncrustify
## Files Checked in a Package
By default, this plugin will discover all files in the package with the following default paths:
```python
[
# C source
"*.c",
"*.h"
]
```
From this list of files, any files ignored by Git or residing in a Git submodule will be removed. If Git is not
found, submodules are not found, or ignored files are not found no changes are made to the list of discovered files.
To control the paths checked in a given package, review the configuration options described in this file.
## Configuration
The plugin can be configured with a few optional configuration options.
``` yaml
"UncrustifyCheck": {
"AdditionalIncludePaths": [], # Additional paths to check formatting (wildcards supported).
"AuditOnly": False, # Don't fail the build if there are errors. Just log them.
"ConfigFilePath": "", # Custom path to an Uncrustify config file.
"IgnoreStandardPaths": [], # Standard Plugin defined paths that should be ignored.
"OutputFileDiffs": False, # Output chunks of formatting diffs in the test case log.
# This can significantly slow down the plugin on very large packages.
"SkipGitExclusions": False # Don't exclude git ignored files and files in git submodules.
}
```
### `AdditionalIncludePaths`
A package configuration file can specify any additional paths to be included with this option.
At this time, it is recommended all files run against the plugin be written in the C or C++ language.
### `AuditOnly`
`Boolean` - Default is `False`.
If `True`, run the test in an "audit only mode" which will log all errors but instead of failing the build, it will set
the test as skipped. This allows visibility into the failures without breaking the build.
### `ConfigFilePath`
`String` - Default is `"uncrustify.cfg"`
When specified in the config file, this is a package relative path to the Uncrustify configuration file.
### `IgnoreStandardPaths`
This plugin by default will check the below standard paths. A package configuration file can specify any of these paths
to be ignored.
```python
[
# C source
"*.c",
"*.h"
]
```
### `OutputFileDiffs`
`Boolean` - Default is `False`.
If `True`, output diffs of formatting changes into the test case log. This is helpful to exactly understand what changes
need to be made to the source code in order to fix a coding standard compliance issue.
Note that calculating the file diffs on a very large set of of results (e.g. >100 files) can significantly slow down
plugin execution.
### `SkipGitExclusions`
`Boolean` - Default is `False`.
By default, files in paths matched in a .gitignore file or a recognized git submodule are excluded. If this option
is `True`, the plugin will not attempt to recognize these files and exclude them.
## High-Level Plugin Operation
This plugin generates two main sets of temporary files:
1. A working directory in the directory `Build/.pytool/Plugin/Uncrustify`
2. For each source file with formatting errors, a sibling file with the `.uncrustify_plugin` extension
The working directory contains temporary files unique to operation of the plugin. All of these files are removed on
exit of the plugin including successful or unsuccessful execution (such as a Python exception occurring). If for any
reason, any files in the package exist prior to running the plugin with the `.uncrustify_plugin` extension, the plugin
will inform the user to remove these files and exit before running Uncrustify. This is to ensure the accuracy of the
results reported from each execution instance of the plugin.
The plugin determines the list of relevant files to check with Uncrustify and then invokes Uncrustify with that file
list. For any files not compliant to the configuration file provided, Uncrustify will generate a corresponding file
with the `.uncrustify_plugin` extension. The plugin discovers all of these files. If any such files are present, this
indicates a formatting issue was found and the test is marked failed (unless `AuditOnly` mode is enabled).
The test case log will contain a report of which files failed to format properly, allowing the user to run Uncrustify
against the file locally to fix the issue. If the `OutputFileDiffs` configuration option is set to `True`, the plugin
will output diff chunks for all code formatting issues in the test case log.

View File

@ -0,0 +1,618 @@
# @file UncrustifyCheck.py
#
# An edk2-pytool based plugin wrapper for Uncrustify
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
import configparser
import difflib
import errno
import logging
import os
import pathlib
import shutil
import timeit
from edk2toolext.environment import version_aggregator
from edk2toolext.environment.plugin_manager import PluginManager
from edk2toolext.environment.plugintypes.ci_build_plugin import ICiBuildPlugin
from edk2toolext.environment.plugintypes.uefi_helper_plugin import HelperFunctions
from edk2toolext.environment.var_dict import VarDict
from edk2toollib.log.junit_report_format import JunitReportTestCase
from edk2toollib.uefi.edk2.path_utilities import Edk2Path
from edk2toollib.utility_functions import RunCmd
from io import StringIO
from typing import Any, Dict, List, Tuple
#
# Provide more user friendly messages for certain scenarios
#
class UncrustifyException(Exception):
def __init__(self, message, exit_code):
super().__init__(message)
self.exit_code = exit_code
class UncrustifyAppEnvVarNotFoundException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -101)
class UncrustifyAppVersionErrorException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -102)
class UncrustifyAppExecutionException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -103)
class UncrustifyStalePluginFormattedFilesException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -120)
class UncrustifyInputFileCreationErrorException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -121)
class UncrustifyInvalidIgnoreStandardPathsException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -122)
class UncrustifyGitIgnoreFileException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -140)
class UncrustifyGitSubmoduleException(UncrustifyException):
def __init__(self, message):
super().__init__(message, -141)
class UncrustifyCheck(ICiBuildPlugin):
"""
A CiBuildPlugin that uses Uncrustify to check the source files in the
package being tested for coding standard issues.
By default, the plugin runs against standard C source file extensions but
its configuration can be modified through its configuration file.
Configuration options:
"UncrustifyCheck": {
"AdditionalIncludePaths": [], # Additional paths to check formatting (wildcards supported).
"AuditOnly": False, # Don't fail the build if there are errors. Just log them.
"ConfigFilePath": "", # Custom path to an Uncrustify config file.
"IgnoreStandardPaths": [], # Standard Plugin defined paths that should be ignored.
"OutputFileDiffs": False, # Output chunks of formatting diffs in the test case log.
# This can significantly slow down the plugin on very large packages.
"SkipGitExclusions": False # Don't exclude git ignored files and files in git submodules.
}
"""
#
# By default, use an "uncrustify.cfg" config file in the plugin directory
# A package can override this path via "ConfigFilePath"
#
# Note: Values specified via "ConfigFilePath" are relative to the package
#
DEFAULT_CONFIG_FILE_PATH = os.path.join(
pathlib.Path(__file__).parent.resolve(), "uncrustify.cfg")
#
# The extension used for formatted files produced by this plugin
#
FORMATTED_FILE_EXTENSION = ".uncrustify_plugin"
#
# A package can add any additional paths with "AdditionalIncludePaths"
# A package can remove any of these paths with "IgnoreStandardPaths"
#
STANDARD_PLUGIN_DEFINED_PATHS = ("*.c", "*.h")
#
# The Uncrustify application path should set in this environment variable
#
UNCRUSTIFY_PATH_ENV_KEY = "UNCRUSTIFY_CI_PATH"
def GetTestName(self, packagename: str, environment: VarDict) -> Tuple:
""" Provide the testcase name and classname for use in reporting
Args:
packagename: string containing name of package to build
environment: The VarDict for the test to run in
Returns:
A tuple containing the testcase name and the classname
(testcasename, classname)
testclassname: a descriptive string for the testcase can include whitespace
classname: should be patterned <packagename>.<plugin>.<optionally any unique condition>
"""
return ("Check file coding standard compliance in " + packagename, packagename + ".UncrustifyCheck")
def RunBuildPlugin(self, package_rel_path: str, edk2_path: Edk2Path, package_config: Dict[str, List[str]], environment_config: Any, plugin_manager: PluginManager, plugin_manager_helper: HelperFunctions, tc: JunitReportTestCase, output_stream=None) -> int:
"""
External function of plugin. This function is used to perform the task of the CiBuild Plugin.
Args:
- package_rel_path: edk2 workspace relative path to the package
- edk2_path: Edk2Path object with workspace and packages paths
- package_config: Dictionary with the package configuration
- environment_config: Environment configuration
- plugin_manager: Plugin Manager Instance
- plugin_manager_helper: Plugin Manager Helper Instance
- tc: JUnit test case
- output_stream: The StringIO output stream from this plugin (logging)
Returns
>0 : Number of errors found
0 : Passed successfully
-1 : Skipped for missing prereq
"""
try:
# Initialize plugin and check pre-requisites.
self._initialize_environment_info(
package_rel_path, edk2_path, package_config, tc)
self._initialize_configuration()
self._check_for_preexisting_formatted_files()
# Log important context information.
self._log_uncrustify_app_info()
# Get template file contents if specified
self._get_template_file_contents()
# Create meta input files & directories
self._create_temp_working_directory()
self._create_uncrustify_file_list_file()
self._run_uncrustify()
# Post-execution actions.
self._process_uncrustify_results()
except UncrustifyException as e:
self._tc.LogStdError(
f"Uncrustify error {e.exit_code}. Details:\n\n{str(e)}")
logging.warning(
f"Uncrustify error {e.exit_code}. Details:\n\n{str(e)}")
return -1
else:
if self._formatted_file_error_count > 0:
if self._audit_only_mode:
logging.info(
"Setting test as skipped since AuditOnly is enabled")
self._tc.SetSkipped()
return -1
else:
self._tc.SetFailed(
f"{self._plugin_name} failed due to {self._formatted_file_error_count} incorrectly formatted files.", "CHECK_FAILED")
else:
self._tc.SetSuccess()
return self._formatted_file_error_count
finally:
self._cleanup_temporary_formatted_files()
self._cleanup_temporary_directory()
def _initialize_configuration(self) -> None:
"""
Initializes plugin configuration.
"""
self._initialize_app_info()
self._initialize_config_file_info()
self._initialize_file_to_format_info()
self._initialize_test_case_output_options()
def _check_for_preexisting_formatted_files(self) -> None:
"""
Checks if any formatted files from prior execution are present.
Existence of such files is an unexpected condition. This might result
from an error that occurred during a previous run or a premature exit from a debug scenario. In any case, the package should be clean before starting a new run.
"""
pre_existing_formatted_file_count = len(
[str(path.resolve()) for path in pathlib.Path(self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')])
if pre_existing_formatted_file_count > 0:
raise UncrustifyStalePluginFormattedFilesException(
f"{pre_existing_formatted_file_count} formatted files already exist. To prevent overwriting these files, please remove them before running this plugin.")
def _cleanup_temporary_directory(self) -> None:
"""
Cleans up the temporary directory used for this execution instance.
This removes the directory and all files created during this instance.
"""
if hasattr(self, '_working_dir'):
self._remove_tree(self._working_dir)
def _cleanup_temporary_formatted_files(self) -> None:
"""
Cleans up the temporary formmatted files produced by Uncrustify.
This will recursively remove all formatted files generated by Uncrustify
during this execution instance.
"""
if hasattr(self, '_abs_package_path'):
formatted_files = [str(path.resolve()) for path in pathlib.Path(
self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')]
for formatted_file in formatted_files:
os.remove(formatted_file)
def _create_temp_working_directory(self) -> None:
"""
Creates the temporary directory used for this execution instance.
"""
self._working_dir = os.path.join(
self._abs_workspace_path, "Build", ".pytool", "Plugin", f"{self._plugin_name}")
try:
pathlib.Path(self._working_dir).mkdir(parents=True, exist_ok=True)
except OSError as e:
raise UncrustifyInputFileCreationErrorException(
f"Error creating plugin directory {self._working_dir}.\n\n{repr(e)}.")
def _create_uncrustify_file_list_file(self) -> None:
"""
Creates the file with the list of source files for Uncrustify to process.
"""
self._app_input_file_path = os.path.join(
self._working_dir, "uncrustify_file_list.txt")
with open(self._app_input_file_path, 'w', encoding='utf8') as f:
f.writelines(f"\n".join(self._abs_file_paths_to_format))
def _execute_uncrustify(self) -> None:
"""
Executes Uncrustify with the initialized configuration.
"""
output = StringIO()
self._app_exit_code = RunCmd(
self._app_path,
f"-c {self._app_config_file} -F {self._app_input_file_path} --if-changed --suffix {UncrustifyCheck.FORMATTED_FILE_EXTENSION}", outstream=output)
self._app_output = output.getvalue().strip().splitlines()
def _get_git_ignored_paths(self) -> List[str]:
""""
Returns a list of file absolute path strings to all files ignored in this git repository.
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
outstream_buffer = StringIO()
exit_code = RunCmd("git", "ls-files --other",
workingdir=self._abs_workspace_path, outstream=outstream_buffer, logging_level=logging.NOTSET)
if (exit_code != 0):
raise UncrustifyGitIgnoreFileException(
f"An error occurred reading git ignore settings. This will prevent Uncrustify from running against the expected set of files.")
# Note: This will potentially be a large list, but at least sorted
return outstream_buffer.getvalue().strip().splitlines()
def _get_git_submodule_paths(self) -> List[str]:
"""
Returns a list of directory absolute path strings to the root of each submodule in the workspace repository.
If git is not found, an empty list will be returned.
"""
if not shutil.which("git"):
logging.warn(
"Git is not found on this system. Git submodule paths will not be considered.")
return []
if os.path.isfile(os.path.join(self._abs_workspace_path, ".gitmodules")):
logging.info(
f".gitmodules file found. Excluding submodules in {self._package_name}.")
outstream_buffer = StringIO()
exit_code = RunCmd("git", "config --file .gitmodules --get-regexp path", workingdir=self._abs_workspace_path, outstream=outstream_buffer, logging_level=logging.NOTSET)
if (exit_code != 0):
raise UncrustifyGitSubmoduleException(
f".gitmodule file detected but an error occurred reading the file. Cannot proceed with unknown submodule paths.")
submodule_paths = []
for line in outstream_buffer.getvalue().strip().splitlines():
submodule_paths.append(
os.path.normpath(os.path.join(self._abs_workspace_path, line.split()[1])))
return submodule_paths
else:
return []
def _get_template_file_contents(self) -> None:
"""
Gets the contents of Uncrustify template files if they are specified
in the Uncrustify configuration file.
"""
self._file_template_contents = None
self._func_template_contents = None
# Allow no value to allow "set" statements in the config file which do
# not specify value assignment
parser = configparser.ConfigParser(allow_no_value=True)
with open(self._app_config_file, 'r') as cf:
parser.read_string("[dummy_section]\n" + cf.read())
try:
file_template_name = parser["dummy_section"]["cmt_insert_file_header"]
file_template_path = pathlib.Path(file_template_name)
if not file_template_path.is_file():
file_template_path = pathlib.Path(os.path.join(self._plugin_path, file_template_name))
self._file_template_contents = file_template_path.read_text()
except KeyError:
logging.warn("A file header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified file header template file was not found.")
try:
func_template_name = parser["dummy_section"]["cmt_insert_func_header"]
func_template_path = pathlib.Path(func_template_name)
if not func_template_path.is_file():
func_template_path = pathlib.Path(os.path.join(self._plugin_path, func_template_name))
self._func_template_contents = func_template_path.read_text()
except KeyError:
logging.warn("A function header template is not specified in the config file.")
except FileNotFoundError:
logging.warn("The specified function header template file was not found.")
def _initialize_app_info(self) -> None:
"""
Initialize Uncrustify application information.
This function will determine the application path and version.
"""
# Verify Uncrustify is specified in the environment.
if UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY not in os.environ:
raise UncrustifyAppEnvVarNotFoundException(
f"Uncrustify environment variable {UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY} is not present.")
self._app_path = shutil.which('uncrustify', path=os.environ[UncrustifyCheck.UNCRUSTIFY_PATH_ENV_KEY])
if self._app_path is None:
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_path)
self._app_path = os.path.normcase(os.path.normpath(self._app_path))
if not os.path.isfile(self._app_path):
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_path)
# Verify Uncrustify is present at the expected path.
return_buffer = StringIO()
ret = RunCmd(self._app_path, "--version", outstream=return_buffer)
if (ret != 0):
raise UncrustifyAppVersionErrorException(
f"Error occurred executing --version: {ret}.")
# Log Uncrustify version information.
self._app_version = return_buffer.getvalue().strip()
self._tc.LogStdOut(f"Uncrustify version: {self._app_version}")
version_aggregator.GetVersionAggregator().ReportVersion(
"Uncrustify", self._app_version, version_aggregator.VersionTypes.INFO)
def _initialize_config_file_info(self) -> None:
"""
Initialize Uncrustify configuration file info.
The config file path is relative to the package root.
"""
self._app_config_file = UncrustifyCheck.DEFAULT_CONFIG_FILE_PATH
if "ConfigFilePath" in self._package_config:
self._app_config_file = self._package_config["ConfigFilePath"].strip()
self._app_config_file = os.path.normpath(
os.path.join(self._abs_package_path, self._app_config_file))
if not os.path.isfile(self._app_config_file):
raise FileNotFoundError(
errno.ENOENT, os.strerror(errno.ENOENT), self._app_config_file)
def _initialize_environment_info(self, package_rel_path: str, edk2_path: Edk2Path, package_config: Dict[str, List[str]], tc: JunitReportTestCase) -> None:
"""
Initializes plugin environment information.
"""
self._abs_package_path = edk2_path.GetAbsolutePathOnThisSytemFromEdk2RelativePath(
package_rel_path)
self._abs_workspace_path = edk2_path.WorkspacePath
self._package_config = package_config
self._package_name = os.path.basename(
os.path.normpath(package_rel_path))
self._plugin_name = self.__class__.__name__
self._plugin_path = os.path.dirname(os.path.realpath(__file__))
self._rel_package_path = package_rel_path
self._tc = tc
def _initialize_file_to_format_info(self) -> None:
"""
Forms the list of source files for Uncrustify to process.
"""
# Create a list of all the package relative file paths in the package to run against Uncrustify.
rel_file_paths_to_format = list(
UncrustifyCheck.STANDARD_PLUGIN_DEFINED_PATHS)
# Allow the ci.yaml to remove any of the pre-defined standard paths
if "IgnoreStandardPaths" in self._package_config:
for a in self._package_config["IgnoreStandardPaths"]:
if a.strip() in rel_file_paths_to_format:
self._tc.LogStdOut(
f"Ignoring standard path due to ci.yaml ignore: {a}")
rel_file_paths_to_format.remove(a.strip())
else:
raise UncrustifyInvalidIgnoreStandardPathsException(f"Invalid IgnoreStandardPaths value: {a}")
# Allow the ci.yaml to specify additional include paths for this package
if "AdditionalIncludePaths" in self._package_config:
rel_file_paths_to_format.extend(
self._package_config["AdditionalIncludePaths"])
self._abs_file_paths_to_format = []
for path in rel_file_paths_to_format:
self._abs_file_paths_to_format.extend(
[str(path.resolve()) for path in pathlib.Path(self._abs_package_path).rglob(path)])
if not "SkipGitExclusions" in self._package_config or not self._package_config["SkipGitExclusions"]:
# Remove files ignored by git
logging.info(
f"{self._package_name} file count before git ignore file exclusion: {len(self._abs_file_paths_to_format)}")
ignored_paths = self._get_git_ignored_paths()
self._abs_file_paths_to_format = list(
set(self._abs_file_paths_to_format).difference(ignored_paths))
logging.info(
f"{self._package_name} file count after git ignore file exclusion: {len(self._abs_file_paths_to_format)}")
# Remove files in submodules
logging.info(
f"{self._package_name} file count before submodule exclusion: {len(self._abs_file_paths_to_format)}")
submodule_paths = tuple(self._get_git_submodule_paths())
for path in submodule_paths:
logging.info(f" submodule path: {path}")
self._abs_file_paths_to_format = [
f for f in self._abs_file_paths_to_format if not f.startswith(submodule_paths)]
logging.info(
f"{self._package_name} file count after submodule exclusion: {len(self._abs_file_paths_to_format)}")
# Sort the files for more consistent results
self._abs_file_paths_to_format.sort()
def _initialize_test_case_output_options(self) -> None:
"""
Initializes options that influence test case output.
"""
self._audit_only_mode = False
self._output_file_diffs = False
if "AuditOnly" in self._package_config and self._package_config["AuditOnly"]:
self._audit_only_mode = True
if "OutputFileDiffs" in self._package_config and self._package_config["OutputFileDiffs"]:
self._output_file_diffs = True
def _log_uncrustify_app_info(self) -> None:
"""
Logs Uncrustify application information.
"""
self._tc.LogStdOut(f"Found Uncrustify at {self._app_path}")
self._tc.LogStdOut(f"Uncrustify version: {self._app_version}")
self._tc.LogStdOut('\n')
logging.info(f"Found Uncrustify at {self._app_path}")
logging.info(f"Uncrustify version: {self._app_version}")
logging.info('\n')
def _process_uncrustify_results(self) -> None:
"""
Process the results from Uncrustify.
Determines whether formatting errors are present and logs failures.
"""
formatted_files = [str(path.resolve()) for path in pathlib.Path(
self._abs_package_path).rglob(f'*{UncrustifyCheck.FORMATTED_FILE_EXTENSION}')]
self._formatted_file_error_count = len(formatted_files)
if self._formatted_file_error_count > 0:
self._tc.LogStdError("Files with formatting errors:\n")
if self._output_file_diffs:
logging.info("Calculating file diffs. This might take a while...")
for formatted_file in formatted_files:
pre_formatted_file = formatted_file[:-
len(UncrustifyCheck.FORMATTED_FILE_EXTENSION)]
logging.error(pre_formatted_file)
if (self._output_file_diffs or
self._file_template_contents is not None or
self._func_template_contents is not None):
self._tc.LogStdError(
f"Formatting errors in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
with open(formatted_file) as ff:
formatted_file_text = ff.read()
if (self._file_template_contents is not None and
self._file_template_contents in formatted_file_text):
self._tc.LogStdError(f"File header is missing in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
if (self._func_template_contents is not None and
self._func_template_contents in formatted_file_text):
self._tc.LogStdError(f"A function header is missing in {os.path.relpath(pre_formatted_file, self._abs_package_path)}\n")
if self._output_file_diffs:
with open(pre_formatted_file) as pf:
pre_formatted_file_text = pf.read()
for line in difflib.unified_diff(pre_formatted_file_text.split('\n'), formatted_file_text.split('\n'), fromfile=pre_formatted_file, tofile=formatted_file, n=3):
self._tc.LogStdError(line)
self._tc.LogStdError('\n')
else:
self._tc.LogStdError(pre_formatted_file)
def _remove_tree(self, dir_path: str, ignore_errors: bool = False) -> None:
"""
Helper for removing a directory. Over time there have been
many private implementations of this due to reliability issues in the
shutil implementations. To consolidate on a single function this helper is added.
On error try to change file attributes. Also add retry logic.
This function is temporarily borrowed from edk2toollib.utility_functions
since the version used in edk2 is not recent enough to include the
function.
This function should be replaced by "RemoveTree" when it is available.
Args:
- dir_path: Path to directory to remove.
- ignore_errors: Whether to ignore errors during removal
"""
def _remove_readonly(func, path, _):
"""
Private function to attempt to change permissions on file/folder being deleted.
"""
os.chmod(path, os.stat.S_IWRITE)
func(path)
for _ in range(3): # retry up to 3 times
try:
shutil.rmtree(dir_path, ignore_errors=ignore_errors, onerror=_remove_readonly)
except OSError as err:
logging.warning(f"Failed to fully remove {dir_path}: {err}")
else:
break
else:
raise RuntimeError(f"Failed to remove {dir_path}")
def _run_uncrustify(self) -> None:
"""
Runs Uncrustify for this instance of plugin execution.
"""
logging.info("Executing Uncrustify. This might take a while...")
start_time = timeit.default_timer()
self._execute_uncrustify()
end_time = timeit.default_timer() - start_time
execution_summary = f"Uncrustify executed against {len(self._abs_file_paths_to_format)} files in {self._package_name} in {end_time:.2f} seconds.\n"
self._tc.LogStdOut(execution_summary)
logging.info(execution_summary)
if self._app_exit_code != 0 and self._app_exit_code != 1:
raise UncrustifyAppExecutionException(
f"Error {str(self._app_exit_code)} returned from Uncrustify:\n\n{str(self._app_output)}")

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/** @file
Brief description of the file's purpose.
Detailed description of the file's contents and other useful
information for a person viewing the file for the first time.
<<Copyright>>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/

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/**
Brief description of this function's purpose.
Follow it immediately with the detailed description.
@param[in] Arg1 Description of Arg1.
@param[in] Arg2 Description of Arg2 This is complicated and requires
multiple lines to describe.
@param[out] Arg3 Description of Arg3.
@param[in, out] Arg4 Description of Arg4.
@retval VAL_ONE Description of what VAL_ONE signifies.
@retval OTHER This is the only other return value. If there were other
return values, they would be listed.
**/

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## @file
# Uncrustify Configuration File for EDK II C Code
#
# Coding Standard: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/
#
# This configuration file is meant to be a "best attempt" to align with the
# definitions in the EDK II C Coding Standards Specification.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
# Force UTF-8 encoding (no UTF-16)
enable_digraphs = false
utf8_byte = false
utf8_force = true
# Code width / line splitting
#code_width =120 # TODO: This causes non-deterministic behaviour in some cases when code wraps
ls_code_width =false
ls_for_split_full =true
ls_func_split_full =true
pos_comma =trail
# 5.1.7 All files must end with CRLF
newlines = crlf
# 5.1.2 Do not use tab characters
cmt_convert_tab_to_spaces = true # Whether to convert all tabs to spaces in comments. If false, tabs in
# comments are left alone, unless used for indenting.
indent_columns = 2 # Number of spaces for indentation
indent_with_tabs = 0 # Do not use TAB characters
string_replace_tab_chars = true # Replace TAB with SPACE
# Note: This will break .robot files but is needed for edk2 style
# 5.2.1.1 There shall be only one statement on a line (statement ends with ;)
nl_multi_line_cond = true # Add a newline between ')' and '{' if the ')' is on a different line than
# the if/for/etc.
nl_after_semicolon = true # Whether to add a newline after semicolons, except in 'for' statements.
# 5.2.1.3 An open brace '{' goes on the same line as the closing parenthesis ')' of simple predicate expressions
mod_full_brace_do = add # Add or remove braces on a single-line 'do' statement.
mod_full_brace_for = add
mod_full_brace_function = add # Add or remove braces on a single-line function definition.
mod_full_brace_if = add # Add or remove braces on a single-line 'if' statement. Braces will not be
# removed if the braced statement contains an 'else'.
mod_full_brace_if_chain = false
mod_full_brace_while = add
# 5.2.1.4 A close brace '}' always goes at the beginning of the last line of the body
eat_blanks_after_open_brace = true
eat_blanks_before_close_brace = true # Whether to remove blank lines before '}'.
# 5.2.2.2 Always put space before and after binary operators.
sp_assign = add # Add or remove space around assignment operator '=', '+=', etc.
sp_assign_default = add
sp_bool = add # Add or remove space around boolean operators '&&' and '||'.
sp_compare = add # Add or remove space around compare operator '<', '>', '==', etc.
# 5.2.2.3 Do not put space between unary operators and their object
sp_addr = remove # A or remove space after the '&' (address-of) unary operator.
sp_incdec = remove # Add or remove space between '++' and '--' the word to which it is being
# applied, as in '(--x)' or 'y++;'.
sp_inv = remove # Add or remove space after the '~' (invert) unary operator.
sp_not = remove # Add or remove space after the '!' (not) unary operator.
sp_sign = remove # Add or remove space after '+' or '-', as in 'x = -5' or 'y = +7'.
# 5.2.2.4 Subsequent lines of multi-line function calls should line up two spaces from the beginning of the function
# name
nl_func_call_args_multi_line = true # Whether to add a newline after each ',' in a function call if '(' and ')'
# are in different lines.
nl_func_call_args_multi_line_ignore_closures = false
# - Indent each argument 2 spaces from the start of the function name. If a
# function is called through a structure or union member, of type
# pointer-to-function, then indent each argument 2 spaces from the start of the
# member name.
indent_func_call_edk2_style = true # Use EDK2 indentation style for function calls (**CUSTOM SETTING**)
indent_paren_after_func_call = true # Whether to indent the open parenthesis of a function call, if the
# parenthesis is on its own line.
# - Align the close parenthesis with the start of the last argument
indent_paren_close = 0 # How to indent a close parenthesis after a newline.
# (0: Body, 1: Openparenthesis, 2: Brace level)
# 5.2.2.5 Always put space after commas or semicolons that separate items
sp_after_comma = force # Add or remove space after ',', i.e. 'a,b' vs. 'a, b'.
sp_before_comma = remove # Add or remove space before ','.
# 5.2.2.6 Always put space before an open parenthesis
sp_after_sparen = add # Add or remove space after ')' of control statements.
sp_attribute_paren = add # Add or remove space between '__attribute__' and '('.
sp_before_sparen = force # Add or remove space before '(' of control statements
# ('if', 'for', 'switch', 'while', etc.).
sp_defined_paren = force # Add or remove space between 'defined' and '(' in '#if defined (FOO)'.
sp_func_call_paren = force # Add or remove space between function name and '(' on function calls.
sp_func_call_paren_empty = force # Add or remove space between function name and '()' on function calls
# without parameters. If set to ignore (the default), sp_func_call_paren is
# used.
sp_func_def_paren = add # Add or remove space between alias name and '(' of a non-pointer function
# type typedef.
sp_func_proto_paren = add # Add or remove space between function name and '()' on function declaration
sp_sizeof_paren = force # Add or remove space between 'sizeof' and '('.
sp_type_func = add # Add or remove space between return type and function name. A minimum of 1
# is forced except for pointer return types.
# Not specified, but also good style to remove spaces inside parentheses (Optional)
sp_cparen_oparen = remove # Add or remove space between back-to-back parentheses, i.e. ')(' vs. ') ('.
sp_inside_fparen = remove # Add or remove space inside function '(' and ')'.
sp_inside_fparens = remove # Add or remove space inside empty function '()'.
sp_inside_paren = remove # Add or remove space inside '(' and ')'.
sp_inside_paren_cast = remove # Add or remove spaces inside cast parentheses. '(int)x'
sp_inside_square = remove # Add or remove space inside a non-empty '[' and ']'.
sp_paren_paren = remove # Add or remove space between nested parentheses, i.e. '((' vs. ') )'.
sp_square_fparen = remove # Add or remove space between ']' and '(' when part of a function call.
# 5.2.2.7 Put a space before an open brace if it is not on its own line
sp_do_brace_open = force # Add or remove space between 'do' and '{'.
sp_paren_brace = force # Add or remove space between ')' and '{'.
sp_sparen_brace = force # Add or remove space between ')' and '{' of of control statements.
# 5.2.2.8 Do not put spaces around structure member and pointer operators
sp_after_byref = remove # Add or remove space after reference sign '&', if followed by a word.
sp_before_byref = add # Add or remove space before a reference sign '&'.
sp_deref = remove # Add or remove space after the '*' (dereference) unary operator. This does
# not affect the spacing after a '*' that is part of a type.
sp_member = remove # Add or remove space around the '.' or '->' operators.
# 5.2.2.9 Do not put spaces before open brackets of array subscripts
sp_before_square = remove # Add or remove space before '[' (except '[]').
sp_before_squares = remove # Add or remove space before '[]'.
sp_before_vardef_square = remove # Add or remove space before '[' for a variable definition.
# 5.2.2.10 Use extra parentheses rather than depending on in-depth knowledge of the order of precedence of C
mod_full_paren_if_bool = true # Whether to fully parenthesize Boolean expressions in 'while' and 'if'
# statement, as in 'if (a && b > c)' => 'if (a && (b > c))'.
# 5.2.2.11 Align a continuation line with the part of the line that it continues.
use_indent_continue_only_once = true
# Additional '{}' bracing rules (Optional)
# NOTE - The style guide specifies two different styles for braces,
# so these are ignored for now to allow developers some flexibility.
nl_after_brace_close = true # Whether to add a newline after '}'. Does not apply if followed by a
# necessary ';'.
nl_brace_else = remove # Add or remove newline between '}' and 'else'.
nl_brace_while = remove # Add or remove newline between '}' and 'while' of 'do' statement.
nl_do_brace = remove # Add or remove newline between 'do' and '{'.
nl_else_brace = remove # Add or remove newline between 'else' and '{'.
nl_else_if = remove # Add or remove newline between 'else' and 'if'.
nl_elseif_brace = remove # Add or remove newline between 'else if' and '{'.
nl_enum_brace = remove # Add or remove newline between 'enum' and '{'.
nl_fcall_brace = remove # Add or remove newline between a function call's ')' and '{',
# as in 'list_for_each(item, &list) { }'.
nl_for_brace = remove # Add or remove newline between 'for' and '{'.
nl_if_brace = remove # Add or remove newline between 'if' and '{'.
nl_struct_brace = remove # Add or remove newline between 'struct and '{'.
nl_switch_brace = remove # Add or remove newline between 'switch' and '{'.
nl_union_brace = remove # Add or remove newline between 'union' and '{'.
nl_while_brace = remove # Add or remove newline between 'while' and '{'.
# Additional whitespace rules (Optional)
sp_after_ptr_star = remove # Add or remove space after pointer star '*', if followed by a word.
# Useful when paired with align_var_def_star_style==2
sp_after_ptr_star_func = remove # Add or remove space after a pointer star '*', if followed by a function
# prototype or function definition.
sp_after_semi = remove # Add or remove space after ';', except when followed by a comment.
sp_before_case_colon = remove # Add or remove space before case ':'.
sp_before_ptr_star = add # Add or remove space before pointer star '*'.
sp_before_ptr_star_func = add # Add or remove space before a pointer star '*', if followed by a function
# prototype or function definition.
sp_before_semi = remove # Add or remove space before ';'
sp_before_semi_for = remove # Add or remove space before ';' in non-empty 'for' statements.
sp_before_semi_for_empty = add # Add or remove space before a semicolon of an empty part of a for statement
sp_between_ptr_star = remove # Add or remove space between pointer stars '*'. (ie, 'VOID **')
sp_brace_close_while = force # Add or remove space between '}' and 'while'.
sp_after_cast = remove
sp_after_type = add
sp_balance_nested_parens = false
sp_before_nl_cont = add
sp_before_square_asm_block = ignore
sp_before_unnamed_byref = add
sp_brace_brace = ignore
sp_brace_else = force
sp_brace_typedef = add
sp_case_label = force
sp_cmt_cpp_doxygen = true
sp_cond_colon = add
sp_cond_question = add
sp_cpp_cast_paren = force
sp_else_brace = force
sp_endif_cmt = force
sp_enum_assign = add
sp_inside_braces = force
sp_inside_braces_empty = force
sp_inside_braces_enum = force
sp_inside_braces_struct = force
sp_pp_concat = add
sp_pp_stringify = add
sp_return_paren = add
sp_special_semi = force
sp_while_paren_open = force
# Additional Indentation Rules
indent_access_spec = 1
indent_access_spec_body = false
indent_align_assign = true
indent_align_string = true
indent_bool_paren = true
indent_brace_parent = false
indent_braces = false
indent_braces_no_class = false
indent_braces_no_func = true
indent_braces_no_struct = false
indent_class = false
indent_class_colon = false
indent_cmt_with_tabs = false # Whether to indent comments that are not at a brace level with tabs on
# a tabstop. Requires indent_with_tabs=2. If false, will use spaces.
indent_col1_comment = true
indent_col1_multi_string_literal= true
indent_comma_paren = true
indent_else_if = true
indent_extern = false
indent_first_bool_expr = true
indent_func_def_param_paren_pos_threshold = 0
indent_func_param_double = false
indent_func_proto_param = true
indent_ignore_asm_block = true
indent_label = 1
indent_member = 2
indent_namespace = false
indent_param = 2
indent_paren_nl = false
indent_paren_open_brace = false
indent_preserve_sql = false
indent_relative_single_line_comments = false
indent_sing_line_comments = 0
indent_single_newlines = false
indent_square_nl = false
indent_switch_case = 2
indent_template_param = true
indent_var_def_blk = 0
indent_var_def_cont = false
# Tidy-up rules (Optional)
mod_move_case_break = true # Whether to move a 'break' that appears after a fully braced 'case'
# before the close brace, as in 'case X: { ... } break;' =>
# 'case X: { ... break; }'.
mod_pawn_semicolon = false
mod_remove_empty_return = false # Whether to remove a void 'return;' that appears as the last statement
# in a function.
mod_remove_extra_semicolon = true
mod_sort_import = false
mod_sort_include = false
mod_sort_using = false
nl_after_case = false # Whether to add a newline after a 'case' statement.
nl_end_of_file = force # Add or remove newline at the end of the file.
nl_end_of_file_min = 1 # The minimum number of newlines at the end of the file
nl_max = 2 # The maximum number of consecutive newlines (3 = 2 blank lines).
nl_start_of_file = remove # Add or remove newlines at the start of the file.
# Code alignment rules (Optional)
align_asm_colon = false
align_assign_span = 1 # The span for aligning on '=' in assignments.
align_assign_thresh = 0
align_edk2_style = true # Whether to apply edk2-specific alignment formatting
align_enum_equ_span = 1 # The span for aligning on '=' in enums.
align_func_params = true # Whether to align variable definitions in prototypes and functions.
align_func_params_gap = 2
align_func_params_span = 2 # The span for aligning parameter definitions in function on parameter name.
align_func_params_thresh = 0
align_func_proto_span = 0
align_keep_tabs = false
align_left_shift = false
align_mix_var_proto = false
align_nl_cont = false
align_oc_decl_colon = false
align_on_operator = false
align_on_tabstop = false
align_pp_define_gap = 2
align_pp_define_span = 1
align_right_cmt_at_col = 0 # Align trailing comment at or beyond column N; 'pulls in' comments as
# a bonus side effect (0=ignore)
align_right_cmt_gap = 0 # If a trailing comment is more than this number of columns away from the
# text it follows,
# it will qualify for being aligned. This has to be > 0 to do anything.
align_right_cmt_mix = false # If aligning comments, mix with comments after '}' and #endif with less
# than 3 spaces before the comment
align_right_cmt_same_level = true # Whether to only align trailing comments that are at the same brace level.
align_right_cmt_span = 2 # The span for aligning comments that end lines.
align_same_func_call_params = false
align_single_line_brace = true
align_single_line_func = true
align_struct_init_span = 1 # The span for aligning struct initializer values.
align_typedef_amp_style = 1
align_typedef_func = 1 # How to align typedef'd functions with other typedefs.
# (0: No align, 1: Align open paranthesis, 2: Align function type name)
align_typedef_gap = 2
align_typedef_span = 1 # The span for aligning single-line typedefs.
align_typedef_star_style = 1
align_var_def_amp_style = 1
align_var_def_attribute = true
align_var_def_colon = true # Whether to align the colon in struct bit fields.
align_var_def_gap = 2 # The gap (minimum spacing for aligned items) for variable definitions.
align_var_def_inline = false
align_var_def_span = 1 # The span (lines needed to align) for aligning variable definitions.
align_var_def_star_style = 1 # How to consider (or treat) the '*' in the alignment of variable
# definitions.
# 0: Part of the type 'void * foo;' (default)
# 1: Part of the variable 'void *foo;'
# 2: Dangling 'void *foo;'
# (Note - should also set sp_after_ptr_star=remove)
align_var_struct_gap = 4
align_var_struct_span = 8 # The span for aligning struct/union member definitions.
align_var_struct_thresh = 0
align_with_tabs = false
# Comment formatting
cmt_align_doxygen_javadoc_tags = true # Whether to align doxygen javadoc-style tags ('@param', '@return', etc.)
# TODO: Eats '[' in '[in]'
cmt_c_group = false
cmt_c_nl_end = true # Whether to add a newline before the closing '*/' of the combined c-comment.
cmt_c_nl_start = true
cmt_cpp_group = false
cmt_cpp_nl_end = true
cmt_cpp_nl_start = true
cmt_cpp_to_c = false
cmt_indent_multi = false # Whether to apply changes to multi-line comments, including cmt_width,
# keyword substitution and leading chars.
cmt_insert_before_preproc = false
#cmt_insert_file_header = default_file_header.txt
#cmt_insert_func_header = default_function_header.txt
cmt_multi_check_last = false
cmt_multi_first_len_minimum = 2
cmt_reflow_mode = 1 # How to reflow comments.
# (0:No reflow, 1:No touching at all, 2: Full reflow)
cmt_sp_after_star_cont = 0 # The number of spaces to insert after the star on subsequent comment lines.
cmt_sp_before_star_cont = 0 # The number of spaces to insert at the start of subsequent comment lines.
cmt_star_cont = false # Whether to put a star on subsequent comment lines.
cmt_width = 120 # Try to wrap comments at N columns.
sp_cmt_cpp_start = add # Add or remove space after the opening of a C++ comment, as in
# '// <here> A'. NOTE: Breaks indentation within comments.
# Function definitions / declarations
indent_func_call_param = false # Whether to indent continued function call parameters one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_class_param = false # Whether to indent continued function call declaration one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_ctor_var_param = false # Whether to indent continued class variable constructors one indent level,
# rather than aligning parameters under the open parenthesis.
indent_func_def_param = true # Whether to indent continued function definition parameters one indent
# level, rather than aligning parameters under the open parenthesis.
nl_fdef_brace = add # Add or remove newline between function signature and '{'.
nl_func_call_end_multi_line = true # Whether to add a newline before ')' in a function call if '(' and ')' are
# in different lines.
nl_func_call_paren = remove # Add or remove newline between a function name and the opening '(' in the
# call.
nl_func_call_start_multi_line = true # Whether to add a newline after '(' in a function call if '(' and ')' are
# in different lines.
nl_func_decl_args = force # Add or remove newline after each ',' in a function declaration.
nl_func_decl_empty = add # Add or remove newline between '()' in a function declaration.
nl_func_def_args = force # Add or remove newline after each ',' in a function definition.
nl_func_def_empty = add # Add or remove newline between '()' in a function definition.
nl_func_def_paren = remove # Add or remove newline between a function name and the opening '('
# in the definition.
nl_func_paren = remove # Add or remove newline between a function name and the opening '(' in
# the declaration.
nl_func_type_name = add # Add or remove newline between return type and function name in a function
# definition.
sp_fparen_brace = force # Add or remove space between ')' and '{' of function.
use_indent_func_call_param = true # indent_func_call_param will be used
# Additional Newline Rules
nl_after_brace_open = true # Whether to add a newline after '{'. This also adds a newline
# before the matching '}'.
nl_after_brace_open_cmt = true # Whether to add a newline between the open brace and a
# trailing single-line comment.
# Requires nl_after_brace_open = true.
nl_after_do = add # Add or remove blank line after 'do/while' statement.
nl_after_for = add # Add or remove blank line after 'for' statement.
nl_after_func_body = 2 # The number of newlines after '}' of a multi-line function body
nl_after_func_body_one_liner = 2
nl_after_func_proto = 2
nl_after_func_proto_group = 2
nl_after_if = add
nl_after_multiline_comment = false
nl_after_return = false
nl_after_struct = 2
nl_after_switch = add
nl_after_vbrace_close = true
nl_after_vbrace_open = true
nl_after_vbrace_open_empty = true
nl_after_while = add
nl_assign_leave_one_liners = true
nl_before_block_comment = 2
nl_before_case = false
nl_before_do = ignore
nl_before_for = ignore
nl_before_if = ignore
nl_before_switch = ignore
nl_before_while = ignore
nl_before_whole_file_ifdef = 2
nl_brace_brace = force
nl_brace_struct_var = remove
nl_case_colon_brace = add
nl_class_leave_one_liners = false
nl_collapse_empty_body = false
nl_comment_func_def = 1
nl_create_for_one_liner = false
nl_create_if_one_liner = false
nl_create_while_one_liner = false
nl_define_macro = false
nl_ds_struct_enum_close_brace = true
nl_ds_struct_enum_cmt = false
nl_enum_leave_one_liners = false
nl_func_decl_end = add
nl_func_decl_start = add
nl_func_def_end = add
nl_func_def_start = add
nl_func_leave_one_liners = false
nl_func_proto_type_name = add
nl_func_var_def_blk = 1
nl_getset_leave_one_liners = false
nl_if_leave_one_liners = false
nl_multi_line_define = false
nl_squeeze_ifdef = false
nl_var_def_blk_end = 0
nl_var_def_blk_start = 0
# Preprocessor Rules
pp_define_at_level = true
pp_if_indent_code = false
pp_indent_func_def = false
pp_indent_extern = false
pp_ignore_define_body = true # Workaround: Turn off processing for #define body
# (current rules do not work for some defines)
pp_indent = add
pp_indent_at_level = true
pp_indent_count = 2
pp_indent_if = 2
pp_indent_region = 2
pp_region_indent_code = false
pp_space = remove
#
# The tokens below are assigned specific types so they are always recognized properly.
#
# Explicitly define EDK II qualifiers
set QUALIFIER CONST
set QUALIFIER EFIAPI
set QUALIFIER IN
set QUALIFIER OPTIONAL
set QUALIFIER OUT
# Explicitly define EDK II types
set TYPE EFI_STATUS
set TYPE VOID

View File

@ -0,0 +1,16 @@
## @file
# Downloads the Uncrustify application from a Project Mu NuGet package.
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"id": "uncrustify-ci-1",
"scope": "cibuild",
"type": "nuget",
"name": "mu-uncrustify-release",
"source": "https://pkgs.dev.azure.com/projectmu/Uncrustify/_packaging/mu_uncrustify/nuget/v3/index.json",
"version": "73.0.3",
"flags": ["set_shell_var", "host_specific"],
"var_name": "UNCRUSTIFY_CI_PATH"
}

View File

@ -0,0 +1,11 @@
## @file
# CiBuildPlugin used to check coding standard compliance of EDK II style C source code
#
# Copyright (c) Microsoft Corporation.
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
{
"scope": "cibuild",
"name": "Uncrustify Coding Standard Test",
"module": "UncrustifyCheck"
}

View File

@ -264,6 +264,10 @@ BSD-2-Clause-Patent.
Run the Ecc tool on the package. The Ecc tool is available in the BaseTools
package. It checks that the code complies to the EDKII coding standard.
### Coding Standard Compliance - UncrustifyCheck
Runs the Uncrustify application to check for coding standard compliance issues.
## PyTool Scopes
Scopes are how the PyTool ext_dep, path_env, and plugins are activated. Meaning

View File

@ -19,7 +19,10 @@
],
## Both file path and directory path are accepted.
"IgnoreFiles": [
"Library/ArmSoftFloatLib/berkeley-softfloat-3"
"Library/ArmSoftFloatLib/berkeley-softfloat-3",
"Library/ArmSoftFloatLib/ArmSoftFloatLib.c",
"Library/CompilerIntrinsicsLib",
"Universal/Smbios/SmbiosMiscDxe"
]
},

View File

@ -24,9 +24,11 @@ ArmCrashDumpDxeInitialize (
EFI_STATUS Status;
Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
return mCpu->RegisterInterruptHandler (mCpu,
return mCpu->RegisterInterruptHandler (
mCpu,
EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS,
&DefaultExceptionHandler);
&DefaultExceptionHandler
);
}

View File

@ -33,7 +33,6 @@ UINTN mGicNumInterrupts = 0;
HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
/**
Calculate GICD_ICFGRn base address and corresponding bit
field Int_config[1] of the GIC distributor register.
@ -56,7 +55,7 @@ GicGetDistributorIcfgBaseAndBit (
UINTN Field;
if (Source >= mGicNumInterrupts) {
ASSERT(Source < mGicNumInterrupts);
ASSERT (Source < mGicNumInterrupts);
return EFI_UNSUPPORTED;
}
@ -71,8 +70,6 @@ GicGetDistributorIcfgBaseAndBit (
return EFI_SUCCESS;
}
/**
Register Handler for the specified interrupt source.
@ -93,7 +90,7 @@ RegisterInterruptSource (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -108,7 +105,7 @@ RegisterInterruptSource (
gRegisteredInterruptHandlers[Source] = Handler;
// If the interrupt handler is unregistered then disable the interrupt
if (NULL == Handler){
if (NULL == Handler) {
return This->DisableInterruptSource (This, Source);
} else {
return This->EnableInterruptSource (This, Source);
@ -137,17 +134,28 @@ CpuArchEventProtocolNotify (
// Unregister the default exception handler.
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
return;
}
// Register to receive interrupts
Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
Context);
Status = Cpu->RegisterInterruptHandler (
Cpu,
ARM_ARCH_EXCEPTION_IRQ,
Context
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__, Status));
DEBUG ((
DEBUG_ERROR,
"%a: Cpu->RegisterInterruptHandler() - %r\n",
__FUNCTION__,
Status
));
}
gBS->CloseEvent (Event);
@ -163,7 +171,7 @@ InstallAndRegisterInterruptService (
{
EFI_STATUS Status;
CONST UINTN RihArraySize =
(sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
(sizeof (HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
// Initialize the array for the Interrupt Handlers
gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
@ -191,7 +199,8 @@ InstallAndRegisterInterruptService (
TPL_CALLBACK,
CpuArchEventProtocolNotify,
InterruptHandler,
&mCpuArchProtocolNotifyEventRegistration);
&mCpuArchProtocolNotifyEventRegistration
);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (

View File

@ -55,7 +55,6 @@ GicV3DxeInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
);
// Shared code
/**

View File

@ -24,13 +24,13 @@
+ ARM_GICR_SGI_VLPI_FRAME_SIZE \
+ ARM_GICR_SGI_RESERVED_FRAME_SIZE)
#define ISENABLER_ADDRESS(base,offset) ((base) + \
#define ISENABLER_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + 4 * (offset))
#define ICENABLER_ADDRESS(base,offset) ((base) + \
#define ICENABLER_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
#define IPRIORITY_ADDRESS(base,offset) ((base) + \
#define IPRIORITY_ADDRESS(base, offset) ((base) +\
ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset))
/**
@ -230,7 +230,8 @@ ArmGicSetInterruptPriority (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
MmioAndThenOr32 (
GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
@ -273,7 +274,8 @@ ArmGicEnableInterrupt (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
// Write set-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset),
@ -291,7 +293,7 @@ ArmGicEnableInterrupt (
// Write set-enable register
MmioWrite32 (
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
1 << RegShift
);
}
@ -317,7 +319,8 @@ ArmGicDisableInterrupt (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
// Write clear-enable register
MmioWrite32 (
GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset),
@ -334,7 +337,7 @@ ArmGicDisableInterrupt (
// Write clear-enable register
MmioWrite32 (
ICENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset),
ICENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset),
1 << RegShift
);
}
@ -361,7 +364,8 @@ ArmGicIsInterruptEnabled (
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||
SourceIsSpi (Source)) {
SourceIsSpi (Source))
{
Interrupts = ((MmioRead32 (
GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)
)
@ -377,7 +381,7 @@ ArmGicIsInterruptEnabled (
// Read set-enable register
Interrupts = MmioRead32 (
ISENABLER_ADDRESS(GicCpuRedistributorBase, RegOffset)
ISENABLER_ADDRESS (GicCpuRedistributorBase, RegOffset)
);
}

View File

@ -47,7 +47,7 @@ GicV2EnableInterruptSource (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -75,7 +75,7 @@ GicV2DisableInterruptSource (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -105,7 +105,7 @@ GicV2GetInterruptSourceState (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -134,7 +134,7 @@ GicV2EndOfInterrupt (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -261,9 +261,13 @@ GicV2SetTriggerType (
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -279,7 +283,7 @@ GicV2SetTriggerType (
}
Status = GicV2GetInterruptSourceState (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source,
&SourceEnabled
);
@ -296,7 +300,7 @@ GicV2SetTriggerType (
// otherwise GIC behavior is UNPREDICTABLE.
if (SourceEnabled) {
GicV2DisableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source
);
}
@ -310,7 +314,7 @@ GicV2SetTriggerType (
// Restore interrupt state
if (SourceEnabled) {
GicV2EnableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source
);
}

View File

@ -10,7 +10,6 @@
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (

View File

@ -37,7 +37,7 @@ GicV3EnableInterruptSource (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -65,7 +65,7 @@ GicV3DisableInterruptSource (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -95,7 +95,7 @@ GicV3GetInterruptSourceState (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -128,7 +128,7 @@ GicV3EndOfInterrupt (
)
{
if (Source >= mGicNumInterrupts) {
ASSERT(FALSE);
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -255,9 +255,13 @@ GicV3SetTriggerType (
BOOLEAN SourceEnabled;
if ( (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING)
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH)) {
DEBUG ((DEBUG_ERROR, "Invalid interrupt trigger type: %d\n", \
TriggerType));
&& (TriggerType != EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH))
{
DEBUG ((
DEBUG_ERROR,
"Invalid interrupt trigger type: %d\n", \
TriggerType
));
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -273,7 +277,7 @@ GicV3SetTriggerType (
}
Status = GicV3GetInterruptSourceState (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source,
&SourceEnabled
);
@ -290,7 +294,7 @@ GicV3SetTriggerType (
// otherwise GIC behavior is UNPREDICTABLE.
if (SourceEnabled) {
GicV3DisableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source
);
}
@ -303,7 +307,7 @@ GicV3SetTriggerType (
// Restore interrupt state
if (SourceEnabled) {
GicV3EnableInterruptSource (
(EFI_HARDWARE_INTERRUPT_PROTOCOL*)This,
(EFI_HARDWARE_INTERRUPT_PROTOCOL *)This,
Source
);
}
@ -430,8 +434,8 @@ GicV3DxeInitialize (
if ((MmioRead32 (
mGicDistributorBase + ARM_GIC_ICDDCR
) & ARM_GIC_ICDDCR_DS) != 0) {
) & ARM_GIC_ICDDCR_DS) != 0)
{
// If the Disable Security (DS) control bit is set, we are dealing with a
// GIC that has only one security state. In this case, let's assume we are
// executing in non-secure state (which is appropriate for DXE modules)

View File

@ -117,14 +117,14 @@ CpuIoCheckParameter (
// For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) {
Count = 1;
}
//
// Check to see if Width is in the valid range for I/O Port operations
//
Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
Width = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
return EFI_INVALID_PARAMETER;
}
@ -161,6 +161,7 @@ CpuIoCheckParameter (
if (MaxCount < (Count - 1)) {
return EFI_UNSUPPORTED;
}
if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
return EFI_UNSUPPORTED;
}
@ -242,7 +243,7 @@ CpuMemoryServiceRead (
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = MmioRead8 ((UINTN)Address);
@ -254,6 +255,7 @@ CpuMemoryServiceRead (
*((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
}
}
return EFI_SUCCESS;
}
@ -323,7 +325,7 @@ CpuMemoryServiceWrite (
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
MmioWrite8 ((UINTN)Address, *Uint8Buffer);
@ -335,6 +337,7 @@ CpuMemoryServiceWrite (
MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
}
}
return EFI_SUCCESS;
}
@ -406,7 +409,7 @@ CpuIoServiceRead (
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
@ -492,7 +495,7 @@ CpuIoServiceWrite (
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
@ -521,7 +524,6 @@ STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
}
};
/**
The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
@ -544,7 +546,8 @@ ArmPciCpuIo2Initialize (
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
&gEfiCpuIo2ProtocolGuid, &mCpuIo2,
&gEfiCpuIo2ProtocolGuid,
&mCpuIo2,
NULL
);
ASSERT_EFI_ERROR (Status);

View File

@ -34,7 +34,7 @@ typedef struct {
**/
EFI_STATUS
ScmiBaseProtocolInit (
IN OUT EFI_HANDLE* Handle
IN OUT EFI_HANDLE *Handle
);
#endif /* ARM_SCMI_BASE_PROTOCOL_PRIVATE_H_ */

View File

@ -53,7 +53,6 @@ typedef struct {
CLOCK_RATE_DWORD Rate;
} CLOCK_RATE_SET_ATTRIBUTES;
// Message parameters for CLOCK_CONFIG_SET command.
typedef struct {
UINT32 ClockId;

View File

@ -43,7 +43,7 @@ typedef struct {
**/
EFI_STATUS
ScmiPerformanceProtocolInit (
IN EFI_HANDLE* Handle
IN EFI_HANDLE *Handle
);
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_PRIVATE_H_ */

View File

@ -29,7 +29,7 @@
**/
EFI_STATUS
ScmiCommandGetPayload (
OUT UINT32** Payload
OUT UINT32 **Payload
)
{
EFI_STATUS Status;
@ -121,10 +121,12 @@ ScmiCommandExecute (
return EFI_DEVICE_ERROR;
}
Response = (SCMI_MESSAGE_RESPONSE*)MtlGetChannelPayload (Channel);
Response = (SCMI_MESSAGE_RESPONSE *)MtlGetChannelPayload (Channel);
if (Response->Status != ScmiSuccess) {
DEBUG ((DEBUG_ERROR, "SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
DEBUG ((
DEBUG_ERROR,
"SCMI error: ProtocolId = 0x%x, MessageId = 0x%x, error = %d\n",
Command->ProtocolId,
Command->MessageId,
Response->Status
@ -196,7 +198,7 @@ ScmiGetProtocolVersion (
Status = ScmiProtocolDiscoveryCommon (
ProtocolId,
ScmiMessageIdProtocolVersion,
(UINT32**)&ProtocolVersion
(UINT32 **)&ProtocolVersion
);
if (EFI_ERROR (Status)) {
return Status;

View File

@ -106,9 +106,9 @@ BaseDiscoverVendorDetails (
}
AsciiStrCpyS (
(CHAR8*)VendorIdentifier,
(CHAR8 *)VendorIdentifier,
SCMI_MAX_STR_LEN,
(CONST CHAR8*)ReturnValues
(CONST CHAR8 *)ReturnValues
);
return EFI_SUCCESS;
@ -256,7 +256,6 @@ BaseDiscoverListProtocols (
Skip = 0;
while (Skip < TotalProtocols) {
*MessageParams = Skip;
// Note PayloadLength is a IN/OUT parameter.
@ -265,7 +264,7 @@ BaseDiscoverListProtocols (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&DiscoverList
(UINT32 **)&DiscoverList
);
if (EFI_ERROR (Status)) {
return Status;
@ -300,7 +299,7 @@ STATIC CONST SCMI_BASE_PROTOCOL BaseProtocol = {
**/
EFI_STATUS
ScmiBaseProtocolInit (
IN OUT EFI_HANDLE* Handle
IN OUT EFI_HANDLE *Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@ -130,18 +130,19 @@ ClockGetClockAttributes (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&ClockAttributes
(UINT32 **)&ClockAttributes
);
if (EFI_ERROR (Status)) {
return Status;
}
// TRUE if bit 0 of ClockAttributes->Attributes is set.
*Enabled = CLOCK_ENABLED (ClockAttributes->Attributes);
AsciiStrCpyS (
ClockAsciiName,
SCMI_MAX_STR_LEN,
(CONST CHAR8*)ClockAttributes->ClockName
(CONST CHAR8 *)ClockAttributes->ClockName
);
return EFI_SUCCESS;
@ -209,7 +210,6 @@ ClockDescribeRates (
*MessageParams++ = ClockId;
do {
*MessageParams = RateIndex;
// Set Payload length, note PayloadLength is a IN/OUT parameter.
@ -219,7 +219,7 @@ ClockDescribeRates (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&DescribeRates
(UINT32 **)&DescribeRates
);
if (EFI_ERROR (Status)) {
return Status;
@ -329,7 +329,7 @@ ClockRateGet (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&ClockRate
(UINT32 **)&ClockRate
);
if (EFI_ERROR (Status)) {
return Status;
@ -363,7 +363,7 @@ ClockRateSet (
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload ((UINT32**)&ClockRateSetAttributes);
Status = ScmiCommandGetPayload ((UINT32 **)&ClockRateSetAttributes);
if (EFI_ERROR (Status)) {
return Status;
}
@ -412,7 +412,7 @@ ClockEnable (
SCMI_COMMAND Cmd;
UINT32 PayloadLength;
Status = ScmiCommandGetPayload ((UINT32**)&ClockConfigSetAttributes);
Status = ScmiCommandGetPayload ((UINT32 **)&ClockConfigSetAttributes);
if (EFI_ERROR (Status)) {
return Status;
}
@ -444,7 +444,7 @@ STATIC CONST SCMI_CLOCK_PROTOCOL ScmiClockProtocol = {
ClockDescribeRates,
ClockRateGet,
ClockRateSet
};
};
// Instance of the SCMI clock management protocol.
STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
@ -456,7 +456,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
(SCMI_CLOCK2_RATE_SET)ClockRateSet,
SCMI_CLOCK2_PROTOCOL_VERSION,
ClockEnable
};
};
/** Initialize clock management protocol and install protocol on a given handle.
@ -466,7 +466,7 @@ STATIC CONST SCMI_CLOCK2_PROTOCOL ScmiClock2Protocol = {
**/
EFI_STATUS
ScmiClockProtocolInit (
IN EFI_HANDLE* Handle
IN EFI_HANDLE *Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@ -72,7 +72,7 @@ ArmScmiDxeEntryPoint (
Status = gBS->LocateProtocol (
&gArmScmiBaseProtocolGuid,
NULL,
(VOID**)&BaseProtocol
(VOID **)&BaseProtocol
);
if (EFI_ERROR (Status)) {
ASSERT (FALSE);
@ -88,7 +88,8 @@ ArmScmiDxeEntryPoint (
// Accept any version between SCMI v1.0 and SCMI v2.0
if ((Version < BASE_PROTOCOL_VERSION_V1) ||
(Version > BASE_PROTOCOL_VERSION_V2)) {
(Version > BASE_PROTOCOL_VERSION_V2))
{
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
@ -109,7 +110,7 @@ ArmScmiDxeEntryPoint (
Status = gBS->AllocatePool (
EfiBootServicesData,
SupportedListSize,
(VOID**)&SupportedList
(VOID **)&SupportedList
);
if (EFI_ERROR (Status)) {
ASSERT (FALSE);
@ -130,7 +131,8 @@ ArmScmiDxeEntryPoint (
// Install supported protocol on ImageHandle.
for (ProtocolIndex = 1; ProtocolIndex < ARRAY_SIZE (Protocols);
ProtocolIndex++) {
ProtocolIndex++)
{
for (Index = 0; Index < NumProtocols; Index++) {
if (Protocols[ProtocolIndex].Id == SupportedList[Index]) {
Status = Protocols[ProtocolIndex].InitFn (&ImageHandle);
@ -138,6 +140,7 @@ ArmScmiDxeEntryPoint (
ASSERT_EFI_ERROR (Status);
return Status;
}
break;
}
}

View File

@ -8,6 +8,7 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_DXE_H_
#define SCMI_DXE_H_

View File

@ -56,7 +56,7 @@ PerformanceGetAttributes (
)
{
EFI_STATUS Status;
UINT32* ReturnValues;
UINT32 *ReturnValues;
Status = ScmiGetProtocolAttributes (
ScmiProtocolIdPerformance,
@ -160,7 +160,7 @@ PerformanceDescribeLevels (
EFI_STATUS Status;
UINT32 PayloadLength;
SCMI_COMMAND Cmd;
UINT32* MessageParams;
UINT32 *MessageParams;
UINT32 LevelIndex;
UINT32 RequiredSize;
UINT32 LevelNo;
@ -183,7 +183,6 @@ PerformanceDescribeLevels (
Cmd.MessageId = ScmiMessageIdPerformanceDescribeLevels;
do {
*MessageParams = LevelIndex;
// Note, PayloadLength is an IN/OUT parameter.
@ -192,7 +191,7 @@ PerformanceDescribeLevels (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&Levels
(UINT32 **)&Levels
);
if (EFI_ERROR (Status)) {
return Status;
@ -219,7 +218,6 @@ PerformanceDescribeLevels (
sizeof (SCMI_PERFORMANCE_LEVEL)
);
}
} while (ReturnRemainNumLevels != 0);
*LevelArraySize = RequiredSize;
@ -312,7 +310,7 @@ PerformanceLimitsGet (
Status = ScmiCommandExecute (
&Cmd,
&PayloadLength,
(UINT32**)&ReturnValues
(UINT32 **)&ReturnValues
);
if (EFI_ERROR (Status)) {
return Status;
@ -439,7 +437,7 @@ STATIC CONST SCMI_PERFORMANCE_PROTOCOL PerformanceProtocol = {
**/
EFI_STATUS
ScmiPerformanceProtocolInit (
IN EFI_HANDLE* Handle
IN EFI_HANDLE *Handle
)
{
return gBS->InstallMultipleProtocolInterfaces (

View File

@ -8,6 +8,7 @@
http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
DEN0056A_System_Control_and_Management_Interface.pdf
**/
#ifndef SCMI_PRIVATE_H_
#define SCMI_PRIVATE_H_
@ -89,7 +90,7 @@ typedef struct {
**/
EFI_STATUS
ScmiCommandGetPayload (
OUT UINT32** Payload
OUT UINT32 **Payload
);
/** Execute a SCMI command and receive a response.

View File

@ -52,9 +52,11 @@ PageAttributeToGcdAttribute (
GcdAttributes = EFI_MEMORY_WB;
break;
default:
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"PageAttributeToGcdAttribute: PageAttributes:0x%lX not supported.\n",
PageAttributes));
PageAttributes
));
ASSERT (0);
// The Global Coherency Domain (GCD) value is defined as a bit set.
// Returning 0 means no attribute has been set.
@ -63,7 +65,8 @@ PageAttributeToGcdAttribute (
// Determine protection attributes
if (((PageAttributes & TT_AP_MASK) == TT_AP_NO_RO) ||
((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO)) {
((PageAttributes & TT_AP_MASK) == TT_AP_RO_RO))
{
// Read only cases map to write-protect
GcdAttributes |= EFI_MEMORY_RO;
}
@ -88,11 +91,11 @@ GetFirstPageAttribute (
// Get the first entry of the table
FirstEntry = *FirstLevelTableAddress;
if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
if ((TableLevel != 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY)) {
// Only valid for Levels 0, 1 and 2
// Get the attribute of the subsequent table
return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
return GetFirstPageAttribute ((UINT64 *)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);
} else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
@ -138,18 +141,22 @@ GetNextEntryAttribute (
// If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3)))
{
if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
}
// Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
*PrevEntryAttribute = EntryAttribute;
} else {
continue;
@ -159,20 +166,27 @@ GetNextEntryAttribute (
ASSERT (TableLevel < 3);
// Increase the level number and scan the sub-level table
GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT, TableLevel + 1,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
PrevEntryAttribute, StartGcdRegion);
GetNextEntryAttribute (
(UINT64 *)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),
TT_ENTRY_COUNT,
TableLevel + 1,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))),
PrevEntryAttribute,
StartGcdRegion
);
} else {
if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
*StartGcdRegion,
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute));
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel))) - *StartGcdRegion,
PageAttributeToGcdAttribute (*PrevEntryAttribute)
);
// Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL (TableLevel));
*PrevEntryAttribute = INVALID_ENTRY;
}
}
@ -180,7 +194,7 @@ GetNextEntryAttribute (
FreePool (MemorySpaceMap);
return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));
return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL (TableLevel));
}
EFI_STATUS
@ -217,7 +231,7 @@ SyncCacheConfig (
// with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
// Obtain page table base
FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());
FirstLevelTableAddress = (UINT64 *)(ArmGetTTBR0BaseAddress ());
// Get Translation Control Register value
Tcr = ArmGetTCR ();
@ -232,17 +246,24 @@ SyncCacheConfig (
// We scan from the start of the memory map (ie: at the address 0x0)
BaseAddressGcdRegion = 0x0;
EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,
TableCount, TableLevel,
EndAddressGcdRegion = GetNextEntryAttribute (
FirstLevelTableAddress,
TableCount,
TableLevel,
BaseAddressGcdRegion,
&PageAttribute, &BaseAddressGcdRegion);
&PageAttribute,
&BaseAddressGcdRegion
);
// Update GCD with the last region if valid
if (PageAttribute != INVALID_ENTRY) {
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
SetGcdMemorySpaceAttributes (
MemorySpaceMap,
NumberOfDescriptors,
BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion,
PageAttributeToGcdAttribute (PageAttribute));
PageAttributeToGcdAttribute (PageAttribute)
);
}
FreePool (MemorySpaceMap);
@ -264,6 +285,7 @@ EfiAttributeToArmAttribute (
} else {
ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
break;
case EFI_MEMORY_WC:
ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE;
@ -283,7 +305,7 @@ EfiAttributeToArmAttribute (
// Determine protection attributes
if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
ArmAttributes |= TT_AP_RO_RO;
ArmAttributes |= TT_AP_NO_RO;
}
// Process eXecute Never attribute
@ -319,22 +341,25 @@ GetMemoryRegionRec (
}
// Find the block entry linked to the Base Address
BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
BlockEntry = (UINT64 *)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
EntryType = *BlockEntry & TT_TYPE_MASK;
if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
NextTranslationTable = (UINT64 *)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
// The entry is a page table, so we go to the next level
Status = GetMemoryRegionRec (
NextTranslationTable, // Address of the next level page table
TableLevel + 1, // Next Page Table level
(UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT),
BaseAddress, RegionLength, RegionAttributes);
(UINTN *)TT_LAST_BLOCK_ADDRESS (NextTranslationTable, TT_ENTRY_COUNT),
BaseAddress,
RegionLength,
RegionAttributes
);
// In case of 'Success', it means the end of the block region has been found into the upper
// level translation table
if (!EFI_ERROR(Status)) {
if (!EFI_ERROR (Status)) {
return EFI_SUCCESS;
}
@ -343,7 +368,7 @@ GetMemoryRegionRec (
} else if (EntryType == BlockEntryType) {
// We have found the BlockEntry attached to the address. We save its start address (the start
// address might be before the 'BaseAddress') and attributes
*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1);
*BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL (TableLevel) - 1);
*RegionLength = 0;
*RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK;
} else {
@ -353,11 +378,12 @@ GetMemoryRegionRec (
while (BlockEntry <= LastBlockEntry) {
if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) {
*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel);
*RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL (TableLevel);
} else {
// In case we have found the end of the region we return success
return EFI_SUCCESS;
}
BlockEntry++;
}
@ -388,9 +414,14 @@ GetMemoryRegion (
// Get the Table info from T0SZ
GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount);
Status = GetMemoryRegionRec (TranslationTable, TableLevel,
(UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount),
BaseAddress, RegionLength, RegionAttributes);
Status = GetMemoryRegionRec (
TranslationTable,
TableLevel,
(UINTN *)TT_LAST_BLOCK_ADDRESS (TranslationTable, EntryCount),
BaseAddress,
RegionLength,
RegionAttributes
);
// If the region continues up to the end of the root table then GetMemoryRegionRec()
// will return EFI_NOT_FOUND

View File

@ -22,7 +22,7 @@ SectionToGcdAttributes (
*GcdAttributes = 0;
// determine cacheability attributes
switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
*GcdAttributes |= EFI_MEMORY_UC;
break;
@ -49,9 +49,9 @@ SectionToGcdAttributes (
}
// determine protection attributes
switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
//*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
break;
case TT_DESCRIPTOR_SECTION_AP_RW_NO:
@ -86,7 +86,7 @@ PageToGcdAttributes (
*GcdAttributes = 0;
// determine cacheability attributes
switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
*GcdAttributes |= EFI_MEMORY_UC;
break;
@ -113,9 +113,9 @@ PageToGcdAttributes (
}
// determine protection attributes
switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
//*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
break;
case TT_DESCRIPTOR_PAGE_AP_RW_NO:
@ -161,17 +161,17 @@ SyncCacheConfigPage (
UINT64 GcdAttributes;
// Get the Base Address from FirstLevelDescriptor;
BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
// Convert SectionAttributes into PageAttributes
NextPageAttributes =
TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) |
TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes);
TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |
TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);
// obtain page table base
SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
// extract attributes (cacheability and permissions)
PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
@ -206,13 +206,14 @@ SyncCacheConfigPage (
*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
NextPageAttributes = 0;
}
*NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
}
// Convert back PageAttributes into SectionAttributes
*NextSectionAttributes =
TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) |
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes);
TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);
return EFI_SUCCESS;
}
@ -233,7 +234,6 @@ SyncCacheConfig (
UINTN NumberOfDescriptors;
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
// This code assumes MMU is enabled and filed with section translations
@ -246,7 +246,6 @@ SyncCacheConfig (
Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
ASSERT_EFI_ERROR (Status);
// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
@ -261,7 +260,7 @@ SyncCacheConfig (
// iterate through each 1MB descriptor
NextRegionBase = NextRegionLength = 0;
for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
// extract attributes (cacheability and permissions)
SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
@ -269,7 +268,7 @@ SyncCacheConfig (
if (NextSectionAttributes == 0) {
// start on a new region
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = SectionAttributes;
} else if (SectionAttributes != NextSectionAttributes) {
// Convert Section Attributes into GCD Attributes
@ -281,20 +280,26 @@ SyncCacheConfig (
// start on a new region
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = SectionAttributes;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) {
} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {
// In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
// bits that are actually part of the pagetable address. We clear it out to zero so that
// the SyncCacheConfigPage will use the page attributes instead of trying to convert the
// section attributes into page attributes
NextSectionAttributes = 0;
Status = SyncCacheConfigPage (
i,FirstLevelTable[i],
NumberOfDescriptors, MemorySpaceMap,
&NextRegionBase,&NextRegionLength,&NextSectionAttributes);
i,
FirstLevelTable[i],
NumberOfDescriptors,
MemorySpaceMap,
&NextRegionBase,
&NextRegionLength,
&NextSectionAttributes
);
ASSERT_EFI_ERROR (Status);
} else {
// We do not support yet 16MB sections
@ -310,9 +315,10 @@ SyncCacheConfig (
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
NextRegionLength = 0;
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
NextSectionAttributes = 0;
}
NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
}
} // section entry loop
@ -400,7 +406,7 @@ GetMemoryRegionPage (
ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
// Go through the page table to find the end of the section
for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
// Get the section at the given index
PageDescriptor = PageTable[TableIndex];
@ -416,7 +422,7 @@ GetMemoryRegionPage (
}
} else {
// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
ASSERT(0);
ASSERT (0);
return EFI_SUCCESS;
}
}
@ -466,7 +472,7 @@ GetMemoryRegion (
*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
// Get the attribute at the page table level (Level 2)
PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
// Calculate index into first level translation table for start of modification
PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@ -477,14 +483,14 @@ GetMemoryRegion (
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
}
for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
// Get the section at the given index
SectionDescriptor = FirstLevelTable[TableIndex];
// If the entry is a level-2 page table then we scan it to find the end of the region
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
// Extract the page table location from the descriptor
PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
// Scan the page table to find the end of the region.
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
@ -494,7 +500,8 @@ GetMemoryRegion (
break;
}
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) {
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
{
if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
// If the attributes of the section differ from the one targeted then we exit the loop
break;

View File

@ -49,7 +49,6 @@ CpuFlushCpuDataCache (
IN EFI_CPU_FLUSH_TYPE FlushType
)
{
switch (FlushType) {
case EfiCpuFlushTypeWriteBack:
WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
@ -67,7 +66,6 @@ CpuFlushCpuDataCache (
return EFI_SUCCESS;
}
/**
This function enables interrupt processing by the processor.
@ -88,7 +86,6 @@ CpuEnableInterrupt (
return EFI_SUCCESS;
}
/**
This function disables interrupt processing by the processor.
@ -109,7 +106,6 @@ CpuDisableInterrupt (
return EFI_SUCCESS;
}
/**
This function retrieves the processor's current interrupt state a returns it in
State. If interrupts are currently enabled, then TRUE is returned. If interrupts
@ -134,11 +130,10 @@ CpuGetInterruptState (
return EFI_INVALID_PARAMETER;
}
*State = ArmGetInterruptState();
*State = ArmGetInterruptState ();
return EFI_SUCCESS;
}
/**
This function generates an INIT on the processor. If this function succeeds, then the
processor will be reset, and control will not be returned to the caller. If InitType is
@ -247,7 +242,8 @@ CpuDxeInitialize (
Status = gBS->InstallMultipleProtocolInterfaces (
&mCpuHandle,
&gEfiCpuArchProtocolGuid, &mCpu,
&gEfiCpuArchProtocolGuid,
&mCpu,
NULL
);
@ -262,8 +258,8 @@ CpuDxeInitialize (
// If the platform is a MPCore system then install the Configuration Table describing the
// secondary core states
if (ArmIsMpCore()) {
PublishArmProcessorTable();
if (ArmIsMpCore ()) {
PublishArmProcessorTable ();
}
//

View File

@ -59,7 +59,6 @@ RegisterInterruptHandler (
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
/**
This function registers and enables the handler specified by InterruptHandler for a processor
interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
@ -86,7 +85,6 @@ RegisterDebuggerInterruptHandler (
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
EFI_STATUS
EFIAPI
CpuSetMemoryAttributes (
@ -117,7 +115,7 @@ SyncCacheConfig (
**/
VOID
EFIAPI
PublishArmProcessorTable(
PublishArmProcessorTable (
VOID
);

View File

@ -43,19 +43,22 @@ SearchGcdMemorySpaces (
*EndIndex = 0;
for (Index = 0; Index < NumberOfDescriptors; Index++) {
if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) &&
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
(BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
*StartIndex = Index;
}
if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) &&
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) {
((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)))
{
*EndIndex = Index;
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
/**
Sets the attributes for a specified range in Gcd Memory Space Map.
@ -88,14 +91,21 @@ SetGcdMemorySpaceAttributes (
EFI_PHYSICAL_ADDRESS RegionStart;
UINT64 RegionLength;
DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress, BaseAddress + Length, Attributes));
DEBUG ((
DEBUG_GCD,
"SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",
BaseAddress,
BaseAddress + Length,
Attributes
));
// We do not support a smaller granularity than 4KB on ARM Architecture
if ((Length & EFI_PAGE_MASK) != 0) {
DEBUG ((DEBUG_WARN,
DEBUG ((
DEBUG_WARN,
"Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",
Length));
Length
));
}
//
@ -120,6 +130,7 @@ SetGcdMemorySpaceAttributes (
if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
continue;
}
//
// Calculate the start and end address of the overlapping range
//
@ -128,11 +139,13 @@ SetGcdMemorySpaceAttributes (
} else {
RegionStart = MemorySpaceMap[Index].BaseAddress;
}
if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) {
RegionLength = BaseAddress + Length - RegionStart;
} else {
RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
}
//
// Set memory attributes according to MTRR attribute and the original attribute of descriptor
//

View File

@ -26,7 +26,7 @@ ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = {
EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION,
{ 0 },
0
}, //ARM Processor table header
}, // ARM Processor table header
0, // Number of entries in ARM processor Table
NULL // ARM Processor Table
};
@ -50,42 +50,43 @@ PublishArmProcessorTable (
Hob.Raw = GetHobList ();
// Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB
for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
for ( ; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
// Check for Correct HOB type
if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) {
// Check for correct GUID type
if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
if (CompareGuid (&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) {
ARM_PROCESSOR_TABLE *ArmProcessorTable;
EFI_STATUS Status;
// Allocate Runtime memory for ARM processor table
ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE));
ArmProcessorTable = (ARM_PROCESSOR_TABLE *)AllocateRuntimePool (sizeof (ARM_PROCESSOR_TABLE));
// Check if the memory allocation is successful or not
ASSERT(NULL != ArmProcessorTable);
ASSERT (NULL != ArmProcessorTable);
// Set ARM processor table to default values
CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE));
CopyMem (ArmProcessorTable, &mArmProcessorTableTemplate, sizeof (ARM_PROCESSOR_TABLE));
// Fill in Length fields of ARM processor table
ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE);
ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob);
ArmProcessorTable->Header.Length = sizeof (ARM_PROCESSOR_TABLE);
ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE (Hob);
// Fill in Identifier(ARM processor table GUID)
ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid;
// Set Number of ARM core entries in the Table
ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO);
ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE (Hob)/sizeof (ARM_CORE_INFO);
// Allocate runtime memory for ARM processor Table entries
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO));
ArmProcessorTable->ArmCpus = (ARM_CORE_INFO *)AllocateRuntimePool (
ArmProcessorTable->NumberOfEntries * sizeof (ARM_CORE_INFO)
);
// Check if the memory allocation is successful or not
ASSERT(NULL != ArmProcessorTable->ArmCpus);
ASSERT (NULL != ArmProcessorTable->ArmCpus);
// Copy ARM Processor Table data from HOB list to newly allocated memory
CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen);
CopyMem (ArmProcessorTable->ArmCpus, GET_GUID_HOB_DATA (Hob), ArmProcessorTable->Header.DataLen);
// Install the ARM Processor table into EFI system configuration table
Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable);

View File

@ -23,13 +23,13 @@ InitializeExceptions (
BOOLEAN FiqEnabled;
VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL;
Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList);
if ((Status == EFI_SUCCESS) && (VectorInfoList != NULL)) {
VectorInfo = VectorInfoList;
}
// initialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core
InitializeCpuExceptionHandlers(VectorInfo);
InitializeCpuExceptionHandlers (VectorInfo);
Status = EFI_SUCCESS;
@ -90,11 +90,11 @@ previously installed.
**/
EFI_STATUS
RegisterInterruptHandler(
RegisterInterruptHandler (
IN EFI_EXCEPTION_TYPE InterruptType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
)
{
// pass down to CpuExceptionHandlerLib
return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler);
return (EFI_STATUS)RegisterCpuInterruptHandler (InterruptType, InterruptHandler);
}

View File

@ -16,8 +16,6 @@ Abstract:
**/
//
// The package level header files this module uses
//
@ -70,12 +68,12 @@ InitializeCpuPeim (
BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
if (!EFI_ERROR(Status)) {
Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID **)&ArmMpCoreInfoPpi);
if (!EFI_ERROR (Status)) {
// Build the MP Core Info Table
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {
// Build MPCore Info HOB
BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
}

View File

@ -5,6 +5,7 @@
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#ifndef GENERIC_WATCHDOG_H_
#define GENERIC_WATCHDOG_H_

View File

@ -101,7 +101,7 @@ WatchdogInterruptHandler (
IN EFI_SYSTEM_CONTEXT SystemContext
)
{
STATIC CONST CHAR16 ResetString[]= L"The generic watchdog timer ran out.";
STATIC CONST CHAR16 ResetString[] = L"The generic watchdog timer ran out.";
UINT64 TimerPeriod;
WatchdogDisable ();
@ -119,8 +119,12 @@ WatchdogInterruptHandler (
mWatchdogNotify (TimerPeriod + 1);
}
gRT->ResetSystem (EfiResetCold, EFI_TIMEOUT, StrSize (ResetString),
(CHAR16 *)ResetString);
gRT->ResetSystem (
EfiResetCold,
EFI_TIMEOUT,
StrSize (ResetString),
(CHAR16 *)ResetString
);
// If we got here then the reset didn't work
ASSERT (FALSE);
@ -158,11 +162,11 @@ WatchdogRegisterHandler (
IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
)
{
if (mWatchdogNotify == NULL && NotifyFunction == NULL) {
if ((mWatchdogNotify == NULL) && (NotifyFunction == NULL)) {
return EFI_INVALID_PARAMETER;
}
if (mWatchdogNotify != NULL && NotifyFunction != NULL) {
if ((mWatchdogNotify != NULL) && (NotifyFunction != NULL)) {
return EFI_ALREADY_STARTED;
}
@ -307,8 +311,11 @@ GenericWatchdogEntry (
EFI_STATUS Status;
EFI_HANDLE Handle;
Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL,
(VOID **)&mInterruptProtocol);
Status = gBS->LocateProtocol (
&gHardwareInterrupt2ProtocolGuid,
NULL,
(VOID **)&mInterruptProtocol
);
ASSERT_EFI_ERROR (Status);
/* Make sure the Watchdog Timer Architectural Protocol has not been installed
@ -320,33 +327,44 @@ GenericWatchdogEntry (
ASSERT (mTimerFrequencyHz != 0);
// Install interrupt handler
Status = mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
Status = mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
WatchdogInterruptHandler);
WatchdogInterruptHandler
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = mInterruptProtocol->SetTriggerType (mInterruptProtocol,
Status = mInterruptProtocol->SetTriggerType (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING);
EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING
);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Install the Timer Architectural Protocol onto a new handle
Handle = NULL;
Status = gBS->InstallMultipleProtocolInterfaces (&Handle,
&gEfiWatchdogTimerArchProtocolGuid, &mWatchdogTimer,
NULL);
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiWatchdogTimerArchProtocolGuid,
&mWatchdogTimer,
NULL
);
if (EFI_ERROR (Status)) {
goto UnregisterHandler;
}
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY,
WatchdogExitBootServicesEvent, NULL,
&mEfiExitBootServicesEvent);
Status = gBS->CreateEvent (
EVT_SIGNAL_EXIT_BOOT_SERVICES,
TPL_NOTIFY,
WatchdogExitBootServicesEvent,
NULL,
&mEfiExitBootServicesEvent
);
ASSERT_EFI_ERROR (Status);
mNumTimerTicks = 0;
@ -356,8 +374,10 @@ GenericWatchdogEntry (
UnregisterHandler:
// Unregister the handler
mInterruptProtocol->RegisterInterruptSource (mInterruptProtocol,
mInterruptProtocol->RegisterInterruptSource (
mInterruptProtocol,
FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
NULL);
NULL
);
return Status;
}

View File

@ -42,14 +42,20 @@ STATIC EFI_HANDLE mMmCommunicateHandle;
This function provides a service to send and receive messages from a registered UEFI service.
@param[in] This The EFI_MM_COMMUNICATION_PROTOCOL instance.
@param[in] CommBufferPhysical Physical address of the MM communication buffer
@param[in] CommBufferVirtual Virtual address of the MM communication buffer
@param[in] CommSize The size of the data buffer being passed in. On exit, the size of data
being returned. Zero if the handler does not wish to reply with any data.
This parameter is optional and may be NULL.
@param[in, out] CommBufferPhysical Physical address of the MM communication buffer
@param[in, out] CommBufferVirtual Virtual address of the MM communication buffer
@param[in, out] CommSize The size of the data buffer being passed in. On input,
when not omitted, the buffer should cover EFI_MM_COMMUNICATE_HEADER
and the value of MessageLength field. On exit, the size
of data being returned. Zero if the handler does not
wish to reply with any data. This parameter is optional
and may be NULL.
@retval EFI_SUCCESS The message was successfully posted.
@retval EFI_INVALID_PARAMETER CommBufferPhysical was NULL or CommBufferVirtual was NULL.
@retval EFI_INVALID_PARAMETER CommBufferPhysical or CommBufferVirtual was NULL, or
integer value pointed by CommSize does not cover
EFI_MM_COMMUNICATE_HEADER and the value of MessageLength
field.
@retval EFI_BAD_BUFFER_SIZE The buffer is too large for the MM implementation.
If this error is returned, the MessageLength field
in the CommBuffer header or the integer pointed by
@ -82,10 +88,11 @@ MmCommunication2Communicate (
//
// Check parameters
//
if (CommBufferVirtual == NULL) {
if ((CommBufferVirtual == NULL) || (CommBufferPhysical == NULL)) {
return EFI_INVALID_PARAMETER;
}
Status = EFI_SUCCESS;
CommunicateHeader = CommBufferVirtual;
// CommBuffer is a mandatory parameter. Hence, Rely on
// MessageLength + Header to ascertain the
@ -95,33 +102,41 @@ MmCommunication2Communicate (
sizeof (CommunicateHeader->HeaderGuid) +
sizeof (CommunicateHeader->MessageLength);
// If the length of the CommBuffer is 0 then return the expected length.
if (CommSize != 0) {
// If CommSize is not omitted, perform size inspection before proceeding.
if (CommSize != NULL) {
// This case can be used by the consumer of this driver to find out the
// max size that can be used for allocating CommBuffer.
if ((*CommSize == 0) ||
(*CommSize > mNsCommBuffMemRegion.Length)) {
(*CommSize > mNsCommBuffMemRegion.Length))
{
*CommSize = mNsCommBuffMemRegion.Length;
return EFI_BAD_BUFFER_SIZE;
Status = EFI_BAD_BUFFER_SIZE;
}
//
// CommSize must match MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
// CommSize should cover at least MessageLength + sizeof (EFI_MM_COMMUNICATE_HEADER);
//
if (*CommSize != BufferSize) {
return EFI_INVALID_PARAMETER;
if (*CommSize < BufferSize) {
Status = EFI_INVALID_PARAMETER;
}
}
//
// If the buffer size is 0 or greater than what can be tolerated by the MM
// If the message length is 0 or greater than what can be tolerated by the MM
// environment then return the expected size.
//
if ((BufferSize == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length)) {
if ((CommunicateHeader->MessageLength == 0) ||
(BufferSize > mNsCommBuffMemRegion.Length))
{
CommunicateHeader->MessageLength = mNsCommBuffMemRegion.Length -
sizeof (CommunicateHeader->HeaderGuid) -
sizeof (CommunicateHeader->MessageLength);
return EFI_BAD_BUFFER_SIZE;
Status = EFI_BAD_BUFFER_SIZE;
}
// MessageLength or CommSize check has failed, return here.
if (EFI_ERROR (Status)) {
return Status;
}
// SMC Function ID
@ -219,15 +234,19 @@ NotifySetVirtualAddressMap (
(VOID **)&mNsCommBuffMemRegion.VirtualBase
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n", Status));
DEBUG ((
DEBUG_ERROR,
"NotifySetVirtualAddressMap():"
" Unable to convert MM runtime pointer. Status:0x%r\n",
Status
));
}
}
STATIC
EFI_STATUS
GetMmCompatibility ()
GetMmCompatibility (
)
{
EFI_STATUS Status;
UINT32 MmVersion;
@ -240,21 +259,32 @@ GetMmCompatibility ()
MmVersion = MmVersionArgs.Arg0;
if ((MM_MAJOR_VER(MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER(MmVersion) >= MM_CALLER_MINOR_VER)) {
DEBUG ((DEBUG_INFO, "MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion)));
if ((MM_MAJOR_VER (MmVersion) == MM_CALLER_MAJOR_VER) &&
(MM_MINOR_VER (MmVersion) >= MM_CALLER_MINOR_VER))
{
DEBUG ((
DEBUG_INFO,
"MM Version: Major=0x%x, Minor=0x%x\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion)
));
Status = EFI_SUCCESS;
} else {
DEBUG ((DEBUG_ERROR, "Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER(MmVersion), MM_MINOR_VER(MmVersion), MM_CALLER_MAJOR_VER, MM_CALLER_MINOR_VER));
DEBUG ((
DEBUG_ERROR,
"Incompatible MM Versions.\n Current Version: Major=0x%x, Minor=0x%x.\n Expected: Major=0x%x, Minor>=0x%x.\n",
MM_MAJOR_VER (MmVersion),
MM_MINOR_VER (MmVersion),
MM_CALLER_MAJOR_VER,
MM_CALLER_MINOR_VER
));
Status = EFI_UNSUPPORTED;
}
return Status;
}
STATIC EFI_GUID* CONST mGuidedEventGuid[] = {
STATIC EFI_GUID *CONST mGuidedEventGuid[] = {
&gEfiEndOfDxeEventGroupGuid,
&gEfiEventExitBootServicesGuid,
&gEfiEventReadyToBootGuid,
@ -317,7 +347,7 @@ MmCommunication2Initialize (
// Check if we can make the MM call
Status = GetMmCompatibility ();
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
goto ReturnErrorStatus;
}
@ -339,8 +369,11 @@ MmCommunication2Initialize (
EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"));
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to add MM-NS Buffer Memory Space\n"
));
goto ReturnErrorStatus;
}
@ -350,8 +383,11 @@ MmCommunication2Initialize (
EFI_MEMORY_WB | EFI_MEMORY_XP | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"));
DEBUG ((
DEBUG_ERROR,
"MmCommunicateInitialize: "
"Failed to set MM-NS Buffer Memory attributes\n"
));
goto CleanAddedMemorySpace;
}
@ -362,9 +398,12 @@ MmCommunication2Initialize (
EFI_NATIVE_INTERFACE,
&mMmCommunication2
);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"));
if (EFI_ERROR (Status)) {
DEBUG ((
DEBUG_ERROR,
"MmCommunicationInitialize: "
"Failed to install MM communication protocol\n"
));
goto CleanAddedMemorySpace;
}
@ -381,17 +420,24 @@ MmCommunication2Initialize (
ASSERT_EFI_ERROR (Status);
for (Index = 0; Index < ARRAY_SIZE (mGuidedEventGuid); Index++) {
Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
MmGuidedEventNotify, mGuidedEventGuid[Index],
mGuidedEventGuid[Index], &mGuidedEvent[Index]);
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
MmGuidedEventNotify,
mGuidedEventGuid[Index],
mGuidedEventGuid[Index],
&mGuidedEvent[Index]
);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
while (Index-- > 0) {
gBS->CloseEvent (mGuidedEvent[Index]);
}
goto UninstallProtocol;
}
}
return EFI_SUCCESS;
UninstallProtocol:

View File

@ -7,7 +7,6 @@
**/
#include <PiDxe.h>
#include <Library/ArmLib.h>
@ -305,8 +304,7 @@ TimerInterruptHandler (
gInterrupt->EndOfInterrupt (gInterrupt, Source);
// Check if the timer interrupt is active
if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) {
if ((ArmGenericTimerGetTimerCtrlReg ()) & ARM_ARCH_TIMER_ISTATUS) {
if (mTimerNotifyFunction != 0) {
mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod);
}
@ -338,7 +336,6 @@ TimerInterruptHandler (
gBS->RestoreTPL (OriginalTPL);
}
/**
Initialize the state information for the Timer Architectural Protocol and
the Timer Debug support protocol that allows the debugger to break into a
@ -405,17 +402,18 @@ TimerInitialize (
ASSERT_EFI_ERROR (Status);
// Set up default timer
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32 (PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
ASSERT_EFI_ERROR (Status);
Handle = NULL;
// Install the Timer Architectural Protocol onto a new handle
Status = gBS->InstallMultipleProtocolInterfaces(
Status = gBS->InstallMultipleProtocolInterfaces (
&Handle,
&gEfiTimerArchProtocolGuid, &gTimer,
&gEfiTimerArchProtocolGuid,
&gTimer,
NULL
);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
// Everything is ready, unmask and enable timer interrupts
TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;

View File

@ -60,10 +60,12 @@ typedef struct {
SEMIHOST_DEVICE_PATH gDevicePath = {
{
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } },
{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 }
},
EFI_CALLER_ID_GUID
},
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
{ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }
}
};
typedef struct {
@ -115,8 +117,6 @@ FreeFCB (
FreePool (Fcb);
}
EFI_STATUS
VolumeOpen (
IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
@ -191,14 +191,16 @@ FileOpen (
return EFI_INVALID_PARAMETER;
}
if ( (OpenMode != EFI_FILE_MODE_READ) &&
if ((OpenMode != EFI_FILE_MODE_READ) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) &&
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) {
(OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)))
{
return EFI_INVALID_PARAMETER;
}
if (((OpenMode & EFI_FILE_MODE_CREATE) != 0) &&
((Attributes & EFI_FILE_DIRECTORY) != 0)) {
((Attributes & EFI_FILE_DIRECTORY) != 0))
{
return EFI_WRITE_PROTECTED;
}
@ -207,13 +209,15 @@ FileOpen (
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length);
// Opening '/', '\', '.', or the NULL pathname is trying to open the root directory
if ((AsciiStrCmp (AsciiFileName, "\\") == 0) ||
(AsciiStrCmp (AsciiFileName, "/") == 0) ||
(AsciiStrCmp (AsciiFileName, "") == 0) ||
(AsciiStrCmp (AsciiFileName, ".") == 0) ) {
(AsciiStrCmp (AsciiFileName, ".") == 0))
{
FreePool (AsciiFileName);
return (VolumeOpen (&gSemihostFs, NewHandle));
}
@ -232,6 +236,7 @@ FileOpen (
} else {
SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE;
}
Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle);
if (RETURN_ERROR (Return)) {
@ -346,6 +351,7 @@ TruncateFile (
if (RETURN_ERROR (Return)) {
goto Error;
}
Remaining -= ToRead;
Read += ToRead;
}
@ -379,12 +385,12 @@ Error:
if (FileHandle != 0) {
SemihostFileClose (FileHandle);
}
if (Buffer != NULL) {
FreePool (Buffer);
}
return (Status);
}
/**
@ -408,7 +414,7 @@ FileClose (
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS(This);
Fcb = SEMIHOST_FCB_FROM_THIS (This);
if (!Fcb->IsRoot) {
SemihostFileClose (Fcb->SemihostHandle);
@ -420,6 +426,7 @@ FileClose (
if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) {
TruncateFile (Fcb->FileName, Fcb->Info.FileSize);
}
FreePool (Fcb->FileName);
}
@ -471,6 +478,7 @@ FileDelete (
if (RETURN_ERROR (Return)) {
return EFI_WARN_DELETE_FAILURE;
}
return EFI_SUCCESS;
} else {
return EFI_WARN_DELETE_FAILURE;
@ -566,14 +574,15 @@ ExtendFile (
}
Remaining = Size;
SetMem (WriteBuffer, 0, sizeof(WriteBuffer));
SetMem (WriteBuffer, 0, sizeof (WriteBuffer));
while (Remaining > 0) {
WriteNb = MIN (Remaining, sizeof(WriteBuffer));
WriteNb = MIN (Remaining, sizeof (WriteBuffer));
WriteSize = WriteNb;
Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer);
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Remaining -= WriteNb;
}
@ -617,8 +626,9 @@ FileWrite (
Fcb = SEMIHOST_FCB_FROM_THIS (This);
// We cannot write a read-only file
if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
return EFI_ACCESS_DENIED;
}
@ -632,6 +642,7 @@ FileWrite (
if (EFI_ERROR (Status)) {
return Status;
}
Fcb->Info.FileSize = Fcb->Position;
}
@ -650,6 +661,7 @@ FileWrite (
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
}
Fcb->Info.PhysicalSize = Length;
return EFI_SUCCESS;
@ -678,7 +690,7 @@ FileGetPosition (
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS(This);
Fcb = SEMIHOST_FCB_FROM_THIS (This);
*Position = Fcb->Position;
@ -718,8 +730,7 @@ FileSetPosition (
if (Position != 0) {
return EFI_UNSUPPORTED;
}
}
else {
} else {
//
// UEFI Spec section 12.5:
// "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to
@ -728,6 +739,7 @@ FileSetPosition (
if (Position == 0xFFFFFFFFFFFFFFFF) {
Position = Fcb->Info.FileSize;
}
Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize));
if (RETURN_ERROR (Return)) {
return EFI_DEVICE_ERROR;
@ -767,7 +779,7 @@ GetFileInfo (
if (Fcb->IsRoot) {
NameSize = 0;
ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16);
ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof (CHAR16);
} else {
NameSize = AsciiStrLen (Fcb->FileName) + 1;
ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16);
@ -889,11 +901,12 @@ FileGetInfo (
if ((This == NULL) ||
(InformationType == NULL) ||
(BufferSize == NULL) ||
((Buffer == NULL) && (*BufferSize > 0)) ) {
((Buffer == NULL) && (*BufferSize > 0)))
{
return EFI_INVALID_PARAMETER;
}
Fcb = SEMIHOST_FCB_FROM_THIS(This);
Fcb = SEMIHOST_FCB_FROM_THIS (This);
if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
Status = GetFilesystemInfo (Fcb, BufferSize, Buffer);
@ -968,6 +981,7 @@ SetFileInfo (
if (AsciiFileName == NULL) {
return EFI_OUT_OF_RESOURCES;
}
UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length);
FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize);
@ -985,7 +999,8 @@ SetFileInfo (
// description.
//
if ((Fcb->OpenMode == EFI_FILE_MODE_READ) ||
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) {
(Fcb->Info.Attribute & EFI_FILE_READ_ONLY))
{
if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) {
Status = EFI_ACCESS_DENIED;
goto Error;
@ -1006,6 +1021,7 @@ SetFileInfo (
if (EFI_ERROR (Status)) {
goto Error;
}
//
// The read/write position from the host file system point of view
// is at the end of the file. If the position from this module
@ -1016,12 +1032,14 @@ SetFileInfo (
FileSetPosition (&Fcb->File, Fcb->Position);
}
}
Fcb->Info.FileSize = FileSize;
Return = SemihostFileLength (Fcb->SemihostHandle, &Length);
if (RETURN_ERROR (Return)) {
goto Error;
}
Fcb->Info.PhysicalSize = Length;
}
@ -1048,6 +1066,7 @@ SetFileInfo (
if (RETURN_ERROR (Return)) {
goto Error;
}
FreePool (Fcb->FileName);
Fcb->FileName = AsciiFileName;
AsciiFileName = NULL;
@ -1119,19 +1138,24 @@ FileSetInfo (
if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) {
return EFI_INVALID_PARAMETER;
}
if (BufferSize < Info->Size) {
return EFI_BAD_BUFFER_SIZE;
}
return SetFileInfo (Fcb, Info);
} else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) {
SystemInfo = Buffer;
if (SystemInfo->Size <
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) {
(SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel)))
{
return EFI_INVALID_PARAMETER;
}
if (BufferSize < SystemInfo->Size) {
return EFI_BAD_BUFFER_SIZE;
}
Buffer = SystemInfo->VolumeLabel;
if (StrSize (Buffer) > 0) {
@ -1160,13 +1184,14 @@ FileFlush (
{
SEMIHOST_FCB *Fcb;
Fcb = SEMIHOST_FCB_FROM_THIS(File);
Fcb = SEMIHOST_FCB_FROM_THIS (File);
if (Fcb->IsRoot) {
return EFI_SUCCESS;
} else {
if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) {
if ( (Fcb->Info.Attribute & EFI_FILE_READ_ONLY)
|| !(Fcb->OpenMode & EFI_FILE_MODE_WRITE))
{
return EFI_ACCESS_DENIED;
} else {
return EFI_SUCCESS;
@ -1192,12 +1217,14 @@ SemihostFsEntryPoint (
Status = gBS->InstallMultipleProtocolInterfaces (
&gInstallHandle,
&gEfiSimpleFileSystemProtocolGuid, &gSemihostFs,
&gEfiDevicePathProtocolGuid, &gDevicePath,
&gEfiSimpleFileSystemProtocolGuid,
&gSemihostFs,
&gEfiDevicePathProtocolGuid,
&gDevicePath,
NULL
);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
FreePool (mSemihostFsLabel);
}
}

View File

@ -243,4 +243,3 @@ FileFlush (
);
#endif // SEMIHOST_FS_H_

View File

@ -9,7 +9,6 @@
**/
#ifndef ASM_MACRO_IO_LIB_H_
#define ASM_MACRO_IO_LIB_H_

View File

@ -9,7 +9,6 @@
**/
#ifndef ASM_MACRO_IO_LIBV8_H_
#define ASM_MACRO_IO_LIBV8_H_
@ -24,7 +23,6 @@
cbnz SAFE_XREG, 1f ;\
b . ;// We should never get here
// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
// This only selects between EL1 and EL2 and EL3, else we die.
// Provide the Macro with a safe temp xreg to use.

View File

@ -17,7 +17,7 @@
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL
#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL
#define MAIR_ATTR(n,value) ((value) << (((n) >> 2)*8))
#define MAIR_ATTR(n, value) ((value) << (((n) >> 2)*8))
//
// Long-descriptor Translation Table format
@ -152,7 +152,6 @@
#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD)
#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD)
#define TCR_EL23_T0SZ_FIELD (0)
#define TCR_EL23_IRGN0_FIELD (8)
#define TCR_EL23_ORGN0_FIELD (10)
@ -166,7 +165,6 @@
#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD)
#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD)
#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10)
#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10)
#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10)
@ -195,4 +193,3 @@
// Uses LPAE Page Table format
#endif // AARCH64_MMU_H_

View File

@ -48,7 +48,6 @@
#define A9_SCU_SACR_OFFSET 0x50
#define A9_SCU_SSACR_OFFSET 0x54
UINTN
EFIAPI
ArmGetScuBaseAddress (
@ -56,4 +55,3 @@ ArmGetScuBaseAddress (
);
#endif // ARM_CORTEX_A9_H_

View File

@ -41,7 +41,6 @@
#define CPSR_IRQ (1 << 7)
#define CPSR_FIQ (1 << 6)
// CPACR - Coprocessor Access Control Register definitions
#define CPACR_CP_DENIED(cp) 0x00
#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)

View File

@ -33,7 +33,6 @@
#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
#define TRANSLATION_TABLE_SECTION_COUNT 4096
#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
@ -137,16 +136,16 @@
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc, IsLargePage) ((IsLargePage)?\
((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \
((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK))
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc, IsLargePage) (IsLargePage? \
(((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \
(((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))))
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc, IsLargePage) (IsLargePage? \
(((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \
(((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))))

View File

@ -14,8 +14,7 @@
#define MPIDR_U_BIT_MASK 0x40000000
typedef struct {
UINT32 ClusterId;
UINT32 CoreId;
UINT64 Mpidr;
// MP Core Mailbox
EFI_PHYSICAL_ADDRESS MailboxSetAddress;
@ -24,7 +23,7 @@ typedef struct {
UINT64 MailboxClearValue;
} ARM_CORE_INFO;
typedef struct{
typedef struct {
UINT64 Signature;
UINT32 Length;
UINT32 Revision;
@ -43,12 +42,11 @@ typedef struct {
ARM_CORE_INFO *ArmCpus;
} ARM_PROCESSOR_TABLE;
#define ARM_MP_CORE_INFO_GUID \
{ 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000// 1.0
#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001

View File

@ -18,17 +18,16 @@
/// Defines the structure of the CSSELR (Cache Size Selection) register
typedef union {
struct {
UINT32 InD :1; ///< Instruction not Data bit
UINT32 Level :3; ///< Cache level (zero based)
UINT32 TnD :1; ///< Allocation not Data bit
UINT32 Reserved :27; ///< Reserved, RES0
UINT32 InD : 1; ///< Instruction not Data bit
UINT32 Level : 3; ///< Cache level (zero based)
UINT32 TnD : 1; ///< Allocation not Data bit
UINT32 Reserved : 27; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CSSELR_DATA;
/// The cache type values for the InD field of the CSSELR register
typedef enum
{
typedef enum {
/// Select the data or unified cache
CsselrCacheTypeDataOrUnified = 0,
/// Select the instruction cache
@ -39,18 +38,18 @@ typedef enum
/// Defines the structure of the CCSIDR (Current Cache Size ID) register
typedef union {
struct {
UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity :10; ///< Associativity - 1
UINT64 NumSets :15; ///< Number of sets in the cache -1
UINT64 Unknown :4; ///< Reserved, UNKNOWN
UINT64 Reserved :32; ///< Reserved, RES0
UINT64 LineSize : 3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity : 10; ///< Associativity - 1
UINT64 NumSets : 15; ///< Number of sets in the cache -1
UINT64 Unknown : 4; ///< Reserved, UNKNOWN
UINT64 Reserved : 32; ///< Reserved, RES0
} BitsNonCcidx; ///< Bitfield definition of the register when FEAT_CCIDX is not supported.
struct {
UINT64 LineSize :3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity :21; ///< Associativity - 1
UINT64 Reserved1 :8; ///< Reserved, RES0
UINT64 NumSets :24; ///< Number of sets in the cache -1
UINT64 Reserved2 :8; ///< Reserved, RES0
UINT64 LineSize : 3; ///< Line size (Log2(Num bytes in cache) - 4)
UINT64 Associativity : 21; ///< Associativity - 1
UINT64 Reserved1 : 8; ///< Reserved, RES0
UINT64 NumSets : 24; ///< Number of sets in the cache -1
UINT64 Reserved2 : 8; ///< Reserved, RES0
} BitsCcidxAA64; ///< Bitfield definition of the register when FEAT_IDX is supported.
struct {
UINT64 LineSize : 3;
@ -64,8 +63,8 @@ typedef union {
/// Defines the structure of the AARCH32 CCSIDR2 register.
typedef union {
struct {
UINT32 NumSets :24; ///< Number of sets in the cache - 1
UINT32 Reserved :8; ///< Reserved, RES0
UINT32 NumSets : 24; ///< Number of sets in the cache - 1
UINT32 Reserved : 8; ///< Reserved, RES0
} Bits; ///< Bitfield definition of the register
UINT32 Data; ///< The entire 32-bit value
} CCSIDR2_DATA;

View File

@ -17,7 +17,6 @@ typedef enum {
ARM_GIC_ARCH_REVISION_3
} ARM_GIC_ARCH_REVISION;
ARM_GIC_ARCH_REVISION
EFIAPI
ArmGicGetSupportedArchRevision (

View File

@ -52,7 +52,6 @@
#define ARM_GIC_ICDICFR_LEVEL_TRIGGERED 0x0 // Level triggered interrupt
#define ARM_GIC_ICDICFR_EDGE_TRIGGERED 0x1 // Edge triggered interrupt
// GIC Redistributor
#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB
#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
@ -130,7 +129,7 @@ VOID
EFIAPI
ArmGicSetSecureInterrupts (
IN UINTN GicDistributorBase,
IN UINTN* GicSecureInterruptMask,
IN UINTN *GicSecureInterruptMask,
IN UINTN GicSecureInterruptMaskSize
);

View File

@ -15,7 +15,7 @@
#ifdef MDE_CPU_ARM
#include <Chipset/ArmV7.h>
#elif defined(MDE_CPU_AARCH64)
#elif defined (MDE_CPU_AARCH64)
#include <Chipset/AArch64.h>
#else
#error "Unknown chipset."
@ -59,8 +59,12 @@ typedef struct {
ARM_MEMORY_REGION_ATTRIBUTES Attributes;
} ARM_MEMORY_REGION_DESCRIPTOR;
typedef VOID (*CACHE_OPERATION)(VOID);
typedef VOID (*LINE_OPERATION)(UINTN);
typedef VOID (*CACHE_OPERATION)(
VOID
);
typedef VOID (*LINE_OPERATION)(
UINTN
);
//
// ARM Processor Mode
@ -107,6 +111,10 @@ typedef enum {
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8)
#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define GET_MPIDR_AFF0(MpId) ((MpId) & ARM_CORE_AFF0)
#define GET_MPIDR_AFF1(MpId) (((MpId) & ARM_CORE_AFF1) >> 8)
#define GET_MPIDR_AFF2(MpId) (((MpId) & ARM_CORE_AFF2) >> 16)
#define GET_MPIDR_AFF3(MpId) (((MpId) & ARM_CORE_AFF3) >> 32)
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
/** Reads the CCSIDR register for the specified cache.
@ -183,7 +191,6 @@ ArmInvalidateDataCache (
VOID
);
VOID
EFIAPI
ArmCleanInvalidateDataCache (
@ -223,8 +230,8 @@ ArmInvalidateInstructionCacheEntryToPoUByMVA (
VOID
EFIAPI
ArmCleanDataCacheEntryByMVA (
IN UINTN Address
);
IN UINTN Address
);
VOID
EFIAPI
@ -573,7 +580,6 @@ ArmWriteHVBar (
IN UINTN HypModeVectorBase
);
//
// Helper functions for accessing CPU ACTLR
//
@ -736,7 +742,6 @@ ArmGetPhysicalAddressBits (
VOID
);
///
/// ID Register Helper functions
///
@ -768,6 +773,7 @@ ArmHasCcidx (
///
/// AArch32-only ID Register Helper functions
///
/**
Check whether the CPU supports the Security extensions
@ -779,6 +785,7 @@ EFIAPI
ArmHasSecurityExtensions (
VOID
);
#endif // MDE_CPU_ARM
#endif // ARM_LIB_H_

View File

@ -47,7 +47,7 @@ typedef struct {
typedef struct {
MTL_CHANNEL_TYPE ChannelType;
MTL_MAILBOX * CONST MailBox;
MTL_MAILBOX *CONST MailBox;
MTL_DOORBELL DoorBell;
} MTL_CHANNEL;
@ -71,7 +71,7 @@ MtlWaitUntilChannelFree (
@retval UINT32* Pointer to the payload.
**/
UINT32*
UINT32 *
MtlGetChannelPayload (
IN MTL_CHANNEL *Channel
);
@ -128,4 +128,3 @@ MtlReceiveMessage (
);
#endif /* ARM_MTL_LIB_H_ */

View File

@ -1,5 +1,6 @@
/** @file
*
* Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
* Copyright (c) 2012-2014, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
@ -37,4 +38,76 @@ ArmCallSmc (
IN OUT ARM_SMC_ARGS *Args
);
/** Trigger an SMC call with 3 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Argument/result.
@return The SMC error code.
**/
UINTN
ArmCallSmc3 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
IN OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 2 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc2 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 1 argument.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc1 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
/** Trigger an SMC call with 0 arguments.
@param Function The SMC function.
@param Arg1 Result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc0 (
IN UINTN Function,
OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
);
#endif // ARM_SMC_LIB_H_

View File

@ -8,15 +8,13 @@
*
**/
#ifndef OEM_MISC_LIB_H_
#define OEM_MISC_LIB_H_
#include <Uefi.h>
#include <IndustryStandard/SmBios.h>
typedef enum
{
typedef enum {
CpuCacheL1 = 1,
CpuCacheL2,
CpuCacheL3,
@ -27,8 +25,7 @@ typedef enum
CpuCacheLevelMax
} OEM_MISC_CPU_CACHE_LEVEL;
typedef struct
{
typedef struct {
UINT8 Voltage; ///< Processor voltage
UINT16 CurrentSpeed; ///< Current clock speed in MHz
UINT16 MaxSpeed; ///< Maximum clock speed in MHz
@ -38,17 +35,19 @@ typedef struct
UINT16 ThreadCount; ///< Number of threads per processor
} OEM_MISC_PROCESSOR_DATA;
typedef enum
{
typedef enum {
ProductNameType01,
SerialNumType01,
UuidType01,
SystemManufacturerType01,
VersionType01,
SkuNumberType01,
FamilyType01,
AssertTagType02,
SerialNumberType02,
BoardManufacturerType02,
ProductNameType02,
VersionType02,
SkuNumberType02,
ChassisLocationType02,
AssetTagType03,
@ -57,6 +56,8 @@ typedef enum
ChassisTypeType03,
ManufacturerType03,
SkuNumberType03,
ProcessorPartNumType04,
ProcessorSerialNumType04,
SmbiosHiiStringFieldMax
} OEM_MISC_SMBIOS_HII_STRING_FIELD;

View File

@ -81,7 +81,7 @@ SemihostFileLength (
**/
RETURN_STATUS
SemihostFileTmpName(
SemihostFileTmpName (
OUT VOID *Buffer,
IN UINT8 Identifier,
IN UINTN Length
@ -104,7 +104,7 @@ SemihostFileRemove (
**/
RETURN_STATUS
SemihostFileRename(
SemihostFileRename (
IN CHAR8 *FileName,
IN CHAR8 *NewFileName
);

View File

@ -32,10 +32,10 @@
**/
typedef
EFI_STATUS
(EFIAPI * ARM_MP_CORE_INFO_GET) (
(EFIAPI *ARM_MP_CORE_INFO_GET)(
OUT UINTN *ArmCoreCount,
OUT ARM_CORE_INFO **ArmCoreTable
);
);
///
/// This service abstracts the ability to migrate contents of the platform early memory store.

View File

@ -18,4 +18,3 @@
#define SCMI_MAX_STR_LEN 16
#endif /* ARM_SCMI_H_ */

View File

@ -50,7 +50,7 @@ typedef struct _SCMI_BASE_PROTOCOL SCMI_BASE_PROTOCOL;
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_GET_VERSION) (
(EFIAPI *SCMI_BASE_GET_VERSION)(
IN SCMI_BASE_PROTOCOL *This,
OUT UINT32 *Version
);
@ -67,7 +67,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS) (
(EFIAPI *SCMI_BASE_GET_TOTAL_PROTOCOLS)(
IN SCMI_BASE_PROTOCOL *This,
OUT UINT32 *TotalProtocols
);
@ -85,7 +85,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_DISCOVER_VENDOR) (
(EFIAPI *SCMI_BASE_DISCOVER_VENDOR)(
IN SCMI_BASE_PROTOCOL *This,
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
);
@ -103,7 +103,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR) (
(EFIAPI *SCMI_BASE_DISCOVER_SUB_VENDOR)(
IN SCMI_BASE_PROTOCOL *This,
OUT UINT8 VendorIdentifier[SCMI_MAX_STR_LEN]
);
@ -120,7 +120,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION) (
(EFIAPI *SCMI_BASE_DISCOVER_IMPLEMENTATION_VERSION)(
IN SCMI_BASE_PROTOCOL *This,
OUT UINT32 *ImplementationVersion
);
@ -141,7 +141,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS) (
(EFIAPI *SCMI_BASE_DISCOVER_LIST_PROTOCOLS)(
IN SCMI_BASE_PROTOCOL *This,
IN OUT UINT32 *ProtocolListSize,
OUT UINT8 *ProtocolList

View File

@ -15,7 +15,7 @@
#include <Protocol/ArmScmi.h>
#include <Protocol/ArmScmiClockProtocol.h>
#define ARM_SCMI_CLOCK2_PROTOCOL_GUID { \
#define ARM_SCMI_CLOCK2_PROTOCOL_GUID {\
0xb8d8caf2, 0x9e94, 0x462c, { 0xa8, 0x34, 0x6c, 0x99, 0xfc, 0x05, 0xef, 0xcf } \
}
@ -39,7 +39,7 @@ typedef struct _SCMI_CLOCK2_PROTOCOL SCMI_CLOCK2_PROTOCOL;
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_VERSION) (
(EFIAPI *SCMI_CLOCK2_GET_VERSION)(
IN SCMI_CLOCK2_PROTOCOL *This,
OUT UINT32 *Version
);
@ -57,7 +57,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS) (
(EFIAPI *SCMI_CLOCK2_GET_TOTAL_CLOCKS)(
IN SCMI_CLOCK2_PROTOCOL *This,
OUT UINT32 *TotalClocks
);
@ -77,7 +77,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES) (
(EFIAPI *SCMI_CLOCK2_GET_CLOCK_ATTRIBUTES)(
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT BOOLEAN *Enabled,
@ -109,7 +109,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES) (
(EFIAPI *SCMI_CLOCK2_DESCRIBE_RATES)(
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT SCMI_CLOCK_RATE_FORMAT *Format,
@ -131,7 +131,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_RATE_GET) (
(EFIAPI *SCMI_CLOCK2_RATE_GET)(
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
OUT UINT64 *Rate
@ -149,7 +149,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_RATE_SET) (
(EFIAPI *SCMI_CLOCK2_RATE_SET)(
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN UINT64 Rate
@ -168,7 +168,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK2_ENABLE) (
(EFIAPI *SCMI_CLOCK2_ENABLE)(
IN SCMI_CLOCK2_PROTOCOL *This,
IN UINT32 ClockId,
IN BOOLEAN Enable

View File

@ -14,7 +14,7 @@
#include <Protocol/ArmScmi.h>
#define ARM_SCMI_CLOCK_PROTOCOL_GUID { \
#define ARM_SCMI_CLOCK_PROTOCOL_GUID {\
0x91ce67a8, 0xe0aa, 0x4012, {0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa} \
}
@ -89,7 +89,7 @@ typedef struct _SCMI_CLOCK_PROTOCOL SCMI_CLOCK_PROTOCOL;
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_GET_VERSION) (
(EFIAPI *SCMI_CLOCK_GET_VERSION)(
IN SCMI_CLOCK_PROTOCOL *This,
OUT UINT32 *Version
);
@ -107,7 +107,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS) (
(EFIAPI *SCMI_CLOCK_GET_TOTAL_CLOCKS)(
IN SCMI_CLOCK_PROTOCOL *This,
OUT UINT32 *TotalClocks
);
@ -127,7 +127,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES) (
(EFIAPI *SCMI_CLOCK_GET_CLOCK_ATTRIBUTES)(
IN SCMI_CLOCK_PROTOCOL *This,
IN UINT32 ClockId,
OUT BOOLEAN *Enabled,
@ -159,7 +159,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES) (
(EFIAPI *SCMI_CLOCK_DESCRIBE_RATES)(
IN SCMI_CLOCK_PROTOCOL *This,
IN UINT32 ClockId,
OUT SCMI_CLOCK_RATE_FORMAT *Format,
@ -181,7 +181,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_RATE_GET) (
(EFIAPI *SCMI_CLOCK_RATE_GET)(
IN SCMI_CLOCK_PROTOCOL *This,
IN UINT32 ClockId,
OUT UINT64 *Rate
@ -199,7 +199,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_CLOCK_RATE_SET) (
(EFIAPI *SCMI_CLOCK_RATE_SET)(
IN SCMI_CLOCK_PROTOCOL *This,
IN UINT32 ClockId,
IN UINT64 Rate
@ -215,4 +215,3 @@ typedef struct _SCMI_CLOCK_PROTOCOL {
} SCMI_CLOCK_PROTOCOL;
#endif /* ARM_SCMI_CLOCK_PROTOCOL_H_ */

View File

@ -92,7 +92,7 @@ typedef struct {
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_GET_VERSION) (
(EFIAPI *SCMI_PERFORMANCE_GET_VERSION)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
OUT UINT32 *Version
);
@ -109,7 +109,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES) (
(EFIAPI *SCMI_PERFORMANCE_GET_ATTRIBUTES)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
OUT SCMI_PERFORMANCE_PROTOCOL_ATTRIBUTES *Attributes
@ -128,7 +128,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES) (
(EFIAPI *SCMI_PERFORMANCE_GET_DOMAIN_ATTRIBUTES)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
OUT SCMI_PERFORMANCE_DOMAIN_ATTRIBUTES *DomainAttributes
@ -153,7 +153,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS) (
(EFIAPI *SCMI_PERFORMANCE_DESCRIBE_LEVELS)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
OUT UINT32 *NumLevels,
@ -173,7 +173,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET) (
(EFIAPI *SCMI_PERFORMANCE_LIMITS_SET)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN SCMI_PERFORMANCE_LIMITS *Limits
@ -192,7 +192,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET) (
(EFIAPI *SCMI_PERFORMANCE_LIMITS_GET)(
SCMI_PERFORMANCE_PROTOCOL *This,
UINT32 DomainId,
SCMI_PERFORMANCE_LIMITS *Limits
@ -210,7 +210,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET) (
(EFIAPI *SCMI_PERFORMANCE_LEVEL_SET)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
IN UINT32 Level
@ -229,7 +229,7 @@ EFI_STATUS
**/
typedef
EFI_STATUS
(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET) (
(EFIAPI *SCMI_PERFORMANCE_LEVEL_GET)(
IN SCMI_PERFORMANCE_PROTOCOL *This,
IN UINT32 DomainId,
OUT UINT32 *Level
@ -256,4 +256,3 @@ typedef enum {
} SCMI_MESSAGE_ID_PERFORMANCE;
#endif /* ARM_SCMI_PERFORMANCE_PROTOCOL_H_ */

View File

@ -7,7 +7,6 @@
**/
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/BaseLib.h>
@ -25,7 +24,6 @@
#define MULT_U64_X_N MultU64x64
#endif
RETURN_STATUS
EFIAPI
TimerConstructor (
@ -36,7 +34,6 @@ TimerConstructor (
// Check if the ARM Generic Timer Extension is implemented.
//
if (ArmIsArchTimerImplemented ()) {
//
// Check if Architectural Timer frequency is pre-determined by the platform
// (ie. nonzero).
@ -49,7 +46,7 @@ TimerConstructor (
//
ASSERT (TICKS_PER_MICRO_SEC);
#ifdef MDE_CPU_ARM
#ifdef MDE_CPU_ARM
//
// Only set the frequency for ARMv7. We expect the secure firmware to
// have already done it.
@ -59,7 +56,8 @@ TimerConstructor (
if (ArmHasSecurityExtensions ()) {
ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
}
#endif
#endif
}
//
@ -68,9 +66,8 @@ TimerConstructor (
// If the reset value (0) is returned, just ASSERT.
//
ASSERT (ArmGenericTimerGetTimerFreq () != 0);
} else {
DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
DEBUG ((DEBUG_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));
ASSERT (0);
}
@ -96,10 +93,10 @@ GetPlatformTimerFreq (
if (TimerFreq == 0) {
TimerFreq = ArmGenericTimerGetTimerFreq ();
}
return TimerFreq;
}
/**
Stalls the CPU for the number of microseconds specified by MicroSeconds.
@ -141,7 +138,6 @@ MicroSecondDelay (
return MicroSeconds;
}
/**
Stalls the CPU for at least the given number of nanoseconds.
@ -219,13 +215,13 @@ GetPerformanceCounter (
UINT64
EFIAPI
GetPerformanceCounterProperties (
OUT UINT64 *StartValue, OPTIONAL
OUT UINT64 *StartValue OPTIONAL,
OUT UINT64 *EndValue OPTIONAL
)
{
if (StartValue != NULL) {
// Timer starts at 0
*StartValue = (UINT64)0ULL ;
*StartValue = (UINT64)0ULL;
}
if (EndValue != NULL) {
@ -267,7 +263,8 @@ GetTimeInNanoSecond (
DivU64x32Remainder (
Ticks,
TimerFreq,
&Remainder),
&Remainder
),
1000000000U
);
@ -277,8 +274,9 @@ GetTimeInNanoSecond (
//
NanoSeconds += DivU64x32 (
MULT_U64_X_N (
(UINT64) Remainder,
1000000000U),
(UINT64)Remainder,
1000000000U
),
TimerFreq
);

View File

@ -31,9 +31,10 @@ CacheRangeOperation (
// Perform the line operation on an address in each cache line
while (AlignedAddress < EndAddress) {
LineOperation(AlignedAddress);
LineOperation (AlignedAddress);
AlignedAddress += LineLength;
}
ArmDataSynchronizationBarrier ();
}
@ -62,11 +63,18 @@ InvalidateInstructionCacheRange (
IN UINTN Length
)
{
CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (Address, Length,
CacheRangeOperation (
Address,
Length,
ArmCleanDataCacheEntryToPoUByMVA,
ArmDataCacheLineLength ()
);
CacheRangeOperation (
Address,
Length,
ArmInvalidateInstructionCacheEntryToPoUByMVA,
ArmInstructionCacheLineLength ());
ArmInstructionCacheLineLength ()
);
ArmInstructionSynchronizationBarrier ();
@ -89,8 +97,12 @@ WriteBackInvalidateDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmCleanInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}
@ -110,8 +122,12 @@ WriteBackDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmCleanDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}
@ -122,7 +138,11 @@ InvalidateDataCacheRange (
IN UINTN Length
)
{
CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ());
CacheRangeOperation (
Address,
Length,
ArmInvalidateDataCacheEntryByMVA,
ArmDataCacheLineLength ()
);
return Address;
}

View File

@ -69,7 +69,6 @@ CHAR8 *gLdmStack[] = {
#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)])
#define SIGN(_U) ((_U) ? "" : "-")
#define WRITE(_Write) ((_Write) ? "!" : "")
#define BYTE(_B) ((_B) ? "B":"")
@ -110,9 +109,11 @@ MRegList (
}
}
}
if (First) {
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR");
}
AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}");
// BugBug: Make caller pass in buffer it is cleaner
@ -136,7 +137,6 @@ RotateRight (
return (Op >> Shift) | (Op << (32 - Shift));
}
/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
point to next instruction.
@ -181,7 +181,6 @@ DisassembleArmInstruction (
Rd = (OpCode >> 12) & 0xf;
Rm = (OpCode & 0xf);
if (Extended) {
Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode);
Buf += Index;
@ -197,6 +196,7 @@ DisassembleArmInstruction (
// A4.1.103 STREX{<cond>} <Rd>, <Rm>, [<Rn>]
AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]);
}
return;
}
@ -206,23 +206,25 @@ DisassembleArmInstruction (
// A4.1.20 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers>
// A4.1.21 LDM{<cond>}<addressing_mode> <Rn>, <registers_without_pc>^
// A4.1.22 LDM{<cond>}<addressing_mode> <Rn>{!}, <registers_and_pc>^
AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
} else {
// A4.1.97 STM{<cond>}<addressing_mode> <Rn>{!}, <registers>
// A4.1.98 STM{<cond>}<addressing_mode> <Rn>, <registers>^
AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack));
}
return;
}
// LDR/STR Address Mode 2
if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) {
if (((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000) == 0xf550f000)) {
Offset12 = OpCode & 0xfff;
if ((OpCode & 0xfd70f000 ) == 0xf550f000) {
if ((OpCode & 0xfd70f000) == 0xf550f000) {
Index = AsciiSPrint (Buf, Size, "PLD");
} else {
Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T":"", gReg[Rd]);
Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T" : "", gReg[Rd]);
}
if (Pre) {
if (!Imm) {
// A5.2.2 [<Rn>, #+/-<offset_12>]
@ -255,7 +257,8 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write));
}
} else { // !Pre
} else {
// !Pre
if (!Imm) {
// A5.2.8 [<Rn>], #+/-<offset_12>
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12);
@ -287,6 +290,7 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm);
}
}
return;
}
@ -337,6 +341,7 @@ DisassembleArmInstruction (
AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]);
}
}
return;
}
@ -371,15 +376,20 @@ DisassembleArmInstruction (
AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f));
} else {
IMod = (OpCode >> 18) & 0x3;
Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a",
(IMod == 3) ? "ID":"IE",
((OpCode & BIT8) != 0) ? "A":"",
((OpCode & BIT7) != 0) ? "I":"",
((OpCode & BIT6) != 0) ? "F":"");
Index = AsciiSPrint (
Buf,
Size,
"CPS%a %a%a%a",
(IMod == 3) ? "ID" : "IE",
((OpCode & BIT8) != 0) ? "A" : "",
((OpCode & BIT7) != 0) ? "I" : "",
((OpCode & BIT6) != 0) ? "F" : ""
);
if ((OpCode & BIT17) != 0) {
AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f);
}
}
return;
}
@ -395,7 +405,6 @@ DisassembleArmInstruction (
return;
}
if ((OpCode & 0x0db00000) == 0x01200000) {
// A4.1.38 MSR{<cond>} CPSR_<fields>, #<immediate> MSR{<cond>} CPSR_<fields>, <Rm>
if (Imm) {
@ -405,6 +414,7 @@ DisassembleArmInstruction (
// MSR{<cond>} CPSR_<fields>, <Rm>
AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]);
}
return;
}
@ -417,9 +427,9 @@ DisassembleArmInstruction (
if ((OpCode & 0x0e000000) == 0x0c000000) {
// A4.1.19 LDC and A4.1.96 SDC
if ((OpCode & 0xf0000000) == 0xf0000000) {
Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd);
Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC" : "SDC", (OpCode >> 8) & 0xf, Rd);
} else {
Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC" : "SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd);
}
if (!Pre) {
@ -434,18 +444,17 @@ DisassembleArmInstruction (
// A5.5.5.2 [<Rn>, #+/-<offset_8>*4 ]!
AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x*4]%a", gReg[Rn], SIGN (Up), OpCode & 0xff, WRITE (Write));
}
}
if ((OpCode & 0x0f000010) == 0x0e000010) {
// A4.1.32 MRC2, MCR2
AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC":"MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, CR%d, CR%d, 0x%x", Load ? "MRC" : "MCR", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], Rn, Rm, (OpCode >> 5) &0x7);
return;
}
if ((OpCode & 0x0ff00000) == 0x0c400000) {
// A4.1.33 MRRC2, MCRR2
AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC":"MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
AsciiSPrint (Buf, Size, "%a%a 0x%x, 0x%x, %a, %a, CR%d", Load ? "MRRC" : "MCRR", COND (OpCode), (OpCode >> 4) & 0xf, (OpCode >> 20) & 0xf, gReg[Rd], gReg[Rn], Rm);
return;
}
@ -454,4 +463,3 @@ DisassembleArmInstruction (
*OpCodePtr += 1;
return;
}

View File

@ -93,9 +93,6 @@ extern CHAR8 *gReg[];
#define THUMB2_MRS 235
#define THUMB2_MSR 236
typedef struct {
CHAR8 *Start;
UINT32 OpCode;
@ -104,109 +101,108 @@ typedef struct {
} THUMB_INSTRUCTIONS;
THUMB_INSTRUCTIONS gOpThumb[] = {
// Thumb 16-bit instructions
// Op Mask Format
{ "ADC" , 0x4140, 0xffc0, DATA_FORMAT5 }, // ADC <Rndn>, <Rm>
// Thumb 16-bit instructions
// Op Mask Format
{ "ADC", 0x4140, 0xffc0, DATA_FORMAT5 }, // ADC <Rndn>, <Rm>
{ "ADR", 0xa000, 0xf800, ADR_FORMAT }, // ADR <Rd>, <label>
{ "ADD" , 0x1c00, 0xfe00, DATA_FORMAT2 },
{ "ADD" , 0x3000, 0xf800, DATA_FORMAT3 },
{ "ADD" , 0x1800, 0xfe00, DATA_FORMAT1 },
{ "ADD" , 0x4400, 0xff00, DATA_FORMAT8 }, // A8.6.9
{ "ADD" , 0xa000, 0xf100, DATA_FORMAT6_PC },
{ "ADD" , 0xa800, 0xf800, DATA_FORMAT6_SP },
{ "ADD" , 0xb000, 0xff80, DATA_FORMAT7 },
{ "ADD", 0x1c00, 0xfe00, DATA_FORMAT2 },
{ "ADD", 0x3000, 0xf800, DATA_FORMAT3 },
{ "ADD", 0x1800, 0xfe00, DATA_FORMAT1 },
{ "ADD", 0x4400, 0xff00, DATA_FORMAT8 }, // A8.6.9
{ "ADD", 0xa000, 0xf100, DATA_FORMAT6_PC },
{ "ADD", 0xa800, 0xf800, DATA_FORMAT6_SP },
{ "ADD", 0xb000, 0xff80, DATA_FORMAT7 },
{ "AND" , 0x4000, 0xffc0, DATA_FORMAT5 },
{ "AND", 0x4000, 0xffc0, DATA_FORMAT5 },
{ "ASR" , 0x1000, 0xf800, DATA_FORMAT4 },
{ "ASR" , 0x4100, 0xffc0, DATA_FORMAT5 },
{ "ASR", 0x1000, 0xf800, DATA_FORMAT4 },
{ "ASR", 0x4100, 0xffc0, DATA_FORMAT5 },
{ "B" , 0xd000, 0xf000, CONDITIONAL_BRANCH },
{ "B" , 0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT },
{ "BLX" , 0x4780, 0xff80, BRANCH_EXCHANGE },
{ "BX" , 0x4700, 0xff87, BRANCH_EXCHANGE },
{ "B", 0xd000, 0xf000, CONDITIONAL_BRANCH },
{ "B", 0xe000, 0xf800, UNCONDITIONAL_BRANCH_SHORT },
{ "BLX", 0x4780, 0xff80, BRANCH_EXCHANGE },
{ "BX", 0x4700, 0xff87, BRANCH_EXCHANGE },
{ "BIC" , 0x4380, 0xffc0, DATA_FORMAT5 },
{ "BIC", 0x4380, 0xffc0, DATA_FORMAT5 },
{ "BKPT", 0xdf00, 0xff00, IMMED_8 },
{ "CBZ", 0xb100, 0xfd00, DATA_CBZ },
{ "CBNZ", 0xb900, 0xfd00, DATA_CBZ },
{ "CMN" , 0x42c0, 0xffc0, DATA_FORMAT5 },
{ "CMN", 0x42c0, 0xffc0, DATA_FORMAT5 },
{ "CMP" , 0x2800, 0xf800, DATA_FORMAT3 },
{ "CMP" , 0x4280, 0xffc0, DATA_FORMAT5 },
{ "CMP" , 0x4500, 0xff00, DATA_FORMAT8 },
{ "CMP", 0x2800, 0xf800, DATA_FORMAT3 },
{ "CMP", 0x4280, 0xffc0, DATA_FORMAT5 },
{ "CMP", 0x4500, 0xff00, DATA_FORMAT8 },
{ "CPS" , 0xb660, 0xffe8, CPS_FORMAT },
{ "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
{ "EOR" , 0x4040, 0xffc0, DATA_FORMAT5 },
{ "CPS", 0xb660, 0xffe8, CPS_FORMAT },
{ "MOV", 0x4600, 0xff00, DATA_FORMAT8 },
{ "EOR", 0x4040, 0xffc0, DATA_FORMAT5 },
{ "LDMIA" , 0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
{ "LDR" , 0x6800, 0xf800, LOAD_STORE_FORMAT1 }, // LDR <Rt>, [<Rn> {,#<imm>}]
{ "LDR" , 0x5800, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDR" , 0x4800, 0xf800, LOAD_STORE_FORMAT3 },
{ "LDR" , 0x9800, 0xf800, LOAD_STORE_FORMAT4 }, // LDR <Rt>, [SP, #<imm>]
{ "LDRB" , 0x7800, 0xf800, LOAD_STORE_FORMAT1_B },
{ "LDRB" , 0x5c00, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDRH" , 0x8800, 0xf800, LOAD_STORE_FORMAT1_H },
{ "LDRH" , 0x7a00, 0xfe00, LOAD_STORE_FORMAT2 },
{ "LDRSB" , 0x5600, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDRSH" , 0x5e00, 0xfe00, LOAD_STORE_FORMAT2 },
{ "LDMIA", 0xc800, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
{ "LDR", 0x6800, 0xf800, LOAD_STORE_FORMAT1 }, // LDR <Rt>, [<Rn> {,#<imm>}]
{ "LDR", 0x5800, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDR", 0x4800, 0xf800, LOAD_STORE_FORMAT3 },
{ "LDR", 0x9800, 0xf800, LOAD_STORE_FORMAT4 }, // LDR <Rt>, [SP, #<imm>]
{ "LDRB", 0x7800, 0xf800, LOAD_STORE_FORMAT1_B },
{ "LDRB", 0x5c00, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDRH", 0x8800, 0xf800, LOAD_STORE_FORMAT1_H },
{ "LDRH", 0x7a00, 0xfe00, LOAD_STORE_FORMAT2 },
{ "LDRSB", 0x5600, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "LDRSH", 0x5e00, 0xfe00, LOAD_STORE_FORMAT2 },
{ "MOVS", 0x0000, 0xffc0, DATA_FORMAT5 }, // LSL with imm5 == 0 is a MOVS, so this must go before LSL
{ "LSL" , 0x0000, 0xf800, DATA_FORMAT4 },
{ "LSL" , 0x4080, 0xffc0, DATA_FORMAT5 },
{ "LSR" , 0x0001, 0xf800, DATA_FORMAT4 },
{ "LSR" , 0x40c0, 0xffc0, DATA_FORMAT5 },
{ "LSL", 0x0000, 0xf800, DATA_FORMAT4 },
{ "LSL", 0x4080, 0xffc0, DATA_FORMAT5 },
{ "LSR", 0x0001, 0xf800, DATA_FORMAT4 },
{ "LSR", 0x40c0, 0xffc0, DATA_FORMAT5 },
{ "LSRS", 0x0800, 0xf800, DATA_FORMAT4 }, // LSRS <Rd>, <Rm>, #<imm5>
{ "MOVS", 0x2000, 0xf800, DATA_FORMAT3 },
{ "MOV" , 0x1c00, 0xffc0, DATA_FORMAT3 },
{ "MOV" , 0x4600, 0xff00, DATA_FORMAT8 },
{ "MOV", 0x1c00, 0xffc0, DATA_FORMAT3 },
{ "MOV", 0x4600, 0xff00, DATA_FORMAT8 },
{ "MUL" , 0x4340, 0xffc0, DATA_FORMAT5 },
{ "MVN" , 0x41c0, 0xffc0, DATA_FORMAT5 },
{ "NEG" , 0x4240, 0xffc0, DATA_FORMAT5 },
{ "ORR" , 0x4300, 0xffc0, DATA_FORMAT5 },
{ "POP" , 0xbc00, 0xfe00, POP_FORMAT },
{ "MUL", 0x4340, 0xffc0, DATA_FORMAT5 },
{ "MVN", 0x41c0, 0xffc0, DATA_FORMAT5 },
{ "NEG", 0x4240, 0xffc0, DATA_FORMAT5 },
{ "ORR", 0x4300, 0xffc0, DATA_FORMAT5 },
{ "POP", 0xbc00, 0xfe00, POP_FORMAT },
{ "PUSH", 0xb400, 0xfe00, PUSH_FORMAT },
{ "REV" , 0xba00, 0xffc0, DATA_FORMAT5 },
{ "REV16" , 0xba40, 0xffc0, DATA_FORMAT5 },
{ "REVSH" , 0xbac0, 0xffc0, DATA_FORMAT5 },
{ "REV", 0xba00, 0xffc0, DATA_FORMAT5 },
{ "REV16", 0xba40, 0xffc0, DATA_FORMAT5 },
{ "REVSH", 0xbac0, 0xffc0, DATA_FORMAT5 },
{ "ROR" , 0x41c0, 0xffc0, DATA_FORMAT5 },
{ "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
{ "SETEND" , 0xb650, 0xfff0, ENDIAN_FORMAT },
{ "ROR", 0x41c0, 0xffc0, DATA_FORMAT5 },
{ "SBC", 0x4180, 0xffc0, DATA_FORMAT5 },
{ "SETEND", 0xb650, 0xfff0, ENDIAN_FORMAT },
{ "STMIA" , 0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
{ "STR" , 0x6000, 0xf800, LOAD_STORE_FORMAT1 }, // STR <Rt>, [<Rn> {,#<imm>}]
{ "STR" , 0x5000, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "STR" , 0x9000, 0xf800, LOAD_STORE_FORMAT4 }, // STR <Rt>, [SP, #<imm>]
{ "STRB" , 0x7000, 0xf800, LOAD_STORE_FORMAT1_B }, // STRB <Rt>, [<Rn>, #<imm5>]
{ "STRB" , 0x5400, 0xfe00, LOAD_STORE_FORMAT2 }, // STRB <Rt>, [<Rn>, <Rm>]
{ "STRH" , 0x8000, 0xf800, LOAD_STORE_FORMAT1_H }, // STRH <Rt>, [<Rn>{,#<imm>}]
{ "STRH" , 0x5200, 0xfe00, LOAD_STORE_FORMAT2 }, // STRH <Rt>, [<Rn>, <Rm>]
{ "STMIA", 0xc000, 0xf800, LOAD_STORE_MULTIPLE_FORMAT1 },
{ "STR", 0x6000, 0xf800, LOAD_STORE_FORMAT1 }, // STR <Rt>, [<Rn> {,#<imm>}]
{ "STR", 0x5000, 0xfe00, LOAD_STORE_FORMAT2 }, // STR <Rt>, [<Rn>, <Rm>]
{ "STR", 0x9000, 0xf800, LOAD_STORE_FORMAT4 }, // STR <Rt>, [SP, #<imm>]
{ "STRB", 0x7000, 0xf800, LOAD_STORE_FORMAT1_B }, // STRB <Rt>, [<Rn>, #<imm5>]
{ "STRB", 0x5400, 0xfe00, LOAD_STORE_FORMAT2 }, // STRB <Rt>, [<Rn>, <Rm>]
{ "STRH", 0x8000, 0xf800, LOAD_STORE_FORMAT1_H }, // STRH <Rt>, [<Rn>{,#<imm>}]
{ "STRH", 0x5200, 0xfe00, LOAD_STORE_FORMAT2 }, // STRH <Rt>, [<Rn>, <Rm>]
{ "SUB" , 0x1e00, 0xfe00, DATA_FORMAT2 },
{ "SUB" , 0x3800, 0xf800, DATA_FORMAT3 },
{ "SUB" , 0x1a00, 0xfe00, DATA_FORMAT1 },
{ "SUB" , 0xb080, 0xff80, DATA_FORMAT7 },
{ "SUB", 0x1e00, 0xfe00, DATA_FORMAT2 },
{ "SUB", 0x3800, 0xf800, DATA_FORMAT3 },
{ "SUB", 0x1a00, 0xfe00, DATA_FORMAT1 },
{ "SUB", 0xb080, 0xff80, DATA_FORMAT7 },
{ "SBC" , 0x4180, 0xffc0, DATA_FORMAT5 },
{ "SBC", 0x4180, 0xffc0, DATA_FORMAT5 },
{ "SWI" , 0xdf00, 0xff00, IMMED_8 },
{ "SWI", 0xdf00, 0xff00, IMMED_8 },
{ "SXTB", 0xb240, 0xffc0, DATA_FORMAT5 },
{ "SXTH", 0xb200, 0xffc0, DATA_FORMAT5 },
{ "TST" , 0x4200, 0xffc0, DATA_FORMAT5 },
{ "TST", 0x4200, 0xffc0, DATA_FORMAT5 },
{ "UXTB", 0xb2c0, 0xffc0, DATA_FORMAT5 },
{ "UXTH", 0xb280, 0xffc0, DATA_FORMAT5 },
{ "IT", 0xbf00, 0xff00, IT_BLOCK }
};
THUMB_INSTRUCTIONS gOpThumb2[] = {
//Instruct OpCode OpCode Mask Addressig Mode
// Instruct OpCode OpCode Mask Addressig Mode
{ "ADR", 0xf2af0000, 0xfbff8000, ADR_THUMB2 }, // ADDR <Rd>, <label> ;Needs to go before ADDW
{ "CMN", 0xf1100f00, 0xfff08f00, CMN_THUMB2 }, // CMN <Rn>, #<const> ;Needs to go before ADD
@ -281,7 +277,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "MLA", 0xfb000000, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
{ "MLS", 0xfb000010, 0xfff000f0, THUMB2_4REGS }, // MLA <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABB", 0xfb100000, 0xfff000f0, THUMB2_4REGS }, // SMLABB <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABT", 0xfb100010, 0xfff000f0, THUMB2_4REGS }, // SMLABT <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLABB", 0xfb100020, 0xfff000f0, THUMB2_4REGS }, // SMLATB <Rd>, <Rn>, <Rm>, <Ra>
@ -298,7 +293,6 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "SMLAD", 0xfb200000, 0xfff000f0, THUMB2_4REGS }, // SMLAD <Rd>, <Rn>, <Rm>, <Ra>
{ "SMLADX", 0xfb200010, 0xfff000f0, THUMB2_4REGS }, // SMLADX <Rd>, <Rn>, <Rm>, <Ra>
{ "B", 0xf0008000, 0xf800d000, B_T3 }, // B<c> <label>
{ "B", 0xf0009000, 0xf800d000, B_T4 }, // B<c> <label>
{ "BL", 0xf000d000, 0xf800d000, B_T4 }, // BL<c> <label>
@ -308,9 +302,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "POP", 0xf85d0b04, 0xffff0fff, POP_T3 }, // POP <register>
{ "PUSH", 0xe8ad0000, 0xffffa000, POP_T2 }, // PUSH <registers>
{ "PUSH", 0xf84d0d04, 0xffff0fff, POP_T3 }, // PUSH <register>
{ "STM" , 0xe8800000, 0xffd0a000, STM_FORMAT }, // STM <Rn>{!},<registers>
{ "STM", 0xe8800000, 0xffd0a000, STM_FORMAT }, // STM <Rn>{!},<registers>
{ "STMDB", 0xe9800000, 0xffd0a000, STM_FORMAT }, // STMDB <Rn>{!},<registers>
{ "LDM" , 0xe8900000, 0xffd02000, STM_FORMAT }, // LDM <Rn>{!},<registers>
{ "LDM", 0xe8900000, 0xffd02000, STM_FORMAT }, // LDM <Rn>{!},<registers>
{ "LDMDB", 0xe9100000, 0xffd02000, STM_FORMAT }, // LDMDB <Rn>{!},<registers>
{ "LDR", 0xf8d00000, 0xfff00000, LDM_REG_IMM12 }, // LDR <rt>, [<rn>, {, #<imm12>]}
@ -335,9 +329,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "LDRBT", 0xf8100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRBT <rt>, [<rn>, {, #<imm8>]}
{ "LDRHT", 0xf8300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]}
{ "LDRSB", 0xf9100800, 0xfff00800, LDM_REG_IMM8 }, // LDRHT <rt>, [<rn>, {, #<imm8>]} {!} form?
{ "LDRSBT",0xf9100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHBT <rt>, [<rn>, {, #<imm8>]} {!} form?
{ "LDRSH" ,0xf9300800, 0xfff00800, LDM_REG_IMM8 }, // LDRSH <rt>, [<rn>, {, #<imm8>]}
{ "LDRSHT",0xf9300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRSHT <rt>, [<rn>, {, #<imm8>]}
{ "LDRSBT", 0xf9100e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRHBT <rt>, [<rn>, {, #<imm8>]} {!} form?
{ "LDRSH", 0xf9300800, 0xfff00800, LDM_REG_IMM8 }, // LDRSH <rt>, [<rn>, {, #<imm8>]}
{ "LDRSHT", 0xf9300e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRSHT <rt>, [<rn>, {, #<imm8>]}
{ "LDRT", 0xf8500e00, 0xfff00f00, LDM_REG_IMM8 }, // LDRT <rt>, [<rn>, {, #<imm8>]}
{ "LDRD", 0xe8500000, 0xfe500000, LDRD_REG_IMM8_SIGNED }, // LDRD <rt>, <rt2>, [<rn>, {, #<imm8>]}{!}
@ -372,9 +366,9 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
{ "STREXD", 0xe8d00f4f, 0xfff00fff, LDREXD }, // STREXD <Rd>, <Rt>, <Rt2>, [<Rn>]
{ "SRSDB", 0xe80dc000, 0xffdffff0, SRS_FORMAT }, // SRSDB<c> SP{!},#<mode>
{ "SRS" , 0xe98dc000, 0xffdffff0, SRS_FORMAT }, // SRS{IA}<c> SP{!},#<mode>
{ "SRS", 0xe98dc000, 0xffdffff0, SRS_FORMAT }, // SRS{IA}<c> SP{!},#<mode>
{ "RFEDB", 0xe810c000, 0xffd0ffff, RFE_FORMAT }, // RFEDB<c> <Rn>{!}
{ "RFE" , 0xe990c000, 0xffd0ffff, RFE_FORMAT } // RFE{IA}<c> <Rn>{!}
{ "RFE", 0xe990c000, 0xffd0ffff, RFE_FORMAT } // RFE{IA}<c> <Rn>{!}
};
CHAR8 *gShiftType[] = {
@ -419,9 +413,11 @@ ThumbMRegList (
}
}
}
if (First) {
AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "ERROR");
}
AsciiStrCatS (mThumbMregListStr, sizeof mThumbMregListStr, "}");
// BugBug: Make caller pass in buffer it is cleaner
@ -490,7 +486,7 @@ DisassembleThumbInstruction (
BOOLEAN H1Bit; // H1
BOOLEAN H2Bit; // H2
BOOLEAN IMod; // imod
//BOOLEAN ItFlag;
// BOOLEAN ItFlag;
UINT32 Pc, Target, MsBit, LsBit;
CHAR8 *Cond;
BOOLEAN Sign; // S
@ -521,6 +517,7 @@ DisassembleThumbInstruction (
*OpCodePtrPtr += 1;
// Manage IT Block ItFlag TRUE means we are in an IT block
/*if (*ItBlock != 0) {
ItFlag = TRUE;
*ItBlock -= 1;
@ -535,6 +532,7 @@ DisassembleThumbInstruction (
} else {
Offset = AsciiSPrint (Buf, Size, "%-6a", gOpThumb[Index].Start);
}
switch (gOpThumb[Index].AddressMode) {
case LOAD_STORE_FORMAT1:
// A6.5.1 <Rd>, [<Rn>, #<5_bit_offset>]
@ -579,7 +577,6 @@ DisassembleThumbInstruction (
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", ThumbMRegList ((OpCode & 0xff) | ((OpCode & BIT8) == BIT8 ? BIT14 : 0)));
return;
case IMMED_8:
// A6.7 <immed_8>
AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%x", OpCode & 0xff);
@ -600,7 +597,7 @@ DisassembleThumbInstruction (
case BRANCH_EXCHANGE:
// A6.3.3 BX|BLX <Rm>
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2Bit ? 8:0)]);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gReg[Rn | (H2Bit ? 8 : 0)]);
return;
case DATA_FORMAT1:
@ -637,17 +634,17 @@ DisassembleThumbInstruction (
return;
case DATA_FORMAT8:
// A6.4.3 <Rd>|<Rn>, <Rm>
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1Bit ? 8:0)], gReg[Rn | (H2Bit ? 8:0)]);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[Rd | (H1Bit ? 8 : 0)], gReg[Rn | (H2Bit ? 8 : 0)]);
return;
case CPS_FORMAT:
// A7.1.24
AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", IMod ? "ID":"IE", ((OpCode & BIT2) == 0) ? "":"a", ((OpCode & BIT1) == 0) ? "":"i", ((OpCode & BIT0) == 0) ? "":"f");
AsciiSPrint (&Buf[Offset], Size - Offset, "%a %a%a%a", IMod ? "ID" : "IE", ((OpCode & BIT2) == 0) ? "" : "a", ((OpCode & BIT1) == 0) ? "" : "i", ((OpCode & BIT0) == 0) ? "" : "f");
return;
case ENDIAN_FORMAT:
// A7.1.24
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE":"BE");
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", (OpCode & BIT3) == 0 ? "LE" : "BE");
return;
case DATA_CBZ:
@ -674,23 +671,23 @@ DisassembleThumbInstruction (
Mask = (OpCode & 0xf);
if ((Mask & 0x1) == 0x1) {
*ItBlock = 4;
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E", (Mask & BIT1)?"T":"E");
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a%a", (Mask & BIT3) ? "T" : "E", (Mask & BIT2) ? "T" : "E", (Mask & BIT1) ? "T" : "E");
} else if ((OpCode & 0x3) == 0x2) {
*ItBlock = 3;
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3)?"T":"E", (Mask & BIT2)?"T":"E");
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a%a", (Mask & BIT3) ? "T" : "E", (Mask & BIT2) ? "T" : "E");
} else if ((OpCode & 0x7) == 0x4) {
*ItBlock = 2;
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3)?"T":"E");
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, "%a", (Mask & BIT3) ? "T" : "E");
} else if ((OpCode & 0xf) == 0x8) {
*ItBlock = 1;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a", gCondition[(OpCode >> 4) & 0xf]);
return;
}
}
}
// Thumb2 are 32-bit instructions
*OpCodePtrPtr += 1;
Rt = (OpCode32 >> 12) & 0xf;
@ -705,6 +702,7 @@ DisassembleThumbInstruction (
} else {
Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
}
switch (gOpThumb2[Index].AddressMode) {
case B_T3:
Cond = gCondition[(OpCode32 >> 22) & 0xf];
@ -712,9 +710,9 @@ DisassembleThumbInstruction (
Buf[Offset-4] = *Cond;
// S:J2:J1:imm6:imm11:0
Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3f000);
Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0; // J2
Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0; // J1
Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0; // S
Target |= ((OpCode32 & BIT11) == BIT11) ? BIT19 : 0; // J2
Target |= ((OpCode32 & BIT13) == BIT13) ? BIT18 : 0; // J1
Target |= ((OpCode32 & BIT26) == BIT26) ? BIT20 : 0; // S
Target = SignExtend32 (Target, BIT20);
AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Pc + 4 + Target);
return;
@ -757,7 +755,7 @@ DisassembleThumbInstruction (
case STM_FORMAT:
// <Rn>{!}, <registers>
WriteBack = (OpCode32 & BIT21) == BIT21;
AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], WriteBack ? "!":"", ThumbMRegList (OpCode32 & 0xffff));
AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, %a", gReg[(OpCode32 >> 16) & 0xf], WriteBack ? "!" : "", ThumbMRegList (OpCode32 & 0xffff));
return;
case LDM_REG_IMM12_SIGNED:
@ -767,6 +765,7 @@ DisassembleThumbInstruction (
// U == 0 means subtrack, U == 1 means add
Target = -Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a", gReg[(OpCode32 >> 12) & 0xf], PcAlign4 (Pc) + Target);
return;
@ -778,6 +777,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL #%d]", (OpCode32 >> 4) & 3);
}
return;
case LDM_REG_IMM12:
@ -788,6 +788,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", #0x%x]", OpCode32 & 0xfff);
}
return;
case LDM_REG_IMM8:
@ -798,13 +799,14 @@ DisassembleThumbInstruction (
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, [%a", gReg[Rt], gReg[Rn]);
if (Pre) {
if ((OpCode32 & 0xff) == 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", WriteBack?"!":"");
AsciiSPrint (&Buf[Offset], Size - Offset, "]%a", WriteBack ? "!" : "");
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-" , OpCode32 & 0xff, WriteBack?"!":"");
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd ? "" : "-", OpCode32 & 0xff, WriteBack ? "!" : "");
}
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd?"":"-", OpCode32 & 0xff);
AsciiSPrint (&Buf[Offset], Size - Offset, "], #%a0x%x", UAdd ? "" : "-", OpCode32 & 0xff);
}
return;
case LDRD_REG_IMM8_SIGNED:
@ -817,13 +819,14 @@ DisassembleThumbInstruction (
if ((OpCode32 & 0xff) == 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, "]");
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd?"":"-", (OpCode32 & 0xff) << 2, WriteBack?"!":"");
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x]%a", UAdd ? "" : "-", (OpCode32 & 0xff) << 2, WriteBack ? "!" : "");
}
} else {
if ((OpCode32 & 0xff) != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd?"":"-", (OpCode32 & 0xff) << 2);
AsciiSPrint (&Buf[Offset], Size - Offset, ", #%a0x%x", UAdd ? "" : "-", (OpCode32 & 0xff) << 2);
}
}
return;
case LDRD_REG_IMM8:
@ -833,6 +836,7 @@ DisassembleThumbInstruction (
// U == 0 means subtrack, U == 1 means add
Target = -Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rt], gReg[Rt2], Pc + 4 + Target);
return;
@ -849,13 +853,13 @@ DisassembleThumbInstruction (
case SRS_FORMAT:
// SP{!}, #<mode>
WriteBack = (OpCode32 & BIT21) == BIT21;
AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", WriteBack?"!":"", OpCode32 & 0x1f);
AsciiSPrint (&Buf[Offset], Size - Offset, " SP%a, #0x%x", WriteBack ? "!" : "", OpCode32 & 0x1f);
return;
case RFE_FORMAT:
// <Rn>{!}
WriteBack = (OpCode32 & BIT21) == BIT21;
AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], WriteBack?"!":"");
AsciiSPrint (&Buf[Offset], Size - Offset, " %a%a, #0x%x", gReg[Rn], WriteBack ? "!" : "");
return;
case ADD_IMM12:
@ -863,6 +867,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #0x%x", gReg[Rd], gReg[Rn], Target);
return;
@ -872,6 +877,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = (OpCode32 & 0xff) | ((OpCode32 >> 4) & 0x700) | ((OpCode & BIT26) == BIT26 ? BIT11 : 0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #0x%x", gReg[Rd], Target);
return;
@ -888,11 +894,13 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
Offset += AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, %a", gReg[Rd], gReg[Rn], gReg[Rm]);
if (Target != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
}
return;
case ADD_IMM5_2REG:
@ -903,12 +911,12 @@ DisassembleThumbInstruction (
AsciiSPrint (&Buf[Offset], Size - Offset, ", LSL %d", gShiftType[(OpCode >> 5) & 3], Target);
}
case ASR_IMM5:
// ARS <Rd>, <Rm> #<const>} imm3:imm2
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
Target = ((OpCode32 >> 6) & 3) | ((OpCode32 >> 10) & 0x1c0);
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a #%d", gReg[Rd], gReg[Rm], Target);
return;
@ -918,6 +926,7 @@ DisassembleThumbInstruction (
if ((OpCode32 & BIT20) == BIT20) {
Buf[Offset - 3] = 'S'; // assume %-6a
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a %a", gReg[Rd], gReg[Rn], gReg[Rm]);
return;
@ -929,6 +938,7 @@ DisassembleThumbInstruction (
} else {
Target = PcAlign4 (Pc) + Target;
}
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, 0x%08x", gReg[Rd], Target);
return;
@ -942,7 +952,7 @@ DisassembleThumbInstruction (
// BFI <Rd>, <Rn>, #<lsb>, #<width>
MsBit = OpCode32 & 0x1f;
LsBit = ((OpCode32 >> 6) & 3) | ((OpCode >> 10) & 0x1c);
if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)){
if ((Rn == 0xf) & (AsciiStrCmp (gOpThumb2[Index].Start, "BFC") == 0)) {
// BFC <Rd>, #<lsb>, #<width>
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, #%d, #%d", gReg[Rd], LsBit, MsBit - LsBit + 1);
} else if (AsciiStrCmp (gOpThumb2[Index].Start, "BFI") == 0) {
@ -950,6 +960,7 @@ DisassembleThumbInstruction (
} else {
AsciiSPrint (&Buf[Offset], Size - Offset, " %a, %a, #%d, #%d", gReg[Rd], gReg[Rn], LsBit, MsBit + 1);
}
return;
case CPD_THUMB2:
@ -964,6 +975,7 @@ DisassembleThumbInstruction (
if (Opc2 != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
}
return;
case MRC_THUMB2:
@ -977,6 +989,7 @@ DisassembleThumbInstruction (
if (Opc2 != 0) {
AsciiSPrint (&Buf[Offset], Size - Offset, ",#%d,", Opc2);
}
return;
case MRRC_THUMB2:
@ -1006,7 +1019,7 @@ DisassembleThumbInstruction (
case THUMB2_MSR:
// MRS CPSR_<fields>, <Rd>
Target = (OpCode32 >> 10) & 3;
AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "":"f", (Target & 1) == 0 ? "":"s", gReg[Rd]);
AsciiSPrint (&Buf[Offset], Size - Offset, " CPSR_%a%a, %a", (Target & 2) == 0 ? "" : "f", (Target & 1) == 0 ? "" : "s", gReg[Rd]);
return;
case THUMB2_NO_ARGS:
@ -1019,8 +1032,6 @@ DisassembleThumbInstruction (
AsciiSPrint (Buf, Size, "0x%08x", OpCode32);
}
VOID
DisassembleArmInstruction (
IN UINT32 **OpCodePtr,
@ -1029,7 +1040,6 @@ DisassembleArmInstruction (
IN BOOLEAN Extended
);
/**
Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to
point to next instruction.
@ -1061,4 +1071,3 @@ DisassembleInstruction (
DisassembleArmInstruction ((UINT32 **)OpCodePtr, Buf, Size, Extended);
}
}

View File

@ -40,13 +40,13 @@ ArchVectorConfig (
(VOID *)(((UINTN)mNewStackBase + EL0_STACK_SIZE) & ~0xFUL)
);
if (ArmReadCurrentEL() == AARCH64_EL2) {
HcrReg = ArmReadHcr();
if (ArmReadCurrentEL () == AARCH64_EL2) {
HcrReg = ArmReadHcr ();
// Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
HcrReg |= ARM_HCR_TGE;
ArmWriteHcr(HcrReg);
ArmWriteHcr (HcrReg);
}
return RETURN_SUCCESS;

View File

@ -34,11 +34,10 @@ ArchVectorConfig (
// if the vector address corresponds to high vectors
if (VectorBaseAddress == 0xFFFF0000) {
// set SCTLR.V to enable high vectors
ArmSetHighVectors();
}
else {
ArmSetHighVectors ();
} else {
// Set SCTLR.V to 0 to enable VBAR to be used
ArmSetLowVectors();
ArmSetLowVectors ();
}
return RETURN_SUCCESS;

View File

@ -22,28 +22,29 @@
STATIC
RETURN_STATUS
CopyExceptionHandlers(
CopyExceptionHandlers (
IN PHYSICAL_ADDRESS BaseAddress
);
EFI_STATUS
EFIAPI
RegisterExceptionHandler(
RegisterExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
);
VOID
ExceptionHandlersStart(
ExceptionHandlersStart (
VOID
);
VOID
ExceptionHandlersEnd(
ExceptionHandlersEnd (
VOID
);
RETURN_STATUS ArchVectorConfig(
RETURN_STATUS
ArchVectorConfig (
IN UINTN VectorBaseAddress
);
@ -60,13 +61,12 @@ extern UINTN gDebuggerNoHandlerValue;
// address this at library build time. Since this affects the build of the
// library we cannot represent this in a PCD since PCDs are evaluated on
// a per-module basis.
#if defined(ARM_RELOCATE_VECTORS)
#if defined (ARM_RELOCATE_VECTORS)
STATIC CONST BOOLEAN gArmRelocateVectorTable = TRUE;
#else
STATIC CONST BOOLEAN gArmRelocateVectorTable = FALSE;
#endif
/**
Initializes all CPU exceptions entries and provides the default exception handlers.
@ -85,7 +85,7 @@ with default exception handlers.
**/
EFI_STATUS
EFIAPI
InitializeCpuExceptionHandlers(
InitializeCpuExceptionHandlers (
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
)
{
@ -96,12 +96,10 @@ InitializeCpuExceptionHandlers(
// if we are requested to copy exception handlers to another location
if (gArmRelocateVectorTable) {
VectorBase = PcdGet64(PcdCpuVectorBaseAddress);
Status = CopyExceptionHandlers(VectorBase);
}
else { // use VBAR to point to where our exception handlers are
VectorBase = PcdGet64 (PcdCpuVectorBaseAddress);
Status = CopyExceptionHandlers (VectorBase);
} else {
// use VBAR to point to where our exception handlers are
// The vector table must be aligned for the architecture. If this
// assertion fails ensure the appropriate FFS alignment is in effect,
@ -110,7 +108,7 @@ InitializeCpuExceptionHandlers(
// for AArch64 Align=4K is required. Align=Auto can be used but this
// is known to cause an issue with populating the reset vector area
// for encapsulated FVs.
ASSERT(((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
ASSERT (((UINTN)ExceptionHandlersStart & gExceptionVectorAlignmentMask) == 0);
// We do not copy the Exception Table at PcdGet64(PcdCpuVectorBaseAddress). We just set Vector
// Base Address to point into CpuDxe code.
@ -119,12 +117,12 @@ InitializeCpuExceptionHandlers(
Status = RETURN_SUCCESS;
}
if (!RETURN_ERROR(Status)) {
if (!RETURN_ERROR (Status)) {
// call the architecture-specific routine to prepare for the new vector
// configuration to take effect
ArchVectorConfig(VectorBase);
ArchVectorConfig (VectorBase);
ArmWriteVBar(VectorBase);
ArmWriteVBar (VectorBase);
}
return RETURN_SUCCESS;
@ -148,7 +146,7 @@ with default exception handlers.
**/
STATIC
RETURN_STATUS
CopyExceptionHandlers(
CopyExceptionHandlers (
IN PHYSICAL_ADDRESS BaseAddress
)
{
@ -167,37 +165,35 @@ CopyExceptionHandlers(
VectorBase = (UINT32 *)(UINTN)BaseAddress;
if (FeaturePcdGet(PcdDebuggerExceptionSupport) == TRUE) {
if (FeaturePcdGet (PcdDebuggerExceptionSupport) == TRUE) {
// Save existing vector table, in case debugger is already hooked in
CopyMem((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
CopyMem ((VOID *)gDebuggerExceptionHandlers, (VOID *)VectorBase, sizeof (EFI_EXCEPTION_CALLBACK)* (gMaxExceptionNumber+1));
}
// Copy our assembly code into the page that contains the exception vectors.
CopyMem((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
CopyMem ((VOID *)VectorBase, (VOID *)ExceptionHandlersStart, Length);
//
// Initialize the C entry points for interrupts
//
for (Index = 0; Index <= gMaxExceptionNumber; Index++) {
if (!FeaturePcdGet(PcdDebuggerExceptionSupport) ||
(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue)) {
Status = RegisterExceptionHandler(Index, NULL);
ASSERT_EFI_ERROR(Status);
}
else {
if (!FeaturePcdGet (PcdDebuggerExceptionSupport) ||
(gDebuggerExceptionHandlers[Index] == 0) || (gDebuggerExceptionHandlers[Index] == (VOID *)gDebuggerNoHandlerValue))
{
Status = RegisterExceptionHandler (Index, NULL);
ASSERT_EFI_ERROR (Status);
} else {
// If the debugger has already hooked put its vector back
VectorBase[Index] = (UINT32)(UINTN)gDebuggerExceptionHandlers[Index];
}
}
// Flush Caches since we updated executable stuff
InvalidateInstructionCacheRange((VOID *)(UINTN)BaseAddress, Length);
InvalidateInstructionCacheRange ((VOID *)(UINTN)BaseAddress, Length);
return RETURN_SUCCESS;
}
/**
Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
@ -216,9 +212,9 @@ with default interrupt/exception handlers.
**/
EFI_STATUS
EFIAPI
InitializeCpuInterruptHandlers(
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
)
InitializeCpuInterruptHandlers (
IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
)
{
// not needed, this is what the CPU driver is for
return EFI_UNSUPPORTED;
@ -250,7 +246,7 @@ previously installed.
or this function is not supported.
**/
RETURN_STATUS
RegisterCpuInterruptHandler(
RegisterCpuInterruptHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_CPU_INTERRUPT_HANDLER ExceptionHandler
)
@ -287,17 +283,17 @@ If this parameter is NULL, then the handler will be uninstalled.
**/
EFI_STATUS
EFIAPI
RegisterExceptionHandler(
RegisterExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
)
{
return RegisterCpuInterruptHandler(ExceptionType, InterruptHandler);
return RegisterCpuInterruptHandler (ExceptionType, InterruptHandler);
}
VOID
EFIAPI
CommonCExceptionHandler(
CommonCExceptionHandler (
IN EFI_EXCEPTION_TYPE ExceptionType,
IN OUT EFI_SYSTEM_CONTEXT SystemContext
)
@ -307,13 +303,12 @@ CommonCExceptionHandler(
gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
return;
}
}
else {
DEBUG((EFI_D_ERROR, "Unknown exception type %d\n", ExceptionType));
ASSERT(FALSE);
} else {
DEBUG ((DEBUG_ERROR, "Unknown exception type %d\n", ExceptionType));
ASSERT (FALSE);
}
DefaultExceptionHandler(ExceptionType, SystemContext);
DefaultExceptionHandler (ExceptionType, SystemContext);
}
/**
@ -347,4 +342,3 @@ InitializeCpuExceptionHandlersEx (
{
return InitializeCpuExceptionHandlers (VectorInfo);
}

View File

@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
return ArmReadCntpTval ();
}
VOID
EFIAPI
ArmGenericTimerSetTimerVal (

View File

@ -71,7 +71,6 @@ ArmGenericTimerGetTimerVal (
return ArmReadCntvTval ();
}
VOID
EFIAPI
ArmGenericTimerSetTimerVal (

View File

@ -38,6 +38,7 @@ ArmGicArchLibInitialize (
ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
mGicArchRevision = ARM_GIC_ARCH_REVISION_3;
goto Done;

View File

@ -36,6 +36,7 @@ ArmGicGetSupportedArchRevision (
ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
IccSre = ArmGicV3GetControlSystemRegisterEnable ();
}
if (IccSre & ICC_SRE_EL2_SRE) {
return ARM_GIC_ARCH_REVISION_3;
}

View File

@ -26,7 +26,7 @@ AArch64DataCacheOperation (
UINTN SavedInterruptState;
SavedInterruptState = ArmGetInterruptState ();
ArmDisableInterrupts();
ArmDisableInterrupts ();
AArch64AllDataCachesOperation (DataCacheOperation);

View File

@ -11,7 +11,9 @@
#ifndef AARCH64_LIB_H_
#define AARCH64_LIB_H_
typedef VOID (*AARCH64_CACHE_OPERATION)(UINTN);
typedef VOID (*AARCH64_CACHE_OPERATION)(
UINTN
);
VOID
AArch64AllDataCachesOperation (
@ -53,4 +55,3 @@ ArmReadIdAA64Mmfr2 (
);
#endif // AARCH64_LIB_H_

View File

@ -23,7 +23,9 @@
#define ID_MMFR0_SHR_IMP_HW_COHERENT 1
#define ID_MMFR0_SHR_IGNORED 0xf
typedef VOID (*ARM_V7_CACHE_OPERATION)(UINT32);
typedef VOID (*ARM_V7_CACHE_OPERATION)(
UINT32
);
VOID
ArmV7AllDataCachesOperation (
@ -65,4 +67,3 @@ ArmReadIdPfr1 (
);
#endif // ARM_V7_LIB_H_

View File

@ -19,7 +19,7 @@ ArmSetAuxCrBit (
IN UINT32 Bits
)
{
ArmWriteAuxCr(ArmReadAuxCr() | Bits);
ArmWriteAuxCr (ArmReadAuxCr () | Bits);
}
VOID
@ -28,7 +28,7 @@ ArmUnsetAuxCrBit (
IN UINT32 Bits
)
{
ArmWriteAuxCr(ArmReadAuxCr() & ~Bits);
ArmWriteAuxCr (ArmReadAuxCr () & ~Bits);
}
//

View File

@ -47,11 +47,12 @@ ArmMemoryAttributeToPageAttribute (
ASSERT (0);
case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
if (ArmReadCurrentEL () == AARCH64_EL2)
if (ArmReadCurrentEL () == AARCH64_EL2) {
return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
else
} else {
return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
}
}
}
#define MIN_T0SZ 16
@ -107,12 +108,15 @@ FreePageTablesRecursive (
if (Level < 3) {
for (Index = 0; Index < TT_ENTRY_COUNT; Index++) {
if ((TranslationTable[Index] & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {
FreePageTablesRecursive ((VOID *)(UINTN)(TranslationTable[Index] &
FreePageTablesRecursive (
(VOID *)(UINTN)(TranslationTable[Index] &
TT_ADDRESS_MASK_BLOCK_ENTRY),
Level + 1);
Level + 1
);
}
}
}
FreePages (TranslationTable, 1);
}
@ -126,6 +130,7 @@ IsBlockEntry (
if (Level == 3) {
return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3;
}
return (Entry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY;
}
@ -143,6 +148,7 @@ IsTableEntry (
//
return FALSE;
}
return (Entry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY;
}
@ -170,10 +176,18 @@ UpdateRegionMappingRecursive (
BlockShift = (Level + 1) * BITS_PER_LEVEL + MIN_T0SZ;
BlockMask = MAX_UINT64 >> BlockShift;
DEBUG ((DEBUG_VERBOSE, "%a(%d): %llx - %llx set %lx clr %lx\n", __FUNCTION__,
Level, RegionStart, RegionEnd, AttributeSetMask, AttributeClearMask));
DEBUG ((
DEBUG_VERBOSE,
"%a(%d): %llx - %llx set %lx clr %lx\n",
__FUNCTION__,
Level,
RegionStart,
RegionEnd,
AttributeSetMask,
AttributeClearMask
));
for (; RegionStart < RegionEnd; RegionStart = BlockEnd) {
for ( ; RegionStart < RegionEnd; RegionStart = BlockEnd) {
BlockEnd = MIN (RegionEnd, (RegionStart | BlockMask) + 1);
Entry = &PageTable[(RegionStart >> (64 - BlockShift)) & (TT_ENTRY_COUNT - 1)];
@ -187,8 +201,9 @@ UpdateRegionMappingRecursive (
// we cannot replace it with a block entry without potentially losing
// attribute information, so keep the table entry in that case.
//
if (Level == 0 || ((RegionStart | BlockEnd) & BlockMask) != 0 ||
(IsTableEntry (*Entry, Level) && AttributeClearMask != 0)) {
if ((Level == 0) || (((RegionStart | BlockEnd) & BlockMask) != 0) ||
(IsTableEntry (*Entry, Level) && (AttributeClearMask != 0)))
{
ASSERT (Level < 3);
if (!IsTableEntry (*Entry, Level)) {
@ -216,9 +231,14 @@ UpdateRegionMappingRecursive (
// We are splitting an existing block entry, so we have to populate
// the new table with the attributes of the block entry it replaces.
//
Status = UpdateRegionMappingRecursive (RegionStart & ~BlockMask,
(RegionStart | BlockMask) + 1, *Entry & TT_ATTRIBUTES_MASK,
0, TranslationTable, Level + 1);
Status = UpdateRegionMappingRecursive (
RegionStart & ~BlockMask,
(RegionStart | BlockMask) + 1,
*Entry & TT_ATTRIBUTES_MASK,
0,
TranslationTable,
Level + 1
);
if (EFI_ERROR (Status)) {
//
// The range we passed to UpdateRegionMappingRecursive () is block
@ -236,9 +256,14 @@ UpdateRegionMappingRecursive (
//
// Recurse to the next level
//
Status = UpdateRegionMappingRecursive (RegionStart, BlockEnd,
AttributeSetMask, AttributeClearMask, TranslationTable,
Level + 1);
Status = UpdateRegionMappingRecursive (
RegionStart,
BlockEnd,
AttributeSetMask,
AttributeClearMask,
TranslationTable,
Level + 1
);
if (EFI_ERROR (Status)) {
if (!IsTableEntry (*Entry, Level)) {
//
@ -250,13 +275,18 @@ UpdateRegionMappingRecursive (
//
FreePageTablesRecursive (TranslationTable, Level + 1);
}
return Status;
}
if (!IsTableEntry (*Entry, Level)) {
EntryValue = (UINTN)TranslationTable | TT_TYPE_TABLE_ENTRY;
ReplaceTableEntry (Entry, EntryValue, RegionStart,
IsBlockEntry (*Entry, Level));
ReplaceTableEntry (
Entry,
EntryValue,
RegionStart,
IsBlockEntry (*Entry, Level)
);
}
} else {
EntryValue = (*Entry & AttributeClearMask) | AttributeSetMask;
@ -280,6 +310,7 @@ UpdateRegionMappingRecursive (
}
}
}
return EFI_SUCCESS;
}
@ -300,9 +331,14 @@ UpdateRegionMapping (
T0SZ = ArmGetTCR () & TCR_T0SZ_MASK;
return UpdateRegionMappingRecursive (RegionStart, RegionStart + RegionLength,
AttributeSetMask, AttributeClearMask, ArmGetTTBR0BaseAddress (),
GetRootTableLevel (T0SZ));
return UpdateRegionMappingRecursive (
RegionStart,
RegionStart + RegionLength,
AttributeSetMask,
AttributeClearMask,
ArmGetTTBR0BaseAddress (),
GetRootTableLevel (T0SZ)
);
}
STATIC
@ -346,8 +382,9 @@ GcdAttributeToPageAttribute (
break;
}
if ((GcdAttributes & EFI_MEMORY_XP) != 0 ||
(GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC) {
if (((GcdAttributes & EFI_MEMORY_XP) != 0) ||
((GcdAttributes & EFI_MEMORY_CACHETYPE_MASK) == EFI_MEMORY_UC))
{
if (ArmReadCurrentEL () == AARCH64_EL2) {
PageAttributes |= TT_XN_MASK;
} else {
@ -356,7 +393,7 @@ GcdAttributeToPageAttribute (
}
if ((GcdAttributes & EFI_MEMORY_RO) != 0) {
PageAttributes |= TT_AP_RO_RO;
PageAttributes |= TT_AP_NO_RO;
}
return PageAttributes | TT_AF;
@ -385,8 +422,12 @@ ArmSetMemoryAttributes (
TT_PXN_MASK | TT_XN_MASK);
}
return UpdateRegionMapping (BaseAddress, Length, PageAttributes,
PageAttributeMask);
return UpdateRegionMapping (
BaseAddress,
Length,
PageAttributes,
PageAttributeMask
);
}
STATIC
@ -419,7 +460,8 @@ ArmSetMemoryRegionNoExec (
BaseAddress,
Length,
Val,
~TT_ADDRESS_MASK_BLOCK_ENTRY);
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
@ -437,7 +479,8 @@ ArmClearMemoryRegionNoExec (
BaseAddress,
Length,
0,
Mask);
Mask
);
}
EFI_STATUS
@ -449,8 +492,9 @@ ArmSetMemoryRegionReadOnly (
return SetMemoryRegionAttribute (
BaseAddress,
Length,
TT_AP_RO_RO,
~TT_ADDRESS_MASK_BLOCK_ENTRY);
TT_AP_NO_RO,
~TT_ADDRESS_MASK_BLOCK_ENTRY
);
}
EFI_STATUS
@ -462,8 +506,9 @@ ArmClearMemoryRegionReadOnly (
return SetMemoryRegionAttribute (
BaseAddress,
Length,
TT_AP_RW_RW,
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));
TT_AP_NO_RW,
~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)
);
}
EFI_STATUS
@ -474,7 +519,7 @@ ArmConfigureMmu (
OUT UINTN *TranslationTableSize OPTIONAL
)
{
VOID* TranslationTable;
VOID *TranslationTable;
UINTN MaxAddressBits;
UINT64 MaxAddress;
UINTN T0SZ;
@ -506,7 +551,7 @@ ArmConfigureMmu (
// Ideally we will be running at EL2, but should support EL1 as well.
// UEFI should not run at EL3.
if (ArmReadCurrentEL () == AARCH64_EL2) {
//Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
// Note: Bits 23 and 31 are reserved(RES1) bits in TCR_EL2
TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB;
// Set the Physical Address Size using MaxAddress
@ -523,9 +568,11 @@ ArmConfigureMmu (
} else if (MaxAddress < SIZE_256TB) {
TCR |= TCR_PS_256TB;
} else {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
MaxAddress));
MaxAddress
));
ASSERT (0); // Bigger than 48-bit memory space are not supported
return EFI_UNSUPPORTED;
}
@ -547,9 +594,11 @@ ArmConfigureMmu (
} else if (MaxAddress < SIZE_256TB) {
TCR |= TCR_IPS_256TB;
} else {
DEBUG ((DEBUG_ERROR,
DEBUG ((
DEBUG_ERROR,
"ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n",
MaxAddress));
MaxAddress
));
ASSERT (0); // Bigger than 48-bit memory space are not supported
return EFI_UNSUPPORTED;
}
@ -579,6 +628,7 @@ ArmConfigureMmu (
if (TranslationTable == NULL) {
return EFI_OUT_OF_RESOURCES;
}
//
// We set TTBR0 just after allocating the table to retrieve its location from
// the subsequent functions without needing to pass this value across the
@ -599,8 +649,10 @@ ArmConfigureMmu (
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables.
//
InvalidateDataCacheRange (TranslationTable,
RootTableEntryCount * sizeof (UINT64));
InvalidateDataCacheRange (
TranslationTable,
RootTableEntryCount * sizeof (UINT64)
);
ZeroMem (TranslationTable, RootTableEntryCount * sizeof (UINT64));
while (MemoryTable->Length != 0) {
@ -608,6 +660,7 @@ ArmConfigureMmu (
if (EFI_ERROR (Status)) {
goto FreeTranslationTable;
}
MemoryTable++;
}
@ -649,8 +702,10 @@ ArmMmuBaseLibConstructor (
// The ArmReplaceLiveTranslationEntry () helper function may be invoked
// with the MMU off so we have to ensure that it gets cleaned to the PoC
//
WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize);
WriteBackDataCacheRange (
(VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize
);
return RETURN_SUCCESS;
}

View File

@ -37,18 +37,21 @@ ArmMmuPeiLibConstructor (
// is executing from DRAM, we only need to perform the cache maintenance
// when not executing in place.
//
if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
if (((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry) &&
((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
(UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
DEBUG ((EFI_D_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
(UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize))
{
DEBUG ((DEBUG_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
} else {
DEBUG ((EFI_D_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
DEBUG ((DEBUG_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
//
// The ArmReplaceLiveTranslationEntry () helper function may be invoked
// with the MMU off so we have to ensure that it gets cleaned to the PoC
//
WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize);
WriteBackDataCacheRange (
(VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
ArmReplaceLiveTranslationEntrySize
);
}
return RETURN_SUCCESS;

View File

@ -76,6 +76,7 @@ PreferNonshareableMemory (
ASSERT (FALSE);
return FALSE;
}
return Val != ID_MMFR0_SHR_IMP_HW_COHERENT;
}
@ -88,7 +89,7 @@ PopulateLevel2PageTable (
IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
)
{
UINT32* PageEntry;
UINT32 *PageEntry;
UINT32 Pages;
UINT32 Index;
UINT32 PageAttributes;
@ -132,7 +133,7 @@ PopulateLevel2PageTable (
// Level 2 Translation Table to it
if (*SectionEntry != 0) {
// The entry must be a page table. Otherwise it exists an overlapping in the memory map
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(*SectionEntry)) {
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (*SectionEntry)) {
TranslationTable = *SectionEntry & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK;
} else if ((*SectionEntry & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
// Case where a virtual memory map descriptor overlapped a section entry
@ -140,49 +141,55 @@ PopulateLevel2PageTable (
// Allocate a Level2 Page Table for this Section
TranslationTable = (UINTN)AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
TRANSLATION_TABLE_PAGE_ALIGNMENT);
TRANSLATION_TABLE_PAGE_ALIGNMENT
);
// Translate the Section Descriptor into Page Descriptor
SectionDescriptor = TT_DESCRIPTOR_PAGE_TYPE_PAGE | ConvertSectionAttributesToPageAttributes (*SectionEntry, FALSE);
BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(*SectionEntry);
BaseSectionAddress = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*SectionEntry);
//
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables
//
InvalidateDataCacheRange ((VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE);
InvalidateDataCacheRange (
(VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE
);
// Populate the new Level2 Page Table for the section
PageEntry = (UINT32*)TranslationTable;
PageEntry = (UINT32 *)TranslationTable;
for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseSectionAddress + (Index << 12)) | SectionDescriptor;
PageEntry[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (BaseSectionAddress + (Index << 12)) | SectionDescriptor;
}
// Overwrite the section entry to point to the new Level2 Translation Table
*SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
} else {
// We do not support the other section type (16MB Section)
ASSERT(0);
ASSERT (0);
return;
}
} else {
TranslationTable = (UINTN)AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_PAGE_SIZE),
TRANSLATION_TABLE_PAGE_ALIGNMENT);
TRANSLATION_TABLE_PAGE_ALIGNMENT
);
//
// Make sure we are not inadvertently hitting in the caches
// when populating the page tables
//
InvalidateDataCacheRange ((VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE);
InvalidateDataCacheRange (
(VOID *)TranslationTable,
TRANSLATION_TABLE_PAGE_SIZE
);
ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_PAGE_SIZE);
*SectionEntry = (TranslationTable & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(Attributes) ? (1 << 3) : 0) |
(IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE (Attributes) ? (1 << 3) : 0) |
TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE;
}
@ -193,7 +200,7 @@ PopulateLevel2PageTable (
ASSERT (FirstPageOffset + Pages <= TRANSLATION_TABLE_PAGE_COUNT);
for (Index = 0; Index < Pages; Index++) {
*PageEntry++ = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(PhysicalBase) | PageAttributes;
*PageEntry++ = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (PhysicalBase) | PageAttributes;
PhysicalBase += TT_DESCRIPTOR_PAGE_SIZE;
}
@ -202,8 +209,10 @@ PopulateLevel2PageTable (
// [speculatively] since the previous invalidate are evicted again.
//
ArmDataMemoryBarrier ();
InvalidateDataCacheRange ((UINT32 *)TranslationTable + FirstPageOffset,
RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry));
InvalidateDataCacheRange (
(UINT32 *)TranslationTable + FirstPageOffset,
RemainLength / TT_DESCRIPTOR_PAGE_SIZE * sizeof (*PageEntry)
);
}
STATIC
@ -219,50 +228,50 @@ FillTranslationTable (
UINT64 RemainLength;
UINT32 PageMapLength;
ASSERT(MemoryRegion->Length > 0);
ASSERT (MemoryRegion->Length > 0);
if (MemoryRegion->PhysicalBase >= SIZE_4GB) {
return;
}
PhysicalBase = (UINT32)MemoryRegion->PhysicalBase;
RemainLength = MIN(MemoryRegion->Length, SIZE_4GB - PhysicalBase);
RemainLength = MIN (MemoryRegion->Length, SIZE_4GB - PhysicalBase);
switch (MemoryRegion->Attributes) {
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (0);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (0);
Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH (0);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
Attributes = TT_DESCRIPTOR_SECTION_DEVICE(0);
Attributes = TT_DESCRIPTOR_SECTION_DEVICE (0);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED:
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (0);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (1);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK (1);
Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH (1);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE:
Attributes = TT_DESCRIPTOR_SECTION_DEVICE(1);
Attributes = TT_DESCRIPTOR_SECTION_DEVICE (1);
break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED:
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(1);
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (1);
break;
default:
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED(0);
Attributes = TT_DESCRIPTOR_SECTION_UNCACHED (0);
break;
}
@ -271,14 +280,15 @@ FillTranslationTable (
}
// Get the first section entry for this mapping
SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);
SectionEntry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS (TranslationTable, MemoryRegion->VirtualBase);
while (RemainLength != 0) {
if (PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0 &&
RemainLength >= TT_DESCRIPTOR_SECTION_SIZE) {
if ((PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
(RemainLength >= TT_DESCRIPTOR_SECTION_SIZE))
{
// Case: Physical address aligned on the Section Size (1MB) && the length
// is greater than the Section Size
*SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes;
*SectionEntry = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (PhysicalBase) | Attributes;
//
// Issue a DMB to ensure that the page table entry update made it to
@ -291,14 +301,21 @@ FillTranslationTable (
PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
RemainLength -= TT_DESCRIPTOR_SECTION_SIZE;
} else {
PageMapLength = MIN ((UINT32)RemainLength, TT_DESCRIPTOR_SECTION_SIZE -
(PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE));
PageMapLength = MIN (
(UINT32)RemainLength,
TT_DESCRIPTOR_SECTION_SIZE -
(PhysicalBase % TT_DESCRIPTOR_SECTION_SIZE)
);
// Case: Physical address aligned on the Section Size (1MB) && the length
// does not fill a section
// Case: Physical address NOT aligned on the Section Size (1MB)
PopulateLevel2PageTable (SectionEntry, PhysicalBase, PageMapLength,
MemoryRegion->Attributes);
PopulateLevel2PageTable (
SectionEntry,
PhysicalBase,
PageMapLength,
MemoryRegion->Attributes
);
//
// Issue a DMB to ensure that the page table entry update made it to
@ -332,7 +349,8 @@ ArmConfigureMmu (
TranslationTable = AllocateAlignedPages (
EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE),
TRANSLATION_TABLE_SECTION_ALIGNMENT);
TRANSLATION_TABLE_SECTION_ALIGNMENT
);
if (TranslationTable == NULL) {
return RETURN_OUT_OF_RESOURCES;
}
@ -389,25 +407,27 @@ ArmConfigureMmu (
//
ArmSetTTBCR (0);
ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |
DOMAIN_ACCESS_CONTROL_NONE(14) |
DOMAIN_ACCESS_CONTROL_NONE(13) |
DOMAIN_ACCESS_CONTROL_NONE(12) |
DOMAIN_ACCESS_CONTROL_NONE(11) |
DOMAIN_ACCESS_CONTROL_NONE(10) |
DOMAIN_ACCESS_CONTROL_NONE( 9) |
DOMAIN_ACCESS_CONTROL_NONE( 8) |
DOMAIN_ACCESS_CONTROL_NONE( 7) |
DOMAIN_ACCESS_CONTROL_NONE( 6) |
DOMAIN_ACCESS_CONTROL_NONE( 5) |
DOMAIN_ACCESS_CONTROL_NONE( 4) |
DOMAIN_ACCESS_CONTROL_NONE( 3) |
DOMAIN_ACCESS_CONTROL_NONE( 2) |
DOMAIN_ACCESS_CONTROL_NONE( 1) |
DOMAIN_ACCESS_CONTROL_CLIENT(0));
ArmSetDomainAccessControl (
DOMAIN_ACCESS_CONTROL_NONE (15) |
DOMAIN_ACCESS_CONTROL_NONE (14) |
DOMAIN_ACCESS_CONTROL_NONE (13) |
DOMAIN_ACCESS_CONTROL_NONE (12) |
DOMAIN_ACCESS_CONTROL_NONE (11) |
DOMAIN_ACCESS_CONTROL_NONE (10) |
DOMAIN_ACCESS_CONTROL_NONE (9) |
DOMAIN_ACCESS_CONTROL_NONE (8) |
DOMAIN_ACCESS_CONTROL_NONE (7) |
DOMAIN_ACCESS_CONTROL_NONE (6) |
DOMAIN_ACCESS_CONTROL_NONE (5) |
DOMAIN_ACCESS_CONTROL_NONE (4) |
DOMAIN_ACCESS_CONTROL_NONE (3) |
DOMAIN_ACCESS_CONTROL_NONE (2) |
DOMAIN_ACCESS_CONTROL_NONE (1) |
DOMAIN_ACCESS_CONTROL_CLIENT (0)
);
ArmEnableInstructionCache();
ArmEnableDataCache();
ArmEnableMmu();
ArmEnableInstructionCache ();
ArmEnableDataCache ();
ArmEnableMmu ();
return RETURN_SUCCESS;
}

View File

@ -48,7 +48,7 @@ ConvertSectionToPages (
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
// Calculate index into first level translation table for start of modification
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
// Get section attributes and convert to page attributes
@ -63,7 +63,7 @@ ConvertSectionToPages (
// Write the page table entries out
for (Index = 0; Index < TRANSLATION_TABLE_PAGE_COUNT; Index++) {
PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(BaseAddress + (Index << 12)) | PageDescriptor;
PageTable[Index] = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (BaseAddress + (Index << 12)) | PageDescriptor;
}
// Formulate page table entry, Domain=0, NS=0
@ -156,19 +156,19 @@ UpdatePageEntries (
// Iterate for the number of 4KB pages to change
Offset = 0;
for(p = 0; p < NumPageEntries; p++) {
for (p = 0; p < NumPageEntries; p++) {
// Calculate index into first level translation table for page table value
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress + Offset) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
// Read the descriptor from the first level page table
Descriptor = FirstLevelTable[FirstLevelIdx];
// Does this descriptor need to be converted from section entry to 4K pages?
if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Descriptor)) {
if (!TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (Descriptor)) {
Status = ConvertSectionToPages (FirstLevelIdx << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
// Exit for loop
break;
}
@ -181,7 +181,7 @@ UpdatePageEntries (
}
// Obtain page table base address
PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS(Descriptor);
PageTable = (ARM_PAGE_TABLE_ENTRY *)TT_DESCRIPTOR_PAGE_BASE_ADDRESS (Descriptor);
// Calculate index into the page table
PageTableIndex = ((BaseAddress + Offset) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
@ -206,7 +206,6 @@ UpdatePageEntries (
Status = EFI_SUCCESS;
Offset += TT_DESCRIPTOR_PAGE_SIZE;
} // End first level translation table loop
return Status;
@ -286,24 +285,25 @@ UpdateSectionEntries (
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
// calculate index into first level translation table for start of modification
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
FirstLevelIdx = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
ASSERT (FirstLevelIdx < TRANSLATION_TABLE_SECTION_COUNT);
// calculate number of 1MB first level entries this applies to
NumSections = (UINT32)(Length / TT_DESCRIPTOR_SECTION_SIZE);
// iterate through each descriptor
for(i=0; i<NumSections; i++) {
for (i = 0; i < NumSections; i++) {
CurrentDescriptor = FirstLevelTable[FirstLevelIdx + i];
// has this descriptor already been converted to pages?
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) {
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (CurrentDescriptor)) {
// forward this 1MB range to page table function instead
Status = UpdatePageEntries (
(FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT,
TT_DESCRIPTOR_SECTION_SIZE,
Attributes,
NULL);
NULL
);
} else {
// still a section entry
@ -355,19 +355,22 @@ ArmSetMemoryAttributes (
FlushTlbs = FALSE;
while (Length > 0) {
if ((BaseAddress % TT_DESCRIPTOR_SECTION_SIZE == 0) &&
Length >= TT_DESCRIPTOR_SECTION_SIZE) {
(Length >= TT_DESCRIPTOR_SECTION_SIZE))
{
ChunkLength = Length - Length % TT_DESCRIPTOR_SECTION_SIZE;
DEBUG ((DEBUG_PAGE,
DEBUG ((
DEBUG_PAGE,
"SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n",
BaseAddress, ChunkLength, Attributes));
BaseAddress,
ChunkLength,
Attributes
));
Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes);
FlushTlbs = TRUE;
} else {
//
// Process page by page until the next section boundary, but only if
// we have more than a section's worth of area to deal with after that.
@ -378,12 +381,20 @@ ArmSetMemoryAttributes (
ChunkLength = Length;
}
DEBUG ((DEBUG_PAGE,
DEBUG ((
DEBUG_PAGE,
"SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n",
BaseAddress, ChunkLength, Attributes));
BaseAddress,
ChunkLength,
Attributes
));
Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes,
&FlushTlbs);
Status = UpdatePageEntries (
BaseAddress,
ChunkLength,
Attributes,
&FlushTlbs
);
}
if (EFI_ERROR (Status)) {
@ -397,6 +408,7 @@ ArmSetMemoryAttributes (
if (FlushTlbs) {
ArmInvalidateTlb ();
}
return Status;
}

View File

@ -34,7 +34,7 @@ MtlWaitUntilChannelFree (
@retval UINT32* Pointer to the payload.
**/
UINT32*
UINT32 *
MtlGetChannelPayload (
IN MTL_CHANNEL *Channel
)

View File

@ -65,7 +65,7 @@ LibResetSystem (
ArmCallSmc (&ArmSmcArgs);
// We should never be here
DEBUG ((EFI_D_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__));
DEBUG ((DEBUG_ERROR, "%a: PSCI Reset failed\n", __FUNCTION__));
CpuDeadLoop ();
return EFI_UNSUPPORTED;
}

View File

@ -0,0 +1,129 @@
/** @file
SMC helper functions.
Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/ArmSmcLib.h>
#include <Library/BaseMemoryLib.h>
/** Triggers an SMC call with 3 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Argument/result.
@return The SMC error code.
**/
UINTN
ArmCallSmc3 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
IN OUT UINTN *Arg3 OPTIONAL
)
{
ARM_SMC_ARGS Args;
UINTN ErrorCode;
ZeroMem (&Args, sizeof (ARM_SMC_ARGS));
Args.Arg0 = Function;
if (Arg1 != NULL) {
Args.Arg1 = *Arg1;
}
if (Arg2 != NULL) {
Args.Arg2 = *Arg2;
}
if (Arg3 != NULL) {
Args.Arg3 = *Arg3;
}
ArmCallSmc (&Args);
ErrorCode = Args.Arg0;
if (Arg1 != NULL) {
*Arg1 = Args.Arg1;
}
if (Arg2 != NULL) {
*Arg2 = Args.Arg2;
}
if (Arg3 != NULL) {
*Arg3 = Args.Arg3;
}
return ErrorCode;
}
/** Trigger an SMC call with 2 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc2 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return ArmCallSmc3 (Function, Arg1, Arg2, Arg3);
}
/** Trigger an SMC call with 1 argument.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc1 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return ArmCallSmc3 (Function, Arg1, Arg2, Arg3);
}
/** Trigger an SMC call with 0 arguments.
@param Function The SMC function.
@param Arg1 Result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc0 (
IN UINTN Function,
OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return ArmCallSmc3 (Function, Arg1, Arg2, Arg3);
}

View File

@ -20,6 +20,9 @@
[Sources.AARCH64]
AArch64/ArmSmc.S
[Sources]
ArmSmc.c
[Packages]
MdePkg/MdePkg.dec
ArmPkg/ArmPkg.dec

View File

@ -1,4 +1,5 @@
//
// Copyright (c) 2021, NUVIA Inc. All rights reserved.
// Copyright (c) 2016, Linaro Limited. All rights reserved.
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
@ -7,6 +8,7 @@
#include <Base.h>
#include <Library/ArmSmcLib.h>
#include <IndustryStandard/ArmStdSmc.h>
VOID
ArmCallSmc (
@ -14,3 +16,86 @@ ArmCallSmc (
)
{
}
/** Triggers an SMC call with 3 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Argument/result.
@return The SMC error code.
**/
UINTN
ArmCallSmc3 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
IN OUT UINTN *Arg3 OPTIONAL
)
{
return SMC_ARCH_CALL_NOT_SUPPORTED;
}
/** Trigger an SMC call with 2 arguments.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Argument/result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc2 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
IN OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return SMC_ARCH_CALL_NOT_SUPPORTED;
}
/** Trigger an SMC call with 1 argument.
@param Function The SMC function.
@param Arg1 Argument/result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc1 (
IN UINTN Function,
IN OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return SMC_ARCH_CALL_NOT_SUPPORTED;
}
/** Trigger an SMC call with 0 arguments.
@param Function The SMC function.
@param Arg1 Result.
@param Arg2 Result.
@param Arg3 Result.
@return The SMC error code.
**/
UINTN
ArmCallSmc0 (
IN UINTN Function,
OUT UINTN *Arg1 OPTIONAL,
OUT UINTN *Arg2 OPTIONAL,
OUT UINTN *Arg3 OPTIONAL
)
{
return SMC_ARCH_CALL_NOT_SUPPORTED;
}

View File

@ -31,11 +31,8 @@ ResetCold (
VOID
)
{
ARM_SMC_ARGS ArmSmcArgs;
// Send a PSCI 0.2 SYSTEM_RESET command
ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET;
ArmCallSmc (&ArmSmcArgs);
ArmCallSmc0 (ARM_SMC_ID_PSCI_SYSTEM_RESET, NULL, NULL, NULL);
}
/**
@ -66,11 +63,8 @@ ResetShutdown (
VOID
)
{
ARM_SMC_ARGS ArmSmcArgs;
// Send a PSCI 0.2 SYSTEM_OFF command
ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_OFF;
ArmCallSmc (&ArmSmcArgs);
ArmCallSmc0 (ARM_SMC_ID_PSCI_SYSTEM_OFF, NULL, NULL, NULL);
}
/**

View File

@ -25,12 +25,18 @@ typedef uint64_t aeabi_double_t;
* Helpers to convert between float32 and aeabi_float_t, and float64 and
* aeabi_double_t used by the AEABI functions below.
*/
static aeabi_float_t f32_to_f(float32_t val)
static aeabi_float_t
f32_to_f (
float32_t val
)
{
return val.v;
}
static float32_t f32_from_f(aeabi_float_t val)
static float32_t
f32_from_f (
aeabi_float_t val
)
{
float32_t res;
@ -39,12 +45,18 @@ static float32_t f32_from_f(aeabi_float_t val)
return res;
}
static aeabi_double_t f64_to_d(float64_t val)
static aeabi_double_t
f64_to_d (
float64_t val
)
{
return val.v;
}
static float64_t f64_from_d(aeabi_double_t val)
static float64_t
f64_from_d (
aeabi_double_t val
)
{
float64_t res;
@ -64,220 +76,346 @@ static float64_t f64_from_d(aeabi_double_t val)
* Table 2, Standard aeabi_double_t precision floating-point arithmetic helper
* functions
*/
aeabi_double_t __aeabi_dadd(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dadd (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d(f64_add(f64_from_d(a), f64_from_d(b)));
return f64_to_d (f64_add (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_ddiv(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_ddiv (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d(f64_div(f64_from_d(a), f64_from_d(b)));
return f64_to_d (f64_div (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_dmul(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dmul (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d(f64_mul(f64_from_d(a), f64_from_d(b)));
return f64_to_d (f64_mul (f64_from_d (a), f64_from_d (b)));
}
aeabi_double_t __aeabi_drsub(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_drsub (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d(f64_sub(f64_from_d(b), f64_from_d(a)));
return f64_to_d (f64_sub (f64_from_d (b), f64_from_d (a)));
}
aeabi_double_t __aeabi_dsub(aeabi_double_t a, aeabi_double_t b)
aeabi_double_t
__aeabi_dsub (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_to_d(f64_sub(f64_from_d(a), f64_from_d(b)));
return f64_to_d (f64_sub (f64_from_d (a), f64_from_d (b)));
}
/*
* Table 3, double precision floating-point comparison helper functions
*/
int __aeabi_dcmpeq(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpeq (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_eq(f64_from_d(a), f64_from_d(b));
return f64_eq (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmplt(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmplt (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_lt(f64_from_d(a), f64_from_d(b));
return f64_lt (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmple(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmple (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_le(f64_from_d(a), f64_from_d(b));
return f64_le (f64_from_d (a), f64_from_d (b));
}
int __aeabi_dcmpge(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpge (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_le(f64_from_d(b), f64_from_d(a));
return f64_le (f64_from_d (b), f64_from_d (a));
}
int __aeabi_dcmpgt(aeabi_double_t a, aeabi_double_t b)
int
__aeabi_dcmpgt (
aeabi_double_t a,
aeabi_double_t b
)
{
return f64_lt(f64_from_d(b), f64_from_d(a));
return f64_lt (f64_from_d (b), f64_from_d (a));
}
/*
* Table 4, Standard single precision floating-point arithmetic helper
* functions
*/
aeabi_float_t __aeabi_fadd(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fadd (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f(f32_add(f32_from_f(a), f32_from_f(b)));
return f32_to_f (f32_add (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_fdiv(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fdiv (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f(f32_div(f32_from_f(a), f32_from_f(b)));
return f32_to_f (f32_div (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_fmul(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fmul (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f(f32_mul(f32_from_f(a), f32_from_f(b)));
return f32_to_f (f32_mul (f32_from_f (a), f32_from_f (b)));
}
aeabi_float_t __aeabi_frsub(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_frsub (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f(f32_sub(f32_from_f(b), f32_from_f(a)));
return f32_to_f (f32_sub (f32_from_f (b), f32_from_f (a)));
}
aeabi_float_t __aeabi_fsub(aeabi_float_t a, aeabi_float_t b)
aeabi_float_t
__aeabi_fsub (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_to_f(f32_sub(f32_from_f(a), f32_from_f(b)));
return f32_to_f (f32_sub (f32_from_f (a), f32_from_f (b)));
}
/*
* Table 5, Standard single precision floating-point comparison helper
* functions
*/
int __aeabi_fcmpeq(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpeq (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_eq(f32_from_f(a), f32_from_f(b));
return f32_eq (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmplt(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmplt (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_lt(f32_from_f(a), f32_from_f(b));
return f32_lt (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmple(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmple (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_le(f32_from_f(a), f32_from_f(b));
return f32_le (f32_from_f (a), f32_from_f (b));
}
int __aeabi_fcmpge(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpge (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_le(f32_from_f(b), f32_from_f(a));
return f32_le (f32_from_f (b), f32_from_f (a));
}
int __aeabi_fcmpgt(aeabi_float_t a, aeabi_float_t b)
int
__aeabi_fcmpgt (
aeabi_float_t a,
aeabi_float_t b
)
{
return f32_lt(f32_from_f(b), f32_from_f(a));
return f32_lt (f32_from_f (b), f32_from_f (a));
}
/*
* Table 6, Standard floating-point to integer conversions
*/
int __aeabi_d2iz(aeabi_double_t a)
int
__aeabi_d2iz (
aeabi_double_t a
)
{
return f64_to_i32_r_minMag(f64_from_d(a), false);
return f64_to_i32_r_minMag (f64_from_d (a), false);
}
unsigned __aeabi_d2uiz(aeabi_double_t a)
unsigned
__aeabi_d2uiz (
aeabi_double_t a
)
{
return f64_to_ui32_r_minMag(f64_from_d(a), false);
return f64_to_ui32_r_minMag (f64_from_d (a), false);
}
long long __aeabi_d2lz(aeabi_double_t a)
long long
__aeabi_d2lz (
aeabi_double_t a
)
{
return f64_to_i64_r_minMag(f64_from_d(a), false);
return f64_to_i64_r_minMag (f64_from_d (a), false);
}
unsigned long long __aeabi_d2ulz(aeabi_double_t a)
unsigned long long
__aeabi_d2ulz (
aeabi_double_t a
)
{
return f64_to_ui64_r_minMag(f64_from_d(a), false);
return f64_to_ui64_r_minMag (f64_from_d (a), false);
}
int __aeabi_f2iz(aeabi_float_t a)
int
__aeabi_f2iz (
aeabi_float_t a
)
{
return f32_to_i32_r_minMag(f32_from_f(a), false);
return f32_to_i32_r_minMag (f32_from_f (a), false);
}
unsigned __aeabi_f2uiz(aeabi_float_t a)
unsigned
__aeabi_f2uiz (
aeabi_float_t a
)
{
return f32_to_ui32_r_minMag(f32_from_f(a), false);
return f32_to_ui32_r_minMag (f32_from_f (a), false);
}
long long __aeabi_f2lz(aeabi_float_t a)
long long
__aeabi_f2lz (
aeabi_float_t a
)
{
return f32_to_i64_r_minMag(f32_from_f(a), false);
return f32_to_i64_r_minMag (f32_from_f (a), false);
}
unsigned long long __aeabi_f2ulz(aeabi_float_t a)
unsigned long long
__aeabi_f2ulz (
aeabi_float_t a
)
{
return f32_to_ui64_r_minMag(f32_from_f(a), false);
return f32_to_ui64_r_minMag (f32_from_f (a), false);
}
/*
* Table 7, Standard conversions between floating types
*/
aeabi_float_t __aeabi_d2f(aeabi_double_t a)
aeabi_float_t
__aeabi_d2f (
aeabi_double_t a
)
{
return f32_to_f(f64_to_f32(f64_from_d(a)));
return f32_to_f (f64_to_f32 (f64_from_d (a)));
}
aeabi_double_t __aeabi_f2d(aeabi_float_t a)
aeabi_double_t
__aeabi_f2d (
aeabi_float_t a
)
{
return f64_to_d(f32_to_f64(f32_from_f(a)));
return f64_to_d (f32_to_f64 (f32_from_f (a)));
}
/*
* Table 8, Standard integer to floating-point conversions
*/
aeabi_double_t __aeabi_i2d(int a)
aeabi_double_t
__aeabi_i2d (
int a
)
{
return f64_to_d(i32_to_f64(a));
return f64_to_d (i32_to_f64 (a));
}
aeabi_double_t __aeabi_ui2d(unsigned a)
aeabi_double_t
__aeabi_ui2d (
unsigned a
)
{
return f64_to_d(ui32_to_f64(a));
return f64_to_d (ui32_to_f64 (a));
}
aeabi_double_t __aeabi_l2d(long long a)
aeabi_double_t
__aeabi_l2d (
long long a
)
{
return f64_to_d(i64_to_f64(a));
return f64_to_d (i64_to_f64 (a));
}
aeabi_double_t __aeabi_ul2d(unsigned long long a)
aeabi_double_t
__aeabi_ul2d (
unsigned long long a
)
{
return f64_to_d(ui64_to_f64(a));
return f64_to_d (ui64_to_f64 (a));
}
aeabi_float_t __aeabi_i2f(int a)
aeabi_float_t
__aeabi_i2f (
int a
)
{
return f32_to_f(i32_to_f32(a));
return f32_to_f (i32_to_f32 (a));
}
aeabi_float_t __aeabi_ui2f(unsigned a)
aeabi_float_t
__aeabi_ui2f (
unsigned a
)
{
return f32_to_f(ui32_to_f32(a));
return f32_to_f (ui32_to_f32 (a));
}
aeabi_float_t __aeabi_l2f(long long a)
aeabi_float_t
__aeabi_l2f (
long long a
)
{
return f32_to_f(i64_to_f32(a));
return f32_to_f (i64_to_f32 (a));
}
aeabi_float_t __aeabi_ul2f(unsigned long long a)
aeabi_float_t
__aeabi_ul2f (
unsigned long long a
)
{
return f32_to_f(ui64_to_f32(a));
return f32_to_f (ui64_to_f32 (a));
}

View File

@ -1,22 +1,33 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2019, Pete Batard. All rights reserved.
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
#if defined(_M_ARM64)
#if defined (_M_ARM64)
typedef unsigned __int64 size_t;
#else
typedef unsigned __int32 size_t;
#endif
int memcmp(void *, void *, size_t);
int
memcmp (
void *,
void *,
size_t
);
#pragma intrinsic(memcmp)
#pragma function(memcmp)
int memcmp(const void *s1, const void *s2, size_t n)
int
memcmp (
const void *s1,
const void *s2,
size_t n
)
{
unsigned char const *t1;
unsigned char const *t2;
@ -25,8 +36,10 @@ int memcmp(const void *s1, const void *s2, size_t n)
t2 = s2;
while (n-- != 0) {
if (*t1 != *t2)
if (*t1 != *t2) {
return (int)*t1 - (int)*t2;
}
t1++;
t2++;
}

View File

@ -1,15 +1,20 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
typedef __SIZE_TYPE__ size_t;
static void __memcpy(void *dest, const void *src, size_t n)
static void
__memcpy (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;
@ -22,21 +27,41 @@ static void __memcpy(void *dest, const void *src, size_t n)
}
}
void *memcpy(void *dest, const void *src, size_t n)
void *
memcpy (
void *dest,
const void *src,
size_t n
)
{
__memcpy(dest, src, n);
__memcpy (dest, src, n);
return dest;
}
#ifdef __arm__
__attribute__((__alias__("__memcpy")))
void __aeabi_memcpy(void *dest, const void *src, size_t n);
__attribute__ ((__alias__ ("__memcpy")))
void
__aeabi_memcpy (
void *dest,
const void *src,
size_t n
);
__attribute__((__alias__("__memcpy")))
void __aeabi_memcpy4(void *dest, const void *src, size_t n);
__attribute__ ((__alias__ ("__memcpy")))
void
__aeabi_memcpy4 (
void *dest,
const void *src,
size_t n
);
__attribute__((__alias__("__memcpy")))
void __aeabi_memcpy8(void *dest, const void *src, size_t n);
__attribute__ ((__alias__ ("__memcpy")))
void
__aeabi_memcpy8 (
void *dest,
const void *src,
size_t n
);
#endif

View File

@ -1,22 +1,33 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
#if defined(_M_ARM64)
#if defined (_M_ARM64)
typedef unsigned __int64 size_t;
#else
typedef unsigned __int32 size_t;
#endif
void* memcpy(void *, const void *, size_t);
void *
memcpy (
void *,
const void *,
size_t
);
#pragma intrinsic(memcpy)
#pragma function(memcpy)
void* memcpy(void *dest, const void *src, size_t n)
void *
memcpy (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;

View File

@ -1,22 +1,33 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2019, Pete Batard. All rights reserved.
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
#if defined(_M_ARM64)
#if defined (_M_ARM64)
typedef unsigned __int64 size_t;
#else
typedef unsigned __int32 size_t;
#endif
void* memmove(void *, const void *, size_t);
void *
memmove (
void *,
const void *,
size_t
);
#pragma intrinsic(memmove)
#pragma function(memmove)
void* memmove(void *dest, const void *src, size_t n)
void *
memmove (
void *dest,
const void *src,
size_t n
)
{
unsigned char *d;
unsigned char const *s;

View File

@ -1,16 +1,21 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
typedef __SIZE_TYPE__ size_t;
static __attribute__((__used__))
void *__memset(void *s, int c, size_t n)
static __attribute__ ((__used__))
void *
__memset (
void *s,
int c,
size_t n
)
{
unsigned char *d;
@ -29,31 +34,63 @@ void *__memset(void *s, int c, size_t n)
// object was pulled into the link due to the definitions below. So make
// our memset() 'weak' to let the other implementation take precedence.
//
__attribute__((__weak__, __alias__("__memset")))
void *memset(void *dest, int c, size_t n);
__attribute__ ((__weak__, __alias__ ("__memset")))
void *
memset (
void *dest,
int c,
size_t n
);
#ifdef __arm__
void __aeabi_memset(void *dest, size_t n, int c)
void
__aeabi_memset (
void *dest,
size_t n,
int c
)
{
__memset(dest, c, n);
__memset (dest, c, n);
}
__attribute__((__alias__("__aeabi_memset")))
void __aeabi_memset4(void *dest, size_t n, int c);
__attribute__ ((__alias__ ("__aeabi_memset")))
void
__aeabi_memset4 (
void *dest,
size_t n,
int c
);
__attribute__((__alias__("__aeabi_memset")))
void __aeabi_memset8(void *dest, size_t n, int c);
__attribute__ ((__alias__ ("__aeabi_memset")))
void
__aeabi_memset8 (
void *dest,
size_t n,
int c
);
void __aeabi_memclr(void *dest, size_t n)
void
__aeabi_memclr (
void *dest,
size_t n
)
{
__memset(dest, 0, n);
__memset (dest, 0, n);
}
__attribute__((__alias__("__aeabi_memclr")))
void __aeabi_memclr4(void *dest, size_t n);
__attribute__ ((__alias__ ("__aeabi_memclr")))
void
__aeabi_memclr4 (
void *dest,
size_t n
);
__attribute__((__alias__("__aeabi_memclr")))
void __aeabi_memclr8(void *dest, size_t n);
__attribute__ ((__alias__ ("__aeabi_memclr")))
void
__aeabi_memclr8 (
void *dest,
size_t n
);
#endif

View File

@ -1,22 +1,33 @@
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
//
// Copyright (c) 2017, Pete Batard. All rights reserved.<BR>
// Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
//------------------------------------------------------------------------------
// ------------------------------------------------------------------------------
#if defined(_M_ARM64)
#if defined (_M_ARM64)
typedef unsigned __int64 size_t;
#else
typedef unsigned __int32 size_t;
#endif
void* memset(void *, int, size_t);
void *
memset (
void *,
int,
size_t
);
#pragma intrinsic(memset)
#pragma function(memset)
void *memset(void *s, int c, size_t n)
void *
memset (
void *s,
int c,
size_t n
)
{
unsigned char *d;

View File

@ -22,7 +22,6 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
(ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1))
// Vector Table for Sec Phase
VOID
DebugAgentVectorTable (
@ -53,7 +52,7 @@ GetFileState (
FileState = FfsHeader->State;
if (ErasePolarity != 0) {
FileState = (EFI_FFS_FILE_STATE)~FileState;
FileState = (EFI_FFS_FILE_STATE) ~FileState;
}
HighestBit = 0x80;
@ -82,7 +81,7 @@ CalculateHeaderChecksum (
UINT8 Sum;
// Calculate the sum of the header
Sum = CalculateSum8 ((CONST VOID*)FileHeader,sizeof(EFI_FFS_FILE_HEADER));
Sum = CalculateSum8 ((CONST VOID *)FileHeader, sizeof (EFI_FFS_FILE_HEADER));
// State field (since this indicates the different state of file).
Sum = (UINT8)(Sum - FileHeader->State);
@ -125,10 +124,9 @@ GetFfsFile (
FileState = GetFileState (ErasePolarity, FfsFileHeader);
switch (FileState) {
case EFI_FILE_HEADER_INVALID:
FileOffset += sizeof(EFI_FFS_FILE_HEADER);
FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof(EFI_FFS_FILE_HEADER));
FileOffset += sizeof (EFI_FFS_FILE_HEADER);
FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + sizeof (EFI_FFS_FILE_HEADER));
break;
case EFI_FILE_DATA_VALID:
@ -144,7 +142,7 @@ GetFfsFile (
}
FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
FileOccupiedSize = GET_OCCUPIED_SIZE (FileLength, 8);
FileOffset += FileOccupiedSize;
FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
@ -152,7 +150,7 @@ GetFfsFile (
case EFI_FILE_DELETED:
FileLength = *(UINT32 *)(FfsFileHeader->Size) & 0x00FFFFFF;
FileOccupiedSize = GET_OCCUPIED_SIZE(FileLength, 8);
FileOccupiedSize = GET_OCCUPIED_SIZE (FileLength, 8);
FileOffset += FileOccupiedSize;
FfsFileHeader = (EFI_FFS_FILE_HEADER *)((UINT8 *)FfsFileHeader + FileOccupiedSize);
break;
@ -161,6 +159,7 @@ GetFfsFile (
return EFI_NOT_FOUND;
}
}
return EFI_NOT_FOUND;
}
@ -188,7 +187,7 @@ GetImageContext (
while (ParsedLength < SectionSize) {
if ((Section->Type == EFI_SECTION_PE32) || (Section->Type == EFI_SECTION_TE)) {
EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION*)(Section + 1);
EfiImage = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)(Section + 1);
break;
}
@ -214,16 +213,16 @@ GetImageContext (
ImageContext->ImageRead = PeCoffLoaderImageReadFromMemory;
Status = PeCoffLoaderGetImageInfo (ImageContext);
if (!EFI_ERROR(Status) && ((VOID*)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
if (!EFI_ERROR (Status) && ((VOID *)(UINTN)ImageContext->DebugDirectoryEntryRva != NULL)) {
ImageAddress = ImageContext->ImageAddress;
if (ImageContext->IsTeImage) {
ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER*)EfiImage)->StrippedSize;
ImageAddress += sizeof (EFI_TE_IMAGE_HEADER) - ((EFI_TE_IMAGE_HEADER *)EfiImage)->StrippedSize;
}
DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY*)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *)(ImageAddress + ImageContext->DebugDirectoryEntryRva);
if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {
CodeViewEntryPointer = (VOID *) (ImageAddress + (UINTN) DebugEntry->RVA);
switch (* (UINT32 *) CodeViewEntryPointer) {
CodeViewEntryPointer = (VOID *)(ImageAddress + (UINTN)DebugEntry->RVA);
switch (*(UINT32 *)CodeViewEntryPointer) {
case CODEVIEW_SIGNATURE_NB10:
ImageContext->PdbPointer = (CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY);
break;
@ -268,7 +267,7 @@ VOID
EFIAPI
InitializeDebugAgent (
IN UINT32 InitFlag,
IN VOID *Context, OPTIONAL
IN VOID *Context OPTIONAL,
IN DEBUG_AGENT_CONTINUE Function OPTIONAL
)
{
@ -283,10 +282,10 @@ InitializeDebugAgent (
//
// Get the Sec or PrePeiCore module (defined as SEC type module)
//
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR (Status)) {
Status = GetImageContext (FfsHeader, &ImageContext);
if (!EFI_ERROR (Status)) {
PeCoffLoaderRelocateImageExtraAction (&ImageContext);
}
}
@ -294,10 +293,10 @@ InitializeDebugAgent (
//
// Get the PrePi or PrePeiCore module (defined as SEC type module)
//
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
if (!EFI_ERROR (Status)) {
Status = GetImageContext (FfsHeader, &ImageContext);
if (!EFI_ERROR (Status)) {
PeCoffLoaderRelocateImageExtraAction (&ImageContext);
}
}
@ -305,10 +304,10 @@ InitializeDebugAgent (
//
// Get the PeiCore module (defined as PEI_CORE type module)
//
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
if (!EFI_ERROR(Status)) {
Status = GetImageContext (FfsHeader,&ImageContext);
if (!EFI_ERROR(Status)) {
Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet64 (PcdFvBaseAddress), EFI_FV_FILETYPE_PEI_CORE, &FfsHeader);
if (!EFI_ERROR (Status)) {
Status = GetImageContext (FfsHeader, &ImageContext);
if (!EFI_ERROR (Status)) {
PeCoffLoaderRelocateImageExtraAction (&ImageContext);
}
}
@ -335,4 +334,3 @@ SaveAndSetDebugTimerInterrupt (
{
return FALSE;
}

View File

@ -17,7 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/PeCoffExtraActionLib.h>
#include <Library/PrintLib.h>
/**
If the build is done on cygwin the paths are cygpaths.
/cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert
@ -45,7 +44,7 @@ DeCygwinPathIfNeeded (
for (Index = 9, Index2 = 0; (Index < (Size + 9)) && (Ptr[Index] != '\0'); Index++, Index2++) {
Temp[Index2] = Ptr[Index];
if (Temp[Index2] == '/') {
Temp[Index2] = '\\' ;
Temp[Index2] = '\\';
}
if (Index2 == 1) {
@ -57,7 +56,6 @@ DeCygwinPathIfNeeded (
return Temp;
}
/**
Performs additional actions after a PE/COFF image has been loaded and relocated.
@ -73,32 +71,30 @@ PeCoffLoaderRelocateImageExtraAction (
IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
)
{
#if !defined(MDEPKG_NDEBUG)
#if !defined (MDEPKG_NDEBUG)
CHAR8 Temp[512];
#endif
#endif
if (ImageContext->PdbPointer) {
#ifdef __CC_ARM
#if (__ARMCC_VERSION < 500000)
#ifdef __CC_ARM
#if (__ARMCC_VERSION < 500000)
// Print out the command for the RVD debugger to load symbols for this image
DEBUG ((EFI_D_LOAD | EFI_D_INFO, "load /a /ni /np %a &0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#else
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "load /a /ni /np %a &0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#else
// Print out the command for the DS-5 to load symbols for this image
DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#endif
#elif __GNUC__
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#endif
#elif __GNUC__
// This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
DEBUG ((EFI_D_LOAD | EFI_D_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#else
DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
#endif
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "add-symbol-file %a 0x%p\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#else
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
#endif
} else {
DEBUG ((EFI_D_LOAD | EFI_D_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Loading driver at 0x%11p EntryPoint=0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress, FUNCTION_ENTRY_POINT (ImageContext->EntryPoint)));
}
}
/**
Performs additional actions just before a PE/COFF image is unloaded. Any resources
that were allocated by PeCoffLoaderRelocateImageExtraAction() must be freed.
@ -115,21 +111,21 @@ PeCoffLoaderUnloadImageExtraAction (
IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
)
{
#if !defined(MDEPKG_NDEBUG)
#if !defined (MDEPKG_NDEBUG)
CHAR8 Temp[512];
#endif
#endif
if (ImageContext->PdbPointer) {
#ifdef __CC_ARM
#ifdef __CC_ARM
// Print out the command for the RVD debugger to load symbols for this image
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "unload symbols_only %a\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp))));
#elif __GNUC__
#elif __GNUC__
// This may not work correctly if you generate PE/COFF directly as then the Offset would not be required
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "remove-symbol-file %a 0x%08x\n", DeCygwinPathIfNeeded (ImageContext->PdbPointer, Temp, sizeof (Temp)), (UINTN)(ImageContext->ImageAddress + ImageContext->SizeOfHeaders)));
#else
#else
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading %a\n", ImageContext->PdbPointer));
#endif
#endif
} else {
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading driver at 0x%11p\n", (VOID *)(UINTN) ImageContext->ImageAddress));
DEBUG ((DEBUG_LOAD | DEBUG_INFO, "Unloading driver at 0x%11p\n", (VOID *)(UINTN)ImageContext->ImageAddress));
}
}

View File

@ -48,43 +48,75 @@ DescribeInstructionOrDataAbort (
CHAR8 *AbortCause;
switch (Iss & 0x3f) {
case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register"; break;
case 0x1: AbortCause = "Address size fault, first level"; break;
case 0x2: AbortCause = "Address size fault, second level"; break;
case 0x3: AbortCause = "Address size fault, third level"; break;
case 0x4: AbortCause = "Translation fault, zeroth level"; break;
case 0x5: AbortCause = "Translation fault, first level"; break;
case 0x6: AbortCause = "Translation fault, second level"; break;
case 0x7: AbortCause = "Translation fault, third level"; break;
case 0x9: AbortCause = "Access flag fault, first level"; break;
case 0xa: AbortCause = "Access flag fault, second level"; break;
case 0xb: AbortCause = "Access flag fault, third level"; break;
case 0xd: AbortCause = "Permission fault, first level"; break;
case 0xe: AbortCause = "Permission fault, second level"; break;
case 0xf: AbortCause = "Permission fault, third level"; break;
case 0x10: AbortCause = "Synchronous external abort"; break;
case 0x18: AbortCause = "Synchronous parity error on memory access"; break;
case 0x11: AbortCause = "Asynchronous external abort"; break;
case 0x19: AbortCause = "Asynchronous parity error on memory access"; break;
case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level"; break;
case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level"; break;
case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level"; break;
case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level"; break;
case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level"; break;
case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level"; break;
case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level"; break;
case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level"; break;
case 0x21: AbortCause = "Alignment fault"; break;
case 0x22: AbortCause = "Debug event"; break;
case 0x30: AbortCause = "TLB conflict abort"; break;
case 0x0: AbortCause = "Address size fault, zeroth level of translation or translation table base register";
break;
case 0x1: AbortCause = "Address size fault, first level";
break;
case 0x2: AbortCause = "Address size fault, second level";
break;
case 0x3: AbortCause = "Address size fault, third level";
break;
case 0x4: AbortCause = "Translation fault, zeroth level";
break;
case 0x5: AbortCause = "Translation fault, first level";
break;
case 0x6: AbortCause = "Translation fault, second level";
break;
case 0x7: AbortCause = "Translation fault, third level";
break;
case 0x9: AbortCause = "Access flag fault, first level";
break;
case 0xa: AbortCause = "Access flag fault, second level";
break;
case 0xb: AbortCause = "Access flag fault, third level";
break;
case 0xd: AbortCause = "Permission fault, first level";
break;
case 0xe: AbortCause = "Permission fault, second level";
break;
case 0xf: AbortCause = "Permission fault, third level";
break;
case 0x10: AbortCause = "Synchronous external abort";
break;
case 0x18: AbortCause = "Synchronous parity error on memory access";
break;
case 0x11: AbortCause = "Asynchronous external abort";
break;
case 0x19: AbortCause = "Asynchronous parity error on memory access";
break;
case 0x14: AbortCause = "Synchronous external abort on translation table walk, zeroth level";
break;
case 0x15: AbortCause = "Synchronous external abort on translation table walk, first level";
break;
case 0x16: AbortCause = "Synchronous external abort on translation table walk, second level";
break;
case 0x17: AbortCause = "Synchronous external abort on translation table walk, third level";
break;
case 0x1c: AbortCause = "Synchronous parity error on memory access on translation table walk, zeroth level";
break;
case 0x1d: AbortCause = "Synchronous parity error on memory access on translation table walk, first level";
break;
case 0x1e: AbortCause = "Synchronous parity error on memory access on translation table walk, second level";
break;
case 0x1f: AbortCause = "Synchronous parity error on memory access on translation table walk, third level";
break;
case 0x21: AbortCause = "Alignment fault";
break;
case 0x22: AbortCause = "Debug event";
break;
case 0x30: AbortCause = "TLB conflict abort";
break;
case 0x33:
case 0x34: AbortCause = "IMPLEMENTATION DEFINED"; break;
case 0x34: AbortCause = "IMPLEMENTATION DEFINED";
break;
case 0x35:
case 0x36: AbortCause = "Domain fault"; break;
default: AbortCause = ""; break;
case 0x36: AbortCause = "Domain fault";
break;
default: AbortCause = "";
break;
}
DEBUG ((EFI_D_ERROR, "\n%a: %a\n", AbortType, AbortCause));
DEBUG ((DEBUG_ERROR, "\n%a: %a\n", AbortType, AbortCause));
}
STATIC
@ -101,17 +133,22 @@ DescribeExceptionSyndrome (
Iss = Esr & 0x00ffffff;
switch (Ec) {
case 0x15: Message = "SVC executed in AArch64"; break;
case 0x15: Message = "SVC executed in AArch64";
break;
case 0x20:
case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss); return;
case 0x22: Message = "PC alignment fault"; break;
case 0x23: Message = "SP alignment fault"; break;
case 0x21: DescribeInstructionOrDataAbort ("Instruction abort", Iss);
return;
case 0x22: Message = "PC alignment fault";
break;
case 0x23: Message = "SP alignment fault";
break;
case 0x24:
case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss); return;
case 0x25: DescribeInstructionOrDataAbort ("Data abort", Iss);
return;
default: return;
}
DEBUG ((EFI_D_ERROR, "\n %a \n", Message));
DEBUG ((DEBUG_ERROR, "\n %a \n", Message));
}
#ifndef MDEPKG_NDEBUG
@ -126,12 +163,14 @@ BaseName (
Str = FullName + AsciiStrLen (FullName);
while (--Str > FullName) {
if (*Str == '/' || *Str == '\\') {
if ((*Str == '/') || (*Str == '\\')) {
return Str + 1;
}
}
return Str;
}
#endif
/**
@ -160,12 +199,14 @@ DefaultExceptionHandler (
if (gST->ConOut != NULL) {
AsciiPrint (Message);
}
CpuDeadLoop ();
}
mRecursiveException = TRUE;
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
SerialPortWrite ((UINT8 *) Buffer, CharCount);
CharCount = AsciiSPrint (Buffer, sizeof (Buffer), "\n\n%a Exception at 0x%016lx\n", gExceptionTypeString[ExceptionType], SystemContext.SystemContextAArch64->ELR);
SerialPortWrite ((UINT8 *)Buffer, CharCount);
if (gST->ConOut != NULL) {
AsciiPrint (Buffer);
}
@ -180,11 +221,16 @@ DefaultExceptionHandler (
PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
SystemContext.SystemContextAArch64->ELR, ImageBase,
SystemContext.SystemContextAArch64->ELR - ImageBase, BaseName (Pdb)));
DEBUG ((
DEBUG_ERROR,
"PC 0x%012lx (0x%012lx+0x%08x) [ 0] %a\n",
SystemContext.SystemContextAArch64->ELR,
ImageBase,
SystemContext.SystemContextAArch64->ELR - ImageBase,
BaseName (Pdb)
));
} else {
DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", SystemContext.SystemContextAArch64->ELR));
}
if ((UINT64 *)SystemContext.SystemContextAArch64->FP != 0) {
@ -196,6 +242,7 @@ DefaultExceptionHandler (
RootFp[0] = SystemContext.SystemContextAArch64->FP;
RootFp[1] = SystemContext.SystemContextAArch64->LR;
}
for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
@ -203,71 +250,84 @@ DefaultExceptionHandler (
Idx++;
PrevPdb = Pdb;
}
DEBUG ((EFI_D_ERROR, "PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
Fp[1], ImageBase, Fp[1] - ImageBase, Idx, BaseName (Pdb)));
DEBUG ((
DEBUG_ERROR,
"PC 0x%012lx (0x%012lx+0x%08x) [% 2d] %a\n",
Fp[1],
ImageBase,
Fp[1] - ImageBase,
Idx,
BaseName (Pdb)
));
} else {
DEBUG ((EFI_D_ERROR, "PC 0x%012lx\n", Fp[1]));
DEBUG ((DEBUG_ERROR, "PC 0x%012lx\n", Fp[1]));
}
}
PrevPdb = Pdb = GetImageName (SystemContext.SystemContextAArch64->ELR, &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL) {
DEBUG ((EFI_D_ERROR, "\n[ 0] %a\n", Pdb));
DEBUG ((DEBUG_ERROR, "\n[ 0] %a\n", Pdb));
}
Idx = 0;
for (Fp = RootFp; Fp[0] != 0; Fp = (UINT64 *)Fp[0]) {
Pdb = GetImageName (Fp[1], &ImageBase, &PeCoffSizeOfHeader);
if (Pdb != NULL && Pdb != PrevPdb) {
DEBUG ((EFI_D_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
if ((Pdb != NULL) && (Pdb != PrevPdb)) {
DEBUG ((DEBUG_ERROR, "[% 2d] %a\n", ++Idx, Pdb));
PrevPdb = Pdb;
}
}
}
DEBUG_CODE_END ();
DEBUG ((EFI_D_ERROR, "\n X0 0x%016lx X1 0x%016lx X2 0x%016lx X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
DEBUG ((EFI_D_ERROR, " X4 0x%016lx X5 0x%016lx X6 0x%016lx X7 0x%016lx\n", SystemContext.SystemContextAArch64->X4, SystemContext.SystemContextAArch64->X5, SystemContext.SystemContextAArch64->X6, SystemContext.SystemContextAArch64->X7));
DEBUG ((EFI_D_ERROR, " X8 0x%016lx X9 0x%016lx X10 0x%016lx X11 0x%016lx\n", SystemContext.SystemContextAArch64->X8, SystemContext.SystemContextAArch64->X9, SystemContext.SystemContextAArch64->X10, SystemContext.SystemContextAArch64->X11));
DEBUG ((EFI_D_ERROR, " X12 0x%016lx X13 0x%016lx X14 0x%016lx X15 0x%016lx\n", SystemContext.SystemContextAArch64->X12, SystemContext.SystemContextAArch64->X13, SystemContext.SystemContextAArch64->X14, SystemContext.SystemContextAArch64->X15));
DEBUG ((EFI_D_ERROR, " X16 0x%016lx X17 0x%016lx X18 0x%016lx X19 0x%016lx\n", SystemContext.SystemContextAArch64->X16, SystemContext.SystemContextAArch64->X17, SystemContext.SystemContextAArch64->X18, SystemContext.SystemContextAArch64->X19));
DEBUG ((EFI_D_ERROR, " X20 0x%016lx X21 0x%016lx X22 0x%016lx X23 0x%016lx\n", SystemContext.SystemContextAArch64->X20, SystemContext.SystemContextAArch64->X21, SystemContext.SystemContextAArch64->X22, SystemContext.SystemContextAArch64->X23));
DEBUG ((EFI_D_ERROR, " X24 0x%016lx X25 0x%016lx X26 0x%016lx X27 0x%016lx\n", SystemContext.SystemContextAArch64->X24, SystemContext.SystemContextAArch64->X25, SystemContext.SystemContextAArch64->X26, SystemContext.SystemContextAArch64->X27));
DEBUG ((EFI_D_ERROR, " X28 0x%016lx FP 0x%016lx LR 0x%016lx \n", SystemContext.SystemContextAArch64->X28, SystemContext.SystemContextAArch64->FP, SystemContext.SystemContextAArch64->LR));
DEBUG ((DEBUG_ERROR, "\n X0 0x%016lx X1 0x%016lx X2 0x%016lx X3 0x%016lx\n", SystemContext.SystemContextAArch64->X0, SystemContext.SystemContextAArch64->X1, SystemContext.SystemContextAArch64->X2, SystemContext.SystemContextAArch64->X3));
DEBUG ((DEBUG_ERROR, " X4 0x%016lx X5 0x%016lx X6 0x%016lx X7 0x%016lx\n", SystemContext.SystemContextAArch64->X4, SystemContext.SystemContextAArch64->X5, SystemContext.SystemContextAArch64->X6, SystemContext.SystemContextAArch64->X7));
DEBUG ((DEBUG_ERROR, " X8 0x%016lx X9 0x%016lx X10 0x%016lx X11 0x%016lx\n", SystemContext.SystemContextAArch64->X8, SystemContext.SystemContextAArch64->X9, SystemContext.SystemContextAArch64->X10, SystemContext.SystemContextAArch64->X11));
DEBUG ((DEBUG_ERROR, " X12 0x%016lx X13 0x%016lx X14 0x%016lx X15 0x%016lx\n", SystemContext.SystemContextAArch64->X12, SystemContext.SystemContextAArch64->X13, SystemContext.SystemContextAArch64->X14, SystemContext.SystemContextAArch64->X15));
DEBUG ((DEBUG_ERROR, " X16 0x%016lx X17 0x%016lx X18 0x%016lx X19 0x%016lx\n", SystemContext.SystemContextAArch64->X16, SystemContext.SystemContextAArch64->X17, SystemContext.SystemContextAArch64->X18, SystemContext.SystemContextAArch64->X19));
DEBUG ((DEBUG_ERROR, " X20 0x%016lx X21 0x%016lx X22 0x%016lx X23 0x%016lx\n", SystemContext.SystemContextAArch64->X20, SystemContext.SystemContextAArch64->X21, SystemContext.SystemContextAArch64->X22, SystemContext.SystemContextAArch64->X23));
DEBUG ((DEBUG_ERROR, " X24 0x%016lx X25 0x%016lx X26 0x%016lx X27 0x%016lx\n", SystemContext.SystemContextAArch64->X24, SystemContext.SystemContextAArch64->X25, SystemContext.SystemContextAArch64->X26, SystemContext.SystemContextAArch64->X27));
DEBUG ((DEBUG_ERROR, " X28 0x%016lx FP 0x%016lx LR 0x%016lx \n", SystemContext.SystemContextAArch64->X28, SystemContext.SystemContextAArch64->FP, SystemContext.SystemContextAArch64->LR));
/* We save these as 128bit numbers, but have to print them as two 64bit numbers,
so swap the 64bit words to correctly represent a 128bit number. */
DEBUG ((EFI_D_ERROR, "\n V0 0x%016lx %016lx V1 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V0[1], SystemContext.SystemContextAArch64->V0[0], SystemContext.SystemContextAArch64->V1[1], SystemContext.SystemContextAArch64->V1[0]));
DEBUG ((EFI_D_ERROR, " V2 0x%016lx %016lx V3 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V2[1], SystemContext.SystemContextAArch64->V2[0], SystemContext.SystemContextAArch64->V3[1], SystemContext.SystemContextAArch64->V3[0]));
DEBUG ((EFI_D_ERROR, " V4 0x%016lx %016lx V5 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V4[1], SystemContext.SystemContextAArch64->V4[0], SystemContext.SystemContextAArch64->V5[1], SystemContext.SystemContextAArch64->V5[0]));
DEBUG ((EFI_D_ERROR, " V6 0x%016lx %016lx V7 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V6[1], SystemContext.SystemContextAArch64->V6[0], SystemContext.SystemContextAArch64->V7[1], SystemContext.SystemContextAArch64->V7[0]));
DEBUG ((EFI_D_ERROR, " V8 0x%016lx %016lx V9 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V8[1], SystemContext.SystemContextAArch64->V8[0], SystemContext.SystemContextAArch64->V9[1], SystemContext.SystemContextAArch64->V9[0]));
DEBUG ((EFI_D_ERROR, " V10 0x%016lx %016lx V11 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V10[1], SystemContext.SystemContextAArch64->V10[0], SystemContext.SystemContextAArch64->V11[1], SystemContext.SystemContextAArch64->V11[0]));
DEBUG ((EFI_D_ERROR, " V12 0x%016lx %016lx V13 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V12[1], SystemContext.SystemContextAArch64->V12[0], SystemContext.SystemContextAArch64->V13[1], SystemContext.SystemContextAArch64->V13[0]));
DEBUG ((EFI_D_ERROR, " V14 0x%016lx %016lx V15 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V14[1], SystemContext.SystemContextAArch64->V14[0], SystemContext.SystemContextAArch64->V15[1], SystemContext.SystemContextAArch64->V15[0]));
DEBUG ((EFI_D_ERROR, " V16 0x%016lx %016lx V17 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V16[1], SystemContext.SystemContextAArch64->V16[0], SystemContext.SystemContextAArch64->V17[1], SystemContext.SystemContextAArch64->V17[0]));
DEBUG ((EFI_D_ERROR, " V18 0x%016lx %016lx V19 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V18[1], SystemContext.SystemContextAArch64->V18[0], SystemContext.SystemContextAArch64->V19[1], SystemContext.SystemContextAArch64->V19[0]));
DEBUG ((EFI_D_ERROR, " V20 0x%016lx %016lx V21 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V20[1], SystemContext.SystemContextAArch64->V20[0], SystemContext.SystemContextAArch64->V21[1], SystemContext.SystemContextAArch64->V21[0]));
DEBUG ((EFI_D_ERROR, " V22 0x%016lx %016lx V23 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V22[1], SystemContext.SystemContextAArch64->V22[0], SystemContext.SystemContextAArch64->V23[1], SystemContext.SystemContextAArch64->V23[0]));
DEBUG ((EFI_D_ERROR, " V24 0x%016lx %016lx V25 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V24[1], SystemContext.SystemContextAArch64->V24[0], SystemContext.SystemContextAArch64->V25[1], SystemContext.SystemContextAArch64->V25[0]));
DEBUG ((EFI_D_ERROR, " V26 0x%016lx %016lx V27 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V26[1], SystemContext.SystemContextAArch64->V26[0], SystemContext.SystemContextAArch64->V27[1], SystemContext.SystemContextAArch64->V27[0]));
DEBUG ((EFI_D_ERROR, " V28 0x%016lx %016lx V29 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V28[1], SystemContext.SystemContextAArch64->V28[0], SystemContext.SystemContextAArch64->V29[1], SystemContext.SystemContextAArch64->V29[0]));
DEBUG ((EFI_D_ERROR, " V30 0x%016lx %016lx V31 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V30[1], SystemContext.SystemContextAArch64->V30[0], SystemContext.SystemContextAArch64->V31[1], SystemContext.SystemContextAArch64->V31[0]));
DEBUG ((DEBUG_ERROR, "\n V0 0x%016lx %016lx V1 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V0[1], SystemContext.SystemContextAArch64->V0[0], SystemContext.SystemContextAArch64->V1[1], SystemContext.SystemContextAArch64->V1[0]));
DEBUG ((DEBUG_ERROR, " V2 0x%016lx %016lx V3 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V2[1], SystemContext.SystemContextAArch64->V2[0], SystemContext.SystemContextAArch64->V3[1], SystemContext.SystemContextAArch64->V3[0]));
DEBUG ((DEBUG_ERROR, " V4 0x%016lx %016lx V5 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V4[1], SystemContext.SystemContextAArch64->V4[0], SystemContext.SystemContextAArch64->V5[1], SystemContext.SystemContextAArch64->V5[0]));
DEBUG ((DEBUG_ERROR, " V6 0x%016lx %016lx V7 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V6[1], SystemContext.SystemContextAArch64->V6[0], SystemContext.SystemContextAArch64->V7[1], SystemContext.SystemContextAArch64->V7[0]));
DEBUG ((DEBUG_ERROR, " V8 0x%016lx %016lx V9 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V8[1], SystemContext.SystemContextAArch64->V8[0], SystemContext.SystemContextAArch64->V9[1], SystemContext.SystemContextAArch64->V9[0]));
DEBUG ((DEBUG_ERROR, " V10 0x%016lx %016lx V11 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V10[1], SystemContext.SystemContextAArch64->V10[0], SystemContext.SystemContextAArch64->V11[1], SystemContext.SystemContextAArch64->V11[0]));
DEBUG ((DEBUG_ERROR, " V12 0x%016lx %016lx V13 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V12[1], SystemContext.SystemContextAArch64->V12[0], SystemContext.SystemContextAArch64->V13[1], SystemContext.SystemContextAArch64->V13[0]));
DEBUG ((DEBUG_ERROR, " V14 0x%016lx %016lx V15 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V14[1], SystemContext.SystemContextAArch64->V14[0], SystemContext.SystemContextAArch64->V15[1], SystemContext.SystemContextAArch64->V15[0]));
DEBUG ((DEBUG_ERROR, " V16 0x%016lx %016lx V17 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V16[1], SystemContext.SystemContextAArch64->V16[0], SystemContext.SystemContextAArch64->V17[1], SystemContext.SystemContextAArch64->V17[0]));
DEBUG ((DEBUG_ERROR, " V18 0x%016lx %016lx V19 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V18[1], SystemContext.SystemContextAArch64->V18[0], SystemContext.SystemContextAArch64->V19[1], SystemContext.SystemContextAArch64->V19[0]));
DEBUG ((DEBUG_ERROR, " V20 0x%016lx %016lx V21 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V20[1], SystemContext.SystemContextAArch64->V20[0], SystemContext.SystemContextAArch64->V21[1], SystemContext.SystemContextAArch64->V21[0]));
DEBUG ((DEBUG_ERROR, " V22 0x%016lx %016lx V23 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V22[1], SystemContext.SystemContextAArch64->V22[0], SystemContext.SystemContextAArch64->V23[1], SystemContext.SystemContextAArch64->V23[0]));
DEBUG ((DEBUG_ERROR, " V24 0x%016lx %016lx V25 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V24[1], SystemContext.SystemContextAArch64->V24[0], SystemContext.SystemContextAArch64->V25[1], SystemContext.SystemContextAArch64->V25[0]));
DEBUG ((DEBUG_ERROR, " V26 0x%016lx %016lx V27 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V26[1], SystemContext.SystemContextAArch64->V26[0], SystemContext.SystemContextAArch64->V27[1], SystemContext.SystemContextAArch64->V27[0]));
DEBUG ((DEBUG_ERROR, " V28 0x%016lx %016lx V29 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V28[1], SystemContext.SystemContextAArch64->V28[0], SystemContext.SystemContextAArch64->V29[1], SystemContext.SystemContextAArch64->V29[0]));
DEBUG ((DEBUG_ERROR, " V30 0x%016lx %016lx V31 0x%016lx %016lx\n", SystemContext.SystemContextAArch64->V30[1], SystemContext.SystemContextAArch64->V30[0], SystemContext.SystemContextAArch64->V31[1], SystemContext.SystemContextAArch64->V31[0]));
DEBUG ((EFI_D_ERROR, "\n SP 0x%016lx ELR 0x%016lx SPSR 0x%08lx FPSR 0x%08lx\n ESR 0x%08lx FAR 0x%016lx\n", SystemContext.SystemContextAArch64->SP, SystemContext.SystemContextAArch64->ELR, SystemContext.SystemContextAArch64->SPSR, SystemContext.SystemContextAArch64->FPSR, SystemContext.SystemContextAArch64->ESR, SystemContext.SystemContextAArch64->FAR));
DEBUG ((DEBUG_ERROR, "\n SP 0x%016lx ELR 0x%016lx SPSR 0x%08lx FPSR 0x%08lx\n ESR 0x%08lx FAR 0x%016lx\n", SystemContext.SystemContextAArch64->SP, SystemContext.SystemContextAArch64->ELR, SystemContext.SystemContextAArch64->SPSR, SystemContext.SystemContextAArch64->FPSR, SystemContext.SystemContextAArch64->ESR, SystemContext.SystemContextAArch64->FAR));
DEBUG ((EFI_D_ERROR, "\n ESR : EC 0x%02x IL 0x%x ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF ));
DEBUG ((DEBUG_ERROR, "\n ESR : EC 0x%02x IL 0x%x ISS 0x%08x\n", (SystemContext.SystemContextAArch64->ESR & 0xFC000000) >> 26, (SystemContext.SystemContextAArch64->ESR >> 25) & 0x1, SystemContext.SystemContextAArch64->ESR & 0x1FFFFFF));
DescribeExceptionSyndrome (SystemContext.SystemContextAArch64->ESR);
DEBUG ((EFI_D_ERROR, "\nStack dump:\n"));
DEBUG ((DEBUG_ERROR, "\nStack dump:\n"));
for (Offset = -256; Offset < 256; Offset += 32) {
DEBUG ((EFI_D_ERROR, "%c %013lx: %016lx %016lx %016lx %016lx\n",
DEBUG ((
DEBUG_ERROR,
"%c %013lx: %016lx %016lx %016lx %016lx\n",
Offset == 0 ? '>' : ' ',
SystemContext.SystemContextAArch64->SP + Offset,
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 8),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 16),
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)));
*(UINT64 *)(SystemContext.SystemContextAArch64->SP + Offset + 24)
));
}
ASSERT (FALSE);

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