Files
system76-edk2/OvmfPkg/ResetVector/ResetVector.nasmb
James Bottomley 0deeab36d1 OvmfPkg/AmdSev: reserve MEMFD space for for firmware config hashes
Split the existing 4KB page reserved for SEV launch secrets into two
parts: first 3KB for SEV launch secrets and last 1KB for firmware
config hashes.

The area of the firmware config hashes will be attested (measured) by
the PSP and thus the untrusted VMM can't pass in different files from
what the guest owner allows.

Declare this in the Reset Vector table using GUID
7255371f-3a3b-4b04-927b-1da6efa8d454 and a uint32_t table of a base
and size value (similar to the structure used to declare the launch
secret block).

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ashish Kalra <ashish.kalra@amd.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3457
Co-developed-by: Dov Murik <dovmurik@linux.ibm.com>
Signed-off-by: Dov Murik <dovmurik@linux.ibm.com>
Signed-off-by: James Bottomley <jejb@linux.ibm.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-07-29 09:49:50 +00:00

96 lines
3.2 KiB
Plaintext

;------------------------------------------------------------------------------
; @file
; This file includes all other code files to assemble the reset vector code
;
; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
;
; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include
; Base.h to use the C pre-processor to determine the architecture.
;
%ifndef ARCH_IA32
%ifndef ARCH_X64
#include <Base.h>
#if defined (MDE_CPU_IA32)
%define ARCH_IA32
#elif defined (MDE_CPU_X64)
%define ARCH_X64
#endif
%endif
%endif
%ifdef ARCH_IA32
%ifdef ARCH_X64
%error "Only one of ARCH_IA32 or ARCH_X64 can be defined."
%endif
%elifdef ARCH_X64
%else
%error "Either ARCH_IA32 or ARCH_X64 must be defined."
%endif
%include "CommonMacros.inc"
%include "PostCodes.inc"
%ifdef DEBUG_PORT80
%include "Port80Debug.asm"
%elifdef DEBUG_SERIAL
%include "SerialDebug.asm"
%else
%include "DebugDisabled.asm"
%endif
%include "Ia32/SearchForBfvBase.asm"
%include "Ia32/SearchForSecEntry.asm"
%ifdef ARCH_X64
#include <AutoGen.h>
%if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)
%error "This implementation inherently depends on PcdOvmfSecPageTablesSize"
%endif
%if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)
%error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"
%endif
%if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)
%error "This implementation inherently depends on PcdOvmfSecGhcbSize"
%endif
%if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \
((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))
%error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"
%endif
%define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))
%define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))
%define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))
%define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))
%define SEV_ES_WORK_AREA (FixedPcdGet32 (PcdSevEsWorkAreaBase))
%define SEV_ES_WORK_AREA_RDRAND (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 8)
%define SEV_ES_WORK_AREA_ENC_MASK (FixedPcdGet32 (PcdSevEsWorkAreaBase) + 16)
%define SEV_ES_VC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
%include "Ia32/Flat32ToFlat64.asm"
%include "Ia32/AmdSev.asm"
%include "Ia32/PageTables64.asm"
%endif
%include "Ia16/Real16ToFlat32.asm"
%include "Ia16/Init16.asm"
%include "Main.asm"
%define SEV_ES_AP_RESET_IP FixedPcdGet32 (PcdSevEsWorkAreaBase)
%define SEV_LAUNCH_SECRET_BASE FixedPcdGet32 (PcdSevLaunchSecretBase)
%define SEV_LAUNCH_SECRET_SIZE FixedPcdGet32 (PcdSevLaunchSecretSize)
%define SEV_FW_HASH_BLOCK_BASE FixedPcdGet32 (PcdQemuHashTableBase)
%define SEV_FW_HASH_BLOCK_SIZE FixedPcdGet32 (PcdQemuHashTableSize)
%include "Ia16/ResetVectorVtf0.asm"