bbc04972bc
In coreboot, we mark GPU prefmem above 4GB, because NVIDIA wants a lot
(16GB region on the 30 series), otherwise coreboot will obviously fail
to allocate the resources.
In EDK2, we then end up hitting this assert:
InitRootBridge: populated root bus 0, with room for 36 subordinate bus(es)
RootBridge: PciRoot(0x0)
Support/Attr: 7001F / 7001F
DmaAbove4G: No
NoExtConfSpace: No
AllocAttr: 0 ()
Bus: 0 - 24 Translation=0
Io: 1000 - EFFF Translation=0
Mem: 80400000 - 1001FFFFFF Translation=0
MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
ASSERT [PciHostBridgeDxe] .../edk2/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c(120): Bridge->Mem.Limit < 0x0000000100000000ULL
So, bring back Pci*NoEnumerationDxe from the deleted DuetPkg, which
doesn't check anything and let's us boot.
Signed-off-by: Tim Crawford <tcrawford@system76.com>
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/*++
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Copyright (c) 2005 - 2006, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PciPowerManagement.h
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Abstract:
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PCI Bus Driver
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Revision History
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--*/
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#ifndef _EFI_PCI_POWER_MANAGEMENT_H
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#define _EFI_PCI_POWER_MANAGEMENT_H
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EFI_STATUS
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EFIAPI
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ResetPowerManagementFeature (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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TODO: Add function description
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Arguments:
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PciIoDevice - TODO: add argument description
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Returns:
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TODO: add return values
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--*/
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;
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#endif
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