The Confidential Computing blob defined here is intended to match the definition defined by linux guest kernel. Previously, both definitions relied on natural alignment, but that relies on both OVMF and kernel being compiled as 64-bit. While there aren't currently any plans to enable SNP support for 32-bit compilations, the kernel definition has since been updated to use explicit padding/reserved fields to avoid this dependency. Update OVMF to match that definition. While at it, also fix up the Reserved fields to match the numbering used in the kernel. No functional changes (for currently-supported environments, at least). Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Jiewen Yao <jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael Roth <michael.roth@amd.com>
366 lines
11 KiB
C
366 lines
11 KiB
C
/** @file
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AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list
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in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV
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is enabled.
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Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <IndustryStandard/Q35MchIch9.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/MemEncryptSevLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Guid/ConfidentialComputingSevSnpBlob.h>
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#include <Library/PcdLib.h>
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#include <Pi/PrePiDxeCis.h>
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#include <Protocol/SevMemoryAcceptance.h>
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#include <Protocol/MemoryAccept.h>
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#include <Uefi/UefiSpec.h>
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// Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h
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#define EFI_MEMORY_INTERNAL_MASK 0x0700000000000000ULL
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STATIC
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EFI_STATUS
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AllocateConfidentialComputingBlob (
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OUT CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION **CcBlobPtr
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)
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{
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EFI_STATUS Status;
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CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION *CcBlob;
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Status = gBS->AllocatePool (
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EfiACPIReclaimMemory,
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sizeof (CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION),
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(VOID **)&CcBlob
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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CcBlob->Header = SIGNATURE_32 ('A', 'M', 'D', 'E');
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CcBlob->Version = 1;
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CcBlob->Reserved = 0;
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CcBlob->SecretsPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase);
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CcBlob->SecretsSize = FixedPcdGet32 (PcdOvmfSnpSecretsSize);
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CcBlob->Reserved1 = 0;
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CcBlob->CpuidPhysicalAddress = (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase);
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CcBlob->CpuidLSize = FixedPcdGet32 (PcdOvmfCpuidSize);
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CcBlob->Reserved2 = 0;
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*CcBlobPtr = CcBlob;
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return EFI_SUCCESS;
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}
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STATIC EFI_HANDLE mAmdSevDxeHandle = NULL;
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STATIC BOOLEAN mAcceptAllMemoryAtEBS = TRUE;
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STATIC EFI_EVENT mAcceptAllMemoryEvent = NULL;
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STATIC
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EFI_STATUS
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EFIAPI
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AmdSevMemoryAccept (
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IN EDKII_MEMORY_ACCEPT_PROTOCOL *This,
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IN EFI_PHYSICAL_ADDRESS StartAddress,
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IN UINTN Size
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)
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{
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//
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// The StartAddress must be page-aligned, and the Size must be a positive
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// multiple of SIZE_4KB. Use an assert instead of returning an erros since
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// this is an EDK2-internal protocol.
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//
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ASSERT (IS_ALIGNED (StartAddress, SIZE_4KB));
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ASSERT (IS_ALIGNED (Size, SIZE_4KB));
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ASSERT (Size != 0);
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MemEncryptSevSnpPreValidateSystemRam (
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StartAddress,
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EFI_SIZE_TO_PAGES (Size)
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);
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return EFI_SUCCESS;
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}
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STATIC
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EFI_STATUS
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AcceptAllMemory (
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VOID
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)
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{
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
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UINTN NumEntries;
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UINTN Index;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "Accepting all memory\n"));
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/*
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* Get a copy of the memory space map to iterate over while
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* changing the map.
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*/
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Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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for (Index = 0; Index < NumEntries; Index++) {
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CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
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Desc = &AllDescMap[Index];
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if (Desc->GcdMemoryType != EFI_GCD_MEMORY_TYPE_UNACCEPTED) {
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continue;
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}
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Status = AmdSevMemoryAccept (
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NULL,
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Desc->BaseAddress,
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Desc->Length
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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Status = gDS->RemoveMemorySpace (Desc->BaseAddress, Desc->Length);
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if (EFI_ERROR (Status)) {
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break;
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}
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Status = gDS->AddMemorySpace (
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EfiGcdMemoryTypeSystemMemory,
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Desc->BaseAddress,
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Desc->Length,
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// Allocable system memory resource capabilities as masked
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// in MdeModulePkg/Core/Dxe/Mem/Page.c:PromoteMemoryResource
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Desc->Capabilities & ~(EFI_MEMORY_INTERNAL_MASK | EFI_MEMORY_RUNTIME)
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);
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if (EFI_ERROR (Status)) {
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break;
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}
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}
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gBS->FreePool (AllDescMap);
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gBS->CloseEvent (mAcceptAllMemoryEvent);
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return Status;
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}
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VOID
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EFIAPI
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ResolveUnacceptedMemory (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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EFI_STATUS Status;
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if (!mAcceptAllMemoryAtEBS) {
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return;
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}
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Status = AcceptAllMemory ();
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ASSERT_EFI_ERROR (Status);
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}
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STATIC
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EFI_STATUS
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EFIAPI
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AllowUnacceptedMemory (
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IN OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL *This
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)
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{
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mAcceptAllMemoryAtEBS = FALSE;
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return EFI_SUCCESS;
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}
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STATIC
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OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL
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mMemoryAcceptanceProtocol = { AllowUnacceptedMemory };
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STATIC EDKII_MEMORY_ACCEPT_PROTOCOL mMemoryAcceptProtocol = {
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AmdSevMemoryAccept
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};
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EFI_STATUS
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EFIAPI
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AmdSevDxeEntryPoint (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;
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UINTN NumEntries;
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UINTN Index;
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CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION *SnpBootDxeTable;
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//
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// Do nothing when SEV is not enabled
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//
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if (!MemEncryptSevIsEnabled ()) {
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return EFI_UNSUPPORTED;
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}
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//
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// Iterate through the GCD map and clear the C-bit from MMIO and NonExistent
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// memory space. The NonExistent memory space will be used for mapping the
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// MMIO space added later (eg PciRootBridge). By clearing both known MMIO and
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// NonExistent memory space can gurantee that current and furture MMIO adds
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// will have C-bit cleared.
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//
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Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);
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if (!EFI_ERROR (Status)) {
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for (Index = 0; Index < NumEntries; Index++) {
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CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;
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Desc = &AllDescMap[Index];
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if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) ||
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(Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))
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{
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Status = MemEncryptSevClearMmioPageEncMask (
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0,
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Desc->BaseAddress,
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EFI_SIZE_TO_PAGES (Desc->Length)
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);
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ASSERT_EFI_ERROR (Status);
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}
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}
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FreePool (AllDescMap);
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}
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//
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// If PCI Express is enabled, the MMCONFIG area has been reserved, rather
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// than marked as MMIO, and so the C-bit won't be cleared by the above walk
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// through the GCD map. Check for the MMCONFIG area and clear the C-bit for
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// the range.
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//
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if (PcdGet16 (PcdOvmfHostBridgePciDevId) == INTEL_Q35_MCH_DEVICE_ID) {
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Status = MemEncryptSevClearMmioPageEncMask (
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0,
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FixedPcdGet64 (PcdPciExpressBaseAddress),
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EFI_SIZE_TO_PAGES (SIZE_256MB)
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);
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ASSERT_EFI_ERROR (Status);
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}
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//
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// When SMM is enabled, clear the C-bit from SMM Saved State Area
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//
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// NOTES: The SavedStateArea address cleared here is before SMBASE
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// relocation. Currently, we do not clear the SavedStateArea address after
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// SMBASE is relocated due to the following reasons:
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//
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// 1) Guest BIOS never access the relocated SavedStateArea.
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//
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// 2) The C-bit works on page-aligned address, but the SavedStateArea
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// address is not a page-aligned. Theoretically, we could roundup the address
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// and clear the C-bit of aligned address but looking carefully we found
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// that some portion of the page contains code -- which will causes a bigger
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// issues for SEV guest. When SEV is enabled, all the code must be encrypted
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// otherwise hardware will cause trap.
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//
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// We restore the C-bit for this SMM Saved State Area after SMBASE relocation
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// is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).
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//
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if (FeaturePcdGet (PcdSmmSmramRequire)) {
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UINTN MapPagesBase;
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UINTN MapPagesCount;
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Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (
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&MapPagesBase,
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&MapPagesCount
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Although these pages were set aside (i.e., allocated) by PlatformPei, we
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// could be after a warm reboot from the OS. Don't leak any stale OS data
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// to the hypervisor.
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//
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ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));
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Status = MemEncryptSevClearPageEncMask (
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0, // Cr3BaseAddress -- use current CR3
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MapPagesBase, // BaseAddress
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MapPagesCount // NumPages
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((
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DEBUG_ERROR,
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"%a: MemEncryptSevClearPageEncMask(): %r\n",
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__func__,
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Status
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));
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ASSERT (FALSE);
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CpuDeadLoop ();
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}
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}
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Status = AllocateConfidentialComputingBlob (&SnpBootDxeTable);
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if (EFI_ERROR (Status)) {
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DEBUG ((
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DEBUG_ERROR,
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"%a: AllocateConfidentialComputingBlob(): %r\n",
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__func__,
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Status
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));
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ASSERT (FALSE);
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CpuDeadLoop ();
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}
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if (MemEncryptSevSnpIsEnabled ()) {
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//
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// Memory acceptance began being required in SEV-SNP, so install the
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// memory accept protocol implementation for a SEV-SNP active guest.
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//
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Status = gBS->InstallMultipleProtocolInterfaces (
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&mAmdSevDxeHandle,
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&gEdkiiMemoryAcceptProtocolGuid,
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&mMemoryAcceptProtocol,
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&gOvmfSevMemoryAcceptanceProtocolGuid,
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&mMemoryAcceptanceProtocol,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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// SEV-SNP support does not automatically imply unaccepted memory support,
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// so make ExitBootServices accept all unaccepted memory if support is
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// not communicated.
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Status = gBS->CreateEventEx (
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EVT_NOTIFY_SIGNAL,
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TPL_CALLBACK,
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ResolveUnacceptedMemory,
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NULL,
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&gEfiEventBeforeExitBootServicesGuid,
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&mAcceptAllMemoryEvent
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "AllowUnacceptedMemory event creation for EventBeforeExitBootServices failed.\n"));
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}
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//
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// If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB.
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// It contains the location for both the Secrets and CPUID page.
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//
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return gBS->InstallConfigurationTable (
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&gConfidentialComputingSevSnpBlobGuid,
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SnpBootDxeTable
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);
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}
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return EFI_SUCCESS;
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}
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