67a6f414aa
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4353
Due to AMD erratum #1467, an SEV-SNP VMSA should not be 2MB aligned. To
work around this issue, allocate two pages instead of one. Because of the
way that page allocation is implemented, always try to use the second
page. If the second page is not 2MB aligned, free the first page and use
the second page. If the second page is 2MB aligned, free the second page
and use the first page. Freeing in this way reduces holes in the memory
map.
Fixes: 06544455d0 ("UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation ...")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
328 lines
9.4 KiB
C
328 lines
9.4 KiB
C
/** @file
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AMD SEV helper function.
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Copyright (c) 2021, AMD Incorporated. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "MpLib.h"
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#include <Library/CcExitLib.h>
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#include <Register/Amd/Fam17Msr.h>
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#include <Register/Amd/Ghcb.h>
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#define _IS_ALIGNED(x, y) (ALIGN_POINTER((x), (y)) == (x))
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/**
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Perform the requested AP Creation action.
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@param[in] SaveArea Pointer to VM save area (VMSA)
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@param[in] ApicId APIC ID of the vCPU
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@param[in] Action AP action to perform
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@retval TRUE Action completed successfully
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@retval FALSE Action did not complete successfully
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**/
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STATIC
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BOOLEAN
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SevSnpPerformApAction (
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IN SEV_ES_SAVE_AREA *SaveArea,
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IN UINT32 ApicId,
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IN UINTN Action
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)
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{
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MSR_SEV_ES_GHCB_REGISTER Msr;
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GHCB *Ghcb;
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BOOLEAN InterruptState;
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UINT64 ExitInfo1;
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UINT64 ExitInfo2;
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UINT32 RmpAdjustStatus;
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UINT64 VmgExitStatus;
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if (Action == SVM_VMGEXIT_SNP_AP_CREATE) {
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//
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// To turn the page into a recognized VMSA page, issue RMPADJUST:
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// Target VMPL but numerically higher than current VMPL
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// Target PermissionMask is not used
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//
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RmpAdjustStatus = SevSnpRmpAdjust (
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(EFI_PHYSICAL_ADDRESS)(UINTN)SaveArea,
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TRUE
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);
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if (RmpAdjustStatus != 0) {
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DEBUG ((DEBUG_INFO, "SEV-SNP: RMPADJUST failed for VMSA creation\n"));
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ASSERT (FALSE);
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return FALSE;
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}
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}
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ExitInfo1 = (UINT64)ApicId << 32;
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ExitInfo1 |= Action;
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ExitInfo2 = (UINT64)(UINTN)SaveArea;
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Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
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Ghcb = Msr.Ghcb;
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CcExitVmgInit (Ghcb, &InterruptState);
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if (Action == SVM_VMGEXIT_SNP_AP_CREATE) {
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Ghcb->SaveArea.Rax = SaveArea->SevFeatures;
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CcExitVmgSetOffsetValid (Ghcb, GhcbRax);
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}
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VmgExitStatus = CcExitVmgExit (
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Ghcb,
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SVM_EXIT_SNP_AP_CREATION,
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ExitInfo1,
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ExitInfo2
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);
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CcExitVmgDone (Ghcb, InterruptState);
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if (VmgExitStatus != 0) {
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DEBUG ((DEBUG_INFO, "SEV-SNP: AP Destroy failed\n"));
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ASSERT (FALSE);
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return FALSE;
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}
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if (Action == SVM_VMGEXIT_SNP_AP_DESTROY) {
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//
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// Make the current VMSA not runnable and accessible to be
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// reprogrammed.
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//
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RmpAdjustStatus = SevSnpRmpAdjust (
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(EFI_PHYSICAL_ADDRESS)(UINTN)SaveArea,
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FALSE
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);
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if (RmpAdjustStatus != 0) {
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DEBUG ((DEBUG_INFO, "SEV-SNP: RMPADJUST failed for VMSA reset\n"));
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ASSERT (FALSE);
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return FALSE;
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}
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}
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return TRUE;
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}
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/**
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Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.
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@param[in] CpuMpData Pointer to CPU MP Data
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@param[in] CpuData Pointer to CPU AP Data
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@param[in] ApicId APIC ID of the vCPU
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**/
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VOID
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SevSnpCreateSaveArea (
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IN CPU_MP_DATA *CpuMpData,
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IN CPU_AP_DATA *CpuData,
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UINT32 ApicId
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)
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{
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UINT8 *Pages;
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SEV_ES_SAVE_AREA *SaveArea;
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IA32_CR0 ApCr0;
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IA32_CR0 ResetCr0;
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IA32_CR4 ApCr4;
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IA32_CR4 ResetCr4;
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UINTN StartIp;
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UINT8 SipiVector;
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if (CpuData->SevEsSaveArea == NULL) {
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//
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// Allocate a page for the SEV-ES Save Area and initialize it. Due to AMD
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// erratum #1467 (VMSA cannot be on a 2MB boundary), allocate an extra page
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// to choose from to work around the issue.
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//
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Pages = AllocateReservedPages (2);
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if (!Pages) {
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return;
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}
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//
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// Since page allocation works by allocating downward in the address space,
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// try to always free the first (lower address) page to limit possible holes
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// in the memory map. So, if the address of the second page is 2MB aligned,
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// then use the first page and free the second page. Otherwise, free the
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// first page and use the second page.
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//
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if (_IS_ALIGNED (Pages + EFI_PAGE_SIZE, SIZE_2MB)) {
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SaveArea = (SEV_ES_SAVE_AREA *)Pages;
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FreePages (Pages + EFI_PAGE_SIZE, 1);
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} else {
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SaveArea = (SEV_ES_SAVE_AREA *)(Pages + EFI_PAGE_SIZE);
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FreePages (Pages, 1);
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}
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CpuData->SevEsSaveArea = SaveArea;
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} else {
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SaveArea = CpuData->SevEsSaveArea;
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//
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// Tell the hypervisor to not use the current VMSA
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//
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if (!SevSnpPerformApAction (SaveArea, ApicId, SVM_VMGEXIT_SNP_AP_DESTROY)) {
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return;
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}
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}
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ZeroMem (SaveArea, EFI_PAGE_SIZE);
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//
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// Propogate the CR0.NW and CR0.CD setting to the AP
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//
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ResetCr0.UintN = 0x00000010;
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ApCr0.UintN = CpuData->VolatileRegisters.Cr0;
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if (ApCr0.Bits.NW) {
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ResetCr0.Bits.NW = 1;
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}
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if (ApCr0.Bits.CD) {
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ResetCr0.Bits.CD = 1;
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}
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//
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// Propagate the CR4.MCE setting to the AP
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//
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ResetCr4.UintN = 0;
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ApCr4.UintN = CpuData->VolatileRegisters.Cr4;
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if (ApCr4.Bits.MCE) {
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ResetCr4.Bits.MCE = 1;
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}
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//
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// Convert the start IP into a SIPI Vector
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//
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StartIp = CpuMpData->MpCpuExchangeInfo->BufferStart;
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SipiVector = (UINT8)(StartIp >> 12);
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//
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// Set the CS:RIP value based on the start IP
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//
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SaveArea->Cs.Base = SipiVector << 12;
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SaveArea->Cs.Selector = SipiVector << 8;
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SaveArea->Cs.Limit = 0xFFFF;
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SaveArea->Cs.Attributes.Bits.Present = 1;
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SaveArea->Cs.Attributes.Bits.Sbit = 1;
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SaveArea->Cs.Attributes.Bits.Type = SEV_ES_RESET_CODE_SEGMENT_TYPE;
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SaveArea->Rip = StartIp & 0xFFF;
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//
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// Set the remaining values as defined in APM for INIT
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//
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SaveArea->Ds.Limit = 0xFFFF;
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SaveArea->Ds.Attributes.Bits.Present = 1;
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SaveArea->Ds.Attributes.Bits.Sbit = 1;
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SaveArea->Ds.Attributes.Bits.Type = SEV_ES_RESET_DATA_SEGMENT_TYPE;
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SaveArea->Es = SaveArea->Ds;
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SaveArea->Fs = SaveArea->Ds;
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SaveArea->Gs = SaveArea->Ds;
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SaveArea->Ss = SaveArea->Ds;
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SaveArea->Gdtr.Limit = 0xFFFF;
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SaveArea->Ldtr.Limit = 0xFFFF;
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SaveArea->Ldtr.Attributes.Bits.Present = 1;
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SaveArea->Ldtr.Attributes.Bits.Type = SEV_ES_RESET_LDT_TYPE;
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SaveArea->Idtr.Limit = 0xFFFF;
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SaveArea->Tr.Limit = 0xFFFF;
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SaveArea->Ldtr.Attributes.Bits.Present = 1;
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SaveArea->Ldtr.Attributes.Bits.Type = SEV_ES_RESET_TSS_TYPE;
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SaveArea->Efer = 0x1000;
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SaveArea->Cr4 = ResetCr4.UintN;
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SaveArea->Cr0 = ResetCr0.UintN;
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SaveArea->Dr7 = 0x0400;
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SaveArea->Dr6 = 0xFFFF0FF0;
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SaveArea->Rflags = 0x0002;
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SaveArea->GPat = 0x0007040600070406ULL;
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SaveArea->XCr0 = 0x0001;
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SaveArea->Mxcsr = 0x1F80;
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SaveArea->X87Ftw = 0x5555;
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SaveArea->X87Fcw = 0x0040;
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//
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// Set the SEV-SNP specific fields for the save area:
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// VMPL - always VMPL0
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// SEV_FEATURES - equivalent to the SEV_STATUS MSR right shifted 2 bits
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//
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SaveArea->Vmpl = 0;
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SaveArea->SevFeatures = AsmReadMsr64 (MSR_SEV_STATUS) >> 2;
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SevSnpPerformApAction (SaveArea, ApicId, SVM_VMGEXIT_SNP_AP_CREATE);
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}
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/**
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Create SEV-SNP APs.
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@param[in] CpuMpData Pointer to CPU MP Data
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@param[in] ProcessorNumber The handle number of specified processor
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(-1 for all APs)
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**/
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VOID
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SevSnpCreateAP (
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IN CPU_MP_DATA *CpuMpData,
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IN INTN ProcessorNumber
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)
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{
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CPU_INFO_IN_HOB *CpuInfoInHob;
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CPU_AP_DATA *CpuData;
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UINTN Index;
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UINT32 ApicId;
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ASSERT (CpuMpData->MpCpuExchangeInfo->BufferStart < 0x100000);
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CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
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if (ProcessorNumber < 0) {
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for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
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if (Index != CpuMpData->BspNumber) {
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CpuData = &CpuMpData->CpuData[Index];
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ApicId = CpuInfoInHob[Index].ApicId,
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SevSnpCreateSaveArea (CpuMpData, CpuData, ApicId);
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}
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}
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} else {
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Index = (UINTN)ProcessorNumber;
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CpuData = &CpuMpData->CpuData[Index];
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ApicId = CpuInfoInHob[ProcessorNumber].ApicId,
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SevSnpCreateSaveArea (CpuMpData, CpuData, ApicId);
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}
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}
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/**
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Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.
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@param[in] PageAddress
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@param[in] VmsaPage
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@return RMPADJUST return value
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**/
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UINT32
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SevSnpRmpAdjust (
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IN EFI_PHYSICAL_ADDRESS PageAddress,
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IN BOOLEAN VmsaPage
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)
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{
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UINT64 Rdx;
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//
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// The RMPADJUST instruction is used to set or clear the VMSA bit for a
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// page. The VMSA change is only made when running at VMPL0 and is ignored
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// otherwise. If too low a target VMPL is specified, the instruction can
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// succeed without changing the VMSA bit when not running at VMPL0. Using a
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// target VMPL level of 1, RMPADJUST will return a FAIL_PERMISSION error if
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// not running at VMPL0, thus ensuring that the VMSA bit is set appropriately
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// when no error is returned.
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//
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Rdx = 1;
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if (VmsaPage) {
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Rdx |= RMPADJUST_VMSA_PAGE_BIT;
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}
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return AsmRmpAdjust ((UINT64)PageAddress, 0, Rdx);
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}
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