2aa107c0aa
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) Signed-off-by: Jason Lou <yun.lou@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com>
35 lines
807 B
NASM
35 lines
807 B
NASM
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;-------------------------------------------------------------------------------
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%include "Nasm.inc"
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DEFAULT REL
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SECTION .text
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global ASM_PFX(DisableCet)
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ASM_PFX(DisableCet):
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; Skip the pushed data for call
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mov rax, 1
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incsspq rax
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mov rax, cr4
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btr eax, 23 ; clear CET
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mov cr4, rax
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ret
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global ASM_PFX(EnableCet)
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ASM_PFX(EnableCet):
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mov rax, cr4
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bts eax, 23 ; set CET
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mov cr4, rax
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; use jmp to skip the check for ret
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pop rax
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jmp rax
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