87bc3f192e
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409 This commit will add the AHCI mode ATA device support in the PEI phase. More specifically, the newly add AhciPei driver will consume the ATA AHCI host controller PPI for ATA controllers working under AHCI code within the system. And then produces the below PPIs for each controller: EDKII PEI ATA PassThru PPI Storage Security Command PPI Also, the driver will consume the S3StorageDeviceInitList LockBox in S3 phase. The purpose is to perform an on-demand (partial) ATA device enumeration/initialization on each controller to benefit the S3 resume performance. The implementation of this driver is currently based on the below specifications: Serial ATA Revision 2.6 Serial ATA Advanced Host Controller Interface (AHCI) 1.3.1 AT Attachment with Packet Interface - 6 (ATA/ATAPI-6) Cc: Jian J Wang <jian.j.wang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
20 lines
652 B
Plaintext
20 lines
652 B
Plaintext
// /** @file
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// AhciPei Localized Strings and Content
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//
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// Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions
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// of the BSD License which accompanies this distribution. The
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// full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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// **/
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#string STR_PROPERTIES_MODULE_NAME
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#language en-US
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"AHCI Bus Peim"
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