cf580da1bc
Instead of cleaning the data cache to the PoU by virtual address and subsequently invalidating the entire I-cache, invalidate only the range that we just cleaned. This way, we don't invalidate other cachelines unnecessarily. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
132 lines
2.9 KiB
C
132 lines
2.9 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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STATIC
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VOID
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CacheRangeOperation (
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IN VOID *Start,
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IN UINTN Length,
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IN LINE_OPERATION LineOperation,
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IN UINTN LineLength
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)
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{
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UINTN ArmCacheLineAlignmentMask = LineLength - 1;
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// Align address (rounding down)
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UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
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UINTN EndAddress = (UINTN)Start + Length;
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// Perform the line operation on an address in each cache line
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while (AlignedAddress < EndAddress) {
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LineOperation(AlignedAddress);
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AlignedAddress += LineLength;
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}
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ArmDataSynchronizationBarrier ();
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}
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VOID
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EFIAPI
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InvalidateInstructionCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID
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EFIAPI
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InvalidateDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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InvalidateInstructionCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
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ArmDataCacheLineLength ());
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CacheRangeOperation (Address, Length,
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ArmInvalidateInstructionCacheEntryToPoUByMVA,
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ArmInstructionCacheLineLength ());
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ArmInstructionSynchronizationBarrier ();
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return Address;
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}
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VOID
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EFIAPI
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WriteBackInvalidateDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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WriteBackInvalidateDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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VOID
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EFIAPI
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WriteBackDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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WriteBackDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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VOID *
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EFIAPI
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InvalidateDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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