0787bc6184
On MpCore system, the primary core can now be any core of the system. To identify the primary core, you can use 'gArmTokenSpaceGuid.PcdArmPrimaryCoreMask' and 'gArmTokenSpaceGuid.PcdArmPrimaryCore'. These PCDs by default use the ClusterId and CoreId to identify the core. And the primary core is defined as the ClusetrId=0 and CoreId=0. The helper macros are: IS_PRIMARY_CORE(MpId), GET_CORE_ID(MpId), GET_CLUSTER_ID(MpId), GET_CORE_POS(MpId), PRIMARY_CORE_ID. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12412 6f19259b-4bc3-4df7-8a09-765794883524
135 lines
5.7 KiB
Plaintext
135 lines
5.7 KiB
Plaintext
#/** @file
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# ARM processor package.
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#
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# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = ArmPkg
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PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F
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PACKAGE_VERSION = 0.1
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################################################################################
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#
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# Include Section - list of Include Paths that are provided by this package.
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# Comments are used for Keywords and Module Types.
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#
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# Supported Module Types:
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# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
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#
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################################################################################
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[Includes.common]
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Include # Root include for the package
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[LibraryClasses.common]
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ArmLib|Include/Library/ArmLib.h
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SemihostLib|Include/Library/Semihosting.h
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UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h
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DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h
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ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
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[Guids.common]
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gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }
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[Protocols.common]
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gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }
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[PcdsFeatureFlag.common]
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gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001
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# On ARM Architecture with the Security Extension, the address for the
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# Vector Table can be mapped anywhere in the memory map. It means we can
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# point the Exception Vector Table to its location in CpuDxe.
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# By default we copy the Vector Table at PcdGet32(PcdCpuVectorBaseAddress)
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gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022
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# Set this PCD to TRUE if the Exception Vector is changed to add debugger support before
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# it has been configured by the CPU DXE
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gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
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gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025
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[PcdsFixedAtBuild.common]
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# This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.
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# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
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gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024
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gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002
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gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004
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gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005
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#
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# ARM PL390 General Interrupt Controller
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
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gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
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#
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# ARM Secure Firmware PCDs
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#
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gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
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gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
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gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F
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gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
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#
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# ARM Normal (or Non Secure) Firmware PCDs
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#
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B
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gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress|0|UINT32|0x0000002D
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gArmTokenSpaceGuid.PcdNormalFvSize|0|UINT32|0x0000002E
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# System Memory (DRAM): These PCDs define the region of in-built system memory
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# Some platforms can get DRAM extensions, these additional regions will be declared
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# to UEFI by ArmPLatformPlib
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gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT32|0x00000029
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gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT32|0x0000002A
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# Use ClusterId + CoreId to identify the PrimaryCore
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
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# The Primary Core is ClusterId[0] & CoreId[0]
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gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
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#
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# ARM MPCore MailBox PCDs
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#
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# Address to Set/Get to Mailbox in Multicore system
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gArmTokenSpaceGuid.PcdMPCoreMailboxSetAddress|0|UINT32|0x00000017
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gArmTokenSpaceGuid.PcdMPCoreMailboxGetAddress|0|UINT32|0x00000018
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# Address/Value to clear Mailbox in Multicore system
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gArmTokenSpaceGuid.PcdMPCoreMailboxClearAddress|0|UINT32|0x00000019
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gArmTokenSpaceGuid.PcdMPCoreMailboxClearValue|0|UINT32|0x0000001A
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#
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# ARM L2x0 PCDs
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#
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gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B
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#
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# ARM PL390 General Interrupt Controller
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000001C
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000001D
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#
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# BdsLib
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#
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gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E
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# The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory
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gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F
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# The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory
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gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020
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